diff options
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/i386/acpi-build.c | 2 | ||||
| -rw-r--r-- | hw/isa/piix4.c | 2 | ||||
| -rw-r--r-- | hw/pci-host/piix.c | 7 |
3 files changed, 6 insertions, 5 deletions
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index b1b050d8e2..266d9b534b 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -209,7 +209,7 @@ static void acpi_get_pm_info(MachineState *machine, AcpiPmInfo *pm) /* The above need not be conditional on machine type because the reset port * happens to be the same on PIIX (pc) and ICH9 (q35). */ - QEMU_BUILD_BUG_ON(ICH9_RST_CNT_IOPORT != RCR_IOPORT); + QEMU_BUILD_BUG_ON(ICH9_RST_CNT_IOPORT != PIIX_RCR_IOPORT); /* Fill in optional s3/s4 related properties */ o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL); diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index f3e21ea76d..86678e6829 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -166,7 +166,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp) memory_region_init_io(&s->rcr_mem, OBJECT(dev), &piix4_rcr_ops, s, "reset-control", 1); memory_region_add_subregion_overlap(pci_address_space_io(dev), - RCR_IOPORT, &s->rcr_mem, 1); + PIIX_RCR_IOPORT, &s->rcr_mem, 1); /* initialize i8259 pic */ i8259_out_irq = qemu_allocate_irqs(piix4_request_i8259_irq, s, 1); diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 3292703de7..6548d9a4b5 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -27,6 +27,7 @@ #include "hw/irq.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" +#include "hw/southbridge/piix.h" #include "hw/qdev-properties.h" #include "hw/isa/isa.h" #include "hw/sysbus.h" @@ -87,7 +88,7 @@ typedef struct PIIX3State { /* Reset Control Register contents */ uint8_t rcr; - /* IO memory region for Reset Control Register (RCR_IOPORT) */ + /* IO memory region for Reset Control Register (PIIX_RCR_IOPORT) */ MemoryRegion rcr_mem; } PIIX3State; @@ -695,8 +696,8 @@ static void piix3_realize(PCIDevice *dev, Error **errp) memory_region_init_io(&d->rcr_mem, OBJECT(dev), &rcr_ops, d, "piix3-reset-control", 1); - memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOPORT, - &d->rcr_mem, 1); + memory_region_add_subregion_overlap(pci_address_space_io(dev), + PIIX_RCR_IOPORT, &d->rcr_mem, 1); qemu_register_reset(piix3_reset, d); } |