diff options
Diffstat (limited to 'include/hw')
335 files changed, 1552 insertions, 846 deletions
diff --git a/include/hw/acpi/acpi_dev_interface.h b/include/hw/acpi/acpi_dev_interface.h index a2a12af9b9..4ef44d6fe8 100644 --- a/include/hw/acpi/acpi_dev_interface.h +++ b/include/hw/acpi/acpi_dev_interface.h @@ -18,6 +18,7 @@ typedef enum { #define TYPE_ACPI_DEVICE_IF "acpi-device-interface" +typedef struct AcpiDeviceIfClass AcpiDeviceIfClass; #define ACPI_DEVICE_IF_CLASS(klass) \ OBJECT_CLASS_CHECK(AcpiDeviceIfClass, (klass), \ TYPE_ACPI_DEVICE_IF) @@ -48,7 +49,7 @@ void acpi_send_event(DeviceState *dev, AcpiEventStatusBits event); * knowledge about internals of actual device that implements * ACPI interface. */ -typedef struct AcpiDeviceIfClass { +struct AcpiDeviceIfClass { /* <private> */ InterfaceClass parent_class; @@ -57,5 +58,5 @@ typedef struct AcpiDeviceIfClass { void (*send_event)(AcpiDeviceIf *adev, AcpiEventStatusBits ev); void (*madt_cpu)(AcpiDeviceIf *adev, int uid, const CPUArchIdList *apic_ids, GArray *entry); -} AcpiDeviceIfClass; +}; #endif diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h index 90a9180db5..2208f0b939 100644 --- a/include/hw/acpi/generic_event_device.h +++ b/include/hw/acpi/generic_event_device.h @@ -62,10 +62,12 @@ #include "hw/sysbus.h" #include "hw/acpi/memory_hotplug.h" #include "hw/acpi/ghes.h" +#include "qom/object.h" #define ACPI_POWER_BUTTON_DEVICE "PWRB" #define TYPE_ACPI_GED "acpi-ged" +typedef struct AcpiGedState AcpiGedState; #define ACPI_GED(obj) \ OBJECT_CHECK(AcpiGedState, (obj), TYPE_ACPI_GED) @@ -90,7 +92,7 @@ typedef struct GEDState { uint32_t sel; } GEDState; -typedef struct AcpiGedState { +struct AcpiGedState { SysBusDevice parent_obj; MemHotplugState memhp_state; MemoryRegion container_memhp; @@ -98,7 +100,7 @@ typedef struct AcpiGedState { uint32_t ged_event_bitmap; qemu_irq irq; AcpiGhesState ghes_state; -} AcpiGedState; +}; void build_ged_aml(Aml *table, const char* name, HotplugHandler *hotplug_dev, uint32_t ged_irq, AmlRegionSpace rs, hwaddr ged_base); diff --git a/include/hw/acpi/vmgenid.h b/include/hw/acpi/vmgenid.h index c49d913f3e..0286fc0f09 100644 --- a/include/hw/acpi/vmgenid.h +++ b/include/hw/acpi/vmgenid.h @@ -4,6 +4,7 @@ #include "hw/acpi/bios-linker-loader.h" #include "hw/qdev-core.h" #include "qemu/uuid.h" +#include "qom/object.h" #define VMGENID_DEVICE "vmgenid" #define VMGENID_GUID "guid" @@ -15,13 +16,14 @@ * OVMF SDT Header Probe Supressor */ +typedef struct VmGenIdState VmGenIdState; #define VMGENID(obj) OBJECT_CHECK(VmGenIdState, (obj), VMGENID_DEVICE) -typedef struct VmGenIdState { +struct VmGenIdState { DeviceClass parent_obj; QemuUUID guid; /* The 128-bit GUID seen by the guest */ uint8_t vmgenid_addr_le[8]; /* Address of the GUID (little-endian) */ -} VmGenIdState; +}; /* returns NULL unless there is exactly one device */ static inline Object *find_vmgenid_dev(void) diff --git a/include/hw/adc/stm32f2xx_adc.h b/include/hw/adc/stm32f2xx_adc.h index 663b79f4f3..60d4b65570 100644 --- a/include/hw/adc/stm32f2xx_adc.h +++ b/include/hw/adc/stm32f2xx_adc.h @@ -26,6 +26,7 @@ #define HW_STM32F2XX_ADC_H #include "hw/sysbus.h" +#include "qom/object.h" #define ADC_SR 0x00 #define ADC_CR1 0x04 @@ -58,10 +59,11 @@ #define ADC_COMMON_ADDRESS 0x100 #define TYPE_STM32F2XX_ADC "stm32f2xx-adc" +typedef struct STM32F2XXADCState STM32F2XXADCState; #define STM32F2XX_ADC(obj) \ OBJECT_CHECK(STM32F2XXADCState, (obj), TYPE_STM32F2XX_ADC) -typedef struct { +struct STM32F2XXADCState { /* <private> */ SysBusDevice parent_obj; @@ -84,6 +86,6 @@ typedef struct { uint32_t adc_dr; qemu_irq irq; -} STM32F2XXADCState; +}; #endif /* HW_STM32F2XX_ADC_H */ diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h index 77c82a9982..631454f1c7 100644 --- a/include/hw/arm/allwinner-a10.h +++ b/include/hw/arm/allwinner-a10.h @@ -14,6 +14,7 @@ #include "hw/rtc/allwinner-rtc.h" #include "target/arm/cpu.h" +#include "qom/object.h" #define AW_A10_SDRAM_BASE 0x40000000 @@ -21,9 +22,10 @@ #define AW_A10_NUM_USB 2 #define TYPE_AW_A10 "allwinner-a10" +typedef struct AwA10State AwA10State; #define AW_A10(obj) OBJECT_CHECK(AwA10State, (obj), TYPE_AW_A10) -typedef struct AwA10State { +struct AwA10State { /*< private >*/ DeviceState parent_obj; /*< public >*/ @@ -38,6 +40,6 @@ typedef struct AwA10State { MemoryRegion sram_a; EHCISysBusState ehci[AW_A10_NUM_USB]; OHCISysBusState ohci[AW_A10_NUM_USB]; -} AwA10State; +}; #endif diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-h3.h index 626139dcb3..5fda95066f 100644 --- a/include/hw/arm/allwinner-h3.h +++ b/include/hw/arm/allwinner-h3.h @@ -106,6 +106,7 @@ enum { #define TYPE_AW_H3 "allwinner-h3" /** Convert input object to Allwinner H3 state object */ +typedef struct AwH3State AwH3State; #define AW_H3(obj) OBJECT_CHECK(AwH3State, (obj), TYPE_AW_H3) /** @} */ @@ -116,7 +117,7 @@ enum { * This struct contains the state of all the devices * which are currently emulated by the H3 SoC code. */ -typedef struct AwH3State { +struct AwH3State { /*< private >*/ DeviceState parent_obj; /*< public >*/ @@ -136,7 +137,7 @@ typedef struct AwH3State { MemoryRegion sram_a1; MemoryRegion sram_a2; MemoryRegion sram_c; -} AwH3State; +}; /** * Emulate Boot ROM firmware setup functionality. diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index 347b977ae5..e5788e9d3c 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -105,8 +105,11 @@ #include "hw/or-irq.h" #include "hw/core/split-irq.h" #include "hw/cpu/cluster.h" +#include "qom/object.h" #define TYPE_ARM_SSE "arm-sse" +typedef struct ARMSSE ARMSSE; +typedef struct ARMSSEClass ARMSSEClass; #define ARM_SSE(obj) OBJECT_CHECK(ARMSSE, (obj), TYPE_ARM_SSE) /* @@ -140,7 +143,7 @@ #define RAM3_PPU 6 #define NUM_PPUS 7 -typedef struct ARMSSE { +struct ARMSSE { /*< private >*/ SysBusDevice parent_obj; @@ -215,14 +218,14 @@ typedef struct ARMSSE { uint32_t init_svtor; bool cpu_fpu[SSE_MAX_CPUS]; bool cpu_dsp[SSE_MAX_CPUS]; -} ARMSSE; +}; typedef struct ARMSSEInfo ARMSSEInfo; -typedef struct ARMSSEClass { +struct ARMSSEClass { SysBusDeviceClass parent_class; const ARMSSEInfo *info; -} ARMSSEClass; +}; #define ARM_SSE_CLASS(klass) \ OBJECT_CLASS_CHECK(ARMSSEClass, (klass), TYPE_ARM_SSE) diff --git a/include/hw/arm/armv7m.h b/include/hw/arm/armv7m.h index a30e3c6471..c820d32ad5 100644 --- a/include/hw/arm/armv7m.h +++ b/include/hw/arm/armv7m.h @@ -13,11 +13,13 @@ #include "hw/sysbus.h" #include "hw/intc/armv7m_nvic.h" #include "target/arm/idau.h" +#include "qom/object.h" #define TYPE_BITBAND "ARM,bitband-memory" +typedef struct BitBandState BitBandState; #define BITBAND(obj) OBJECT_CHECK(BitBandState, (obj), TYPE_BITBAND) -typedef struct { +struct BitBandState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -26,9 +28,10 @@ typedef struct { MemoryRegion iomem; uint32_t base; MemoryRegion *source_memory; -} BitBandState; +}; #define TYPE_ARMV7M "armv7m" +typedef struct ARMv7MState ARMv7MState; #define ARMV7M(obj) OBJECT_CHECK(ARMv7MState, (obj), TYPE_ARMV7M) #define ARMV7M_NUM_BITBANDS 2 @@ -49,7 +52,7 @@ typedef struct { * + Property "dsp": enable DSP (forwarded to CPU object) * + Property "enable-bitband": expose bitbanded IO */ -typedef struct ARMv7MState { +struct ARMv7MState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -72,6 +75,6 @@ typedef struct ARMv7MState { bool start_powered_off; bool vfp; bool dsp; -} ARMv7MState; +}; #endif diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h index 09da9d9acc..4e5ec37acb 100644 --- a/include/hw/arm/aspeed.h +++ b/include/hw/arm/aspeed.h @@ -10,10 +10,12 @@ #define ARM_ASPEED_H #include "hw/boards.h" +#include "qom/object.h" typedef struct AspeedMachineState AspeedMachineState; #define TYPE_ASPEED_MACHINE MACHINE_TYPE_NAME("aspeed") +typedef struct AspeedMachineClass AspeedMachineClass; #define ASPEED_MACHINE(obj) \ OBJECT_CHECK(AspeedMachineState, (obj), TYPE_ASPEED_MACHINE) @@ -27,7 +29,7 @@ typedef struct AspeedMachineState AspeedMachineState; #define ASPEED_MACHINE_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedMachineClass, (obj), TYPE_ASPEED_MACHINE) -typedef struct AspeedMachineClass { +struct AspeedMachineClass { MachineClass parent_obj; const char *name; @@ -40,7 +42,7 @@ typedef struct AspeedMachineClass { uint32_t num_cs; uint32_t macs_mask; void (*i2c_init)(AspeedMachineState *bmc); -} AspeedMachineClass; +}; #endif diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index d46f197cbe..31679ee42e 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -27,6 +27,7 @@ #include "hw/gpio/aspeed_gpio.h" #include "hw/sd/aspeed_sdhci.h" #include "hw/usb/hcd-ehci.h" +#include "qom/object.h" #define ASPEED_SPIS_NUM 2 #define ASPEED_EHCIS_NUM 2 @@ -34,7 +35,7 @@ #define ASPEED_CPUS_NUM 2 #define ASPEED_MACS_NUM 4 -typedef struct AspeedSoCState { +struct AspeedSoCState { /*< private >*/ DeviceState parent; @@ -60,12 +61,14 @@ typedef struct AspeedSoCState { AspeedGPIOState gpio_1_8v; AspeedSDHCIState sdhci; AspeedSDHCIState emmc; -} AspeedSoCState; +}; +typedef struct AspeedSoCState AspeedSoCState; #define TYPE_ASPEED_SOC "aspeed-soc" +typedef struct AspeedSoCClass AspeedSoCClass; #define ASPEED_SOC(obj) OBJECT_CHECK(AspeedSoCState, (obj), TYPE_ASPEED_SOC) -typedef struct AspeedSoCClass { +struct AspeedSoCClass { DeviceClass parent_class; const char *name; @@ -79,7 +82,7 @@ typedef struct AspeedSoCClass { const int *irqmap; const hwaddr *memmap; uint32_t num_cpus; -} AspeedSoCClass; +}; #define ASPEED_SOC_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedSoCClass, (klass), TYPE_ASPEED_SOC) diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h index 48a0ad1633..67f5a5f8f5 100644 --- a/include/hw/arm/bcm2835_peripherals.h +++ b/include/hw/arm/bcm2835_peripherals.h @@ -29,12 +29,14 @@ #include "hw/timer/bcm2835_systmr.h" #include "hw/usb/hcd-dwc2.h" #include "hw/misc/unimp.h" +#include "qom/object.h" #define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals" +typedef struct BCM2835PeripheralState BCM2835PeripheralState; #define BCM2835_PERIPHERALS(obj) \ OBJECT_CHECK(BCM2835PeripheralState, (obj), TYPE_BCM2835_PERIPHERALS) -typedef struct BCM2835PeripheralState { +struct BCM2835PeripheralState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -70,6 +72,6 @@ typedef struct BCM2835PeripheralState { UnimplementedDeviceState smi; DWC2State dwc2; UnimplementedDeviceState sdramc; -} BCM2835PeripheralState; +}; #endif /* BCM2835_PERIPHERALS_H */ diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h index 79dfff9d73..cf22dc96a0 100644 --- a/include/hw/arm/bcm2836.h +++ b/include/hw/arm/bcm2836.h @@ -15,8 +15,11 @@ #include "hw/arm/bcm2835_peripherals.h" #include "hw/intc/bcm2836_control.h" #include "target/arm/cpu.h" +#include "qom/object.h" #define TYPE_BCM283X "bcm283x" +typedef struct BCM283XClass BCM283XClass; +typedef struct BCM283XState BCM283XState; #define BCM283X(obj) OBJECT_CHECK(BCM283XState, (obj), TYPE_BCM283X) #define BCM283X_NCPUS 4 @@ -28,7 +31,7 @@ #define TYPE_BCM2836 "bcm2836" #define TYPE_BCM2837 "bcm2837" -typedef struct BCM283XState { +struct BCM283XState { /*< private >*/ DeviceState parent_obj; /*< public >*/ @@ -40,14 +43,14 @@ typedef struct BCM283XState { } cpu[BCM283X_NCPUS]; BCM2836ControlState control; BCM2835PeripheralState peripherals; -} BCM283XState; +}; typedef struct BCM283XInfo BCM283XInfo; -typedef struct BCM283XClass { +struct BCM283XClass { DeviceClass parent_class; const BCM283XInfo *info; -} BCM283XClass; +}; #define BCM283X_CLASS(klass) \ OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X) diff --git a/include/hw/arm/digic.h b/include/hw/arm/digic.h index 63785baaa8..f77833f6e3 100644 --- a/include/hw/arm/digic.h +++ b/include/hw/arm/digic.h @@ -21,14 +21,16 @@ #include "cpu.h" #include "hw/timer/digic-timer.h" #include "hw/char/digic-uart.h" +#include "qom/object.h" #define TYPE_DIGIC "digic" +typedef struct DigicState DigicState; #define DIGIC(obj) OBJECT_CHECK(DigicState, (obj), TYPE_DIGIC) #define DIGIC4_NB_TIMERS 3 -typedef struct DigicState { +struct DigicState { /*< private >*/ DeviceState parent_obj; /*< public >*/ @@ -37,6 +39,6 @@ typedef struct DigicState { DigicTimerState timer[DIGIC4_NB_TIMERS]; DigicUartState uart; -} DigicState; +}; #endif /* HW_ARM_DIGIC_H */ diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h index 55260394af..114c594cd2 100644 --- a/include/hw/arm/exynos4210.h +++ b/include/hw/arm/exynos4210.h @@ -27,6 +27,7 @@ #include "hw/or-irq.h" #include "hw/sysbus.h" #include "target/arm/cpu-qom.h" +#include "qom/object.h" #define EXYNOS4210_NCPUS 2 @@ -85,7 +86,7 @@ typedef struct Exynos4210Irq { qemu_irq board_irqs[EXYNOS4210_MAX_INT_COMBINER_IN_IRQ]; } Exynos4210Irq; -typedef struct Exynos4210State { +struct Exynos4210State { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -101,7 +102,8 @@ typedef struct Exynos4210State { MemoryRegion bootreg_mem; I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER]; qemu_or_irq pl330_irq_orgate[EXYNOS4210_NUM_DMA]; -} Exynos4210State; +}; +typedef struct Exynos4210State Exynos4210State; #define TYPE_EXYNOS4210_SOC "exynos4210" #define EXYNOS4210_SOC(obj) \ diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h index 54ee1bfd78..8b4c974f09 100644 --- a/include/hw/arm/fsl-imx25.h +++ b/include/hw/arm/fsl-imx25.h @@ -32,8 +32,10 @@ #include "hw/watchdog/wdt_imx2.h" #include "exec/memory.h" #include "target/arm/cpu.h" +#include "qom/object.h" #define TYPE_FSL_IMX25 "fsl,imx25" +typedef struct FslIMX25State FslIMX25State; #define FSL_IMX25(obj) OBJECT_CHECK(FslIMX25State, (obj), TYPE_FSL_IMX25) #define FSL_IMX25_NUM_UARTS 5 @@ -44,7 +46,7 @@ #define FSL_IMX25_NUM_ESDHCS 2 #define FSL_IMX25_NUM_USBS 2 -typedef struct FslIMX25State { +struct FslIMX25State { /*< private >*/ DeviceState parent_obj; @@ -66,7 +68,7 @@ typedef struct FslIMX25State { MemoryRegion iram; MemoryRegion iram_alias; uint32_t phy_num; -} FslIMX25State; +}; /** * i.MX25 memory map diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h index dd8561b309..12368f2c8f 100644 --- a/include/hw/arm/fsl-imx31.h +++ b/include/hw/arm/fsl-imx31.h @@ -28,8 +28,10 @@ #include "hw/watchdog/wdt_imx2.h" #include "exec/memory.h" #include "target/arm/cpu.h" +#include "qom/object.h" #define TYPE_FSL_IMX31 "fsl,imx31" +typedef struct FslIMX31State FslIMX31State; #define FSL_IMX31(obj) OBJECT_CHECK(FslIMX31State, (obj), TYPE_FSL_IMX31) #define FSL_IMX31_NUM_UARTS 2 @@ -37,7 +39,7 @@ #define FSL_IMX31_NUM_I2CS 3 #define FSL_IMX31_NUM_GPIOS 3 -typedef struct FslIMX31State { +struct FslIMX31State { /*< private >*/ DeviceState parent_obj; @@ -55,7 +57,7 @@ typedef struct FslIMX31State { MemoryRegion rom; MemoryRegion iram; MemoryRegion iram_alias; -} FslIMX31State; +}; #define FSL_IMX31_SECURE_ROM_ADDR 0x00000000 #define FSL_IMX31_SECURE_ROM_SIZE 0x4000 diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h index 162fe99375..e66ea1e917 100644 --- a/include/hw/arm/fsl-imx6.h +++ b/include/hw/arm/fsl-imx6.h @@ -34,8 +34,10 @@ #include "hw/usb/imx-usb-phy.h" #include "exec/memory.h" #include "cpu.h" +#include "qom/object.h" #define TYPE_FSL_IMX6 "fsl,imx6" +typedef struct FslIMX6State FslIMX6State; #define FSL_IMX6(obj) OBJECT_CHECK(FslIMX6State, (obj), TYPE_FSL_IMX6) #define FSL_IMX6_NUM_CPUS 4 @@ -49,7 +51,7 @@ #define FSL_IMX6_NUM_USB_PHYS 2 #define FSL_IMX6_NUM_USBS 4 -typedef struct FslIMX6State { +struct FslIMX6State { /*< private >*/ DeviceState parent_obj; @@ -74,7 +76,7 @@ typedef struct FslIMX6State { MemoryRegion ocram; MemoryRegion ocram_alias; uint32_t phy_num; -} FslIMX6State; +}; #define FSL_IMX6_MMDC_ADDR 0x10000000 diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h index fcbaf3dc86..e95c4820c6 100644 --- a/include/hw/arm/fsl-imx6ul.h +++ b/include/hw/arm/fsl-imx6ul.h @@ -38,8 +38,10 @@ #include "hw/usb/imx-usb-phy.h" #include "exec/memory.h" #include "cpu.h" +#include "qom/object.h" #define TYPE_FSL_IMX6UL "fsl,imx6ul" +typedef struct FslIMX6ULState FslIMX6ULState; #define FSL_IMX6UL(obj) OBJECT_CHECK(FslIMX6ULState, (obj), TYPE_FSL_IMX6UL) enum FslIMX6ULConfiguration { @@ -60,7 +62,7 @@ enum FslIMX6ULConfiguration { FSL_IMX6UL_NUM_USBS = 2, }; -typedef struct FslIMX6ULState { +struct FslIMX6ULState { /*< private >*/ DeviceState parent_obj; @@ -89,7 +91,7 @@ typedef struct FslIMX6ULState { MemoryRegion ocram_alias; uint32_t phy_num[FSL_IMX6UL_NUM_ETHS]; -} FslIMX6ULState; +}; enum FslIMX6ULMemoryMap { FSL_IMX6UL_MMDC_ADDR = 0x80000000, diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h index ad88923707..8095e5544b 100644 --- a/include/hw/arm/fsl-imx7.h +++ b/include/hw/arm/fsl-imx7.h @@ -39,8 +39,10 @@ #include "hw/pci-host/designware.h" #include "hw/usb/chipidea.h" #include "cpu.h" +#include "qom/object.h" #define TYPE_FSL_IMX7 "fsl,imx7" +typedef struct FslIMX7State FslIMX7State; #define FSL_IMX7(obj) OBJECT_CHECK(FslIMX7State, (obj), TYPE_FSL_IMX7) enum FslIMX7Configuration { @@ -59,7 +61,7 @@ enum FslIMX7Configuration { FSL_IMX7_NUM_ADCS = 2, }; -typedef struct FslIMX7State { +struct FslIMX7State { /*< private >*/ DeviceState parent_obj; @@ -82,7 +84,7 @@ typedef struct FslIMX7State { ChipideaState usb[FSL_IMX7_NUM_USBS]; DesignwarePCIEHost pcie; uint32_t phy_num[FSL_IMX7_NUM_ETHS]; -} FslIMX7State; +}; enum FslIMX7MemoryMap { FSL_IMX7_MMDC_ADDR = 0x80000000, diff --git a/include/hw/arm/linux-boot-if.h b/include/hw/arm/linux-boot-if.h index 7bbdfd1cc6..6d9e13fd36 100644 --- a/include/hw/arm/linux-boot-if.h +++ b/include/hw/arm/linux-boot-if.h @@ -9,6 +9,7 @@ #include "qom/object.h" #define TYPE_ARM_LINUX_BOOT_IF "arm-linux-boot-if" +typedef struct ARMLinuxBootIfClass ARMLinuxBootIfClass; #define ARM_LINUX_BOOT_IF_CLASS(klass) \ OBJECT_CLASS_CHECK(ARMLinuxBootIfClass, (klass), TYPE_ARM_LINUX_BOOT_IF) #define ARM_LINUX_BOOT_IF_GET_CLASS(obj) \ @@ -18,7 +19,7 @@ typedef struct ARMLinuxBootIf ARMLinuxBootIf; -typedef struct ARMLinuxBootIfClass { +struct ARMLinuxBootIfClass { /*< private >*/ InterfaceClass parent_class; @@ -35,6 +36,6 @@ typedef struct ARMLinuxBootIfClass { * (or for a CPU which doesn't support TrustZone) */ void (*arm_linux_init)(ARMLinuxBootIf *obj, bool secure_boot); -} ARMLinuxBootIfClass; +}; #endif diff --git a/include/hw/arm/msf2-soc.h b/include/hw/arm/msf2-soc.h index c9cb214aa6..b4bc5ef96a 100644 --- a/include/hw/arm/msf2-soc.h +++ b/include/hw/arm/msf2-soc.h @@ -30,8 +30,10 @@ #include "hw/misc/msf2-sysreg.h" #include "hw/ssi/mss-spi.h" #include "hw/net/msf2-emac.h" +#include "qom/object.h" #define TYPE_MSF2_SOC "msf2-soc" +typedef struct MSF2State MSF2State; #define MSF2_SOC(obj) OBJECT_CHECK(MSF2State, (obj), TYPE_MSF2_SOC) #define MSF2_NUM_SPIS 2 @@ -44,7 +46,7 @@ */ #define MSF2_NUM_TIMERS 2 -typedef struct MSF2State { +struct MSF2State { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -64,6 +66,6 @@ typedef struct MSF2State { MSSTimerState timer; MSSSpiState spi[MSF2_NUM_SPIS]; MSF2EmacState emac; -} MSF2State; +}; #endif diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h index 0cb78aafea..727ac1ae04 100644 --- a/include/hw/arm/nrf51_soc.h +++ b/include/hw/arm/nrf51_soc.h @@ -17,14 +17,16 @@ #include "hw/gpio/nrf51_gpio.h" #include "hw/nvram/nrf51_nvm.h" #include "hw/timer/nrf51_timer.h" +#include "qom/object.h" #define TYPE_NRF51_SOC "nrf51-soc" +typedef struct NRF51State NRF51State; #define NRF51_SOC(obj) \ OBJECT_CHECK(NRF51State, (obj), TYPE_NRF51_SOC) #define NRF51_NUM_TIMERS 3 -typedef struct NRF51State { +struct NRF51State { /*< private >*/ SysBusDevice parent_obj; @@ -50,6 +52,6 @@ typedef struct NRF51State { MemoryRegion container; -} NRF51State; +}; #endif diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index 6be386d0e2..0d365edeec 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -24,6 +24,7 @@ #include "hw/input/tsc2xxx.h" #include "target/arm/cpu-qom.h" #include "qemu/log.h" +#include "qom/object.h" # define OMAP_EMIFS_BASE 0x00000000 # define OMAP2_Q0_BASE 0x00000000 @@ -69,10 +70,10 @@ void omap_clk_reparent(omap_clk clk, omap_clk parent); /* omap_intc.c */ #define TYPE_OMAP_INTC "common-omap-intc" +typedef struct omap_intr_handler_s omap_intr_handler; #define OMAP_INTC(obj) \ OBJECT_CHECK(omap_intr_handler, (obj), TYPE_OMAP_INTC) -typedef struct omap_intr_handler_s omap_intr_handler; /* * TODO: Ideally we should have a clock framework that @@ -93,9 +94,9 @@ void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk); /* omap_i2c.c */ #define TYPE_OMAP_I2C "omap_i2c" +typedef struct OMAPI2CState OMAPI2CState; #define OMAP_I2C(obj) OBJECT_CHECK(OMAPI2CState, (obj), TYPE_OMAP_I2C) -typedef struct OMAPI2CState OMAPI2CState; /* TODO: clock framework (see above) */ void omap_i2c_set_iclk(OMAPI2CState *i2c, omap_clk clk); diff --git a/include/hw/arm/pxa.h b/include/hw/arm/pxa.h index 09c1336071..b2f9a41468 100644 --- a/include/hw/arm/pxa.h +++ b/include/hw/arm/pxa.h @@ -13,6 +13,7 @@ #include "exec/memory.h" #include "target/arm/cpu-qom.h" #include "hw/pcmcia.h" +#include "qom/object.h" /* Interrupt numbers */ # define PXA2XX_PIC_SSP3 0 diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index 880dccd7c0..b6b51a1cb1 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -21,6 +21,7 @@ #include "hw/sysbus.h" #include "hw/pci/pci.h" +#include "qom/object.h" #define SMMU_PCI_BUS_MAX 256 #define SMMU_PCI_DEVFN_MAX 256 @@ -102,7 +103,7 @@ typedef struct SMMUIOTLBKey { uint8_t level; } SMMUIOTLBKey; -typedef struct SMMUState { +struct SMMUState { /* <private> */ SysBusDevice dev; const char *mrtypename; @@ -116,9 +117,10 @@ typedef struct SMMUState { QLIST_HEAD(, SMMUDevice) devices_with_notifiers; uint8_t bus_num; PCIBus *primary_bus; -} SMMUState; +}; +typedef struct SMMUState SMMUState; -typedef struct { +struct SMMUBaseClass { /* <private> */ SysBusDeviceClass parent_class; @@ -126,7 +128,8 @@ typedef struct { DeviceRealize parent_realize; -} SMMUBaseClass; +}; +typedef struct SMMUBaseClass SMMUBaseClass; #define TYPE_ARM_SMMU "arm-smmu" #define ARM_SMMU(obj) OBJECT_CHECK(SMMUState, (obj), TYPE_ARM_SMMU) diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h index 68d7a963e0..698b89d234 100644 --- a/include/hw/arm/smmuv3.h +++ b/include/hw/arm/smmuv3.h @@ -21,6 +21,7 @@ #include "hw/arm/smmu-common.h" #include "hw/registerfields.h" +#include "qom/object.h" #define TYPE_SMMUV3_IOMMU_MEMORY_REGION "smmuv3-iommu-memory-region" @@ -32,7 +33,7 @@ typedef struct SMMUQueue { uint8_t log2size; } SMMUQueue; -typedef struct SMMUv3State { +struct SMMUv3State { SMMUState smmu_state; uint32_t features; @@ -61,7 +62,8 @@ typedef struct SMMUv3State { qemu_irq irq[4]; QemuMutex mutex; -} SMMUv3State; +}; +typedef struct SMMUv3State SMMUv3State; typedef enum { SMMU_IRQ_EVTQ, @@ -70,14 +72,15 @@ typedef enum { SMMU_IRQ_GERROR, } SMMUIrq; -typedef struct { +struct SMMUv3Class { /*< private >*/ SMMUBaseClass smmu_base_class; /*< public >*/ DeviceRealize parent_realize; DeviceReset parent_reset; -} SMMUv3Class; +}; +typedef struct SMMUv3Class SMMUv3Class; #define TYPE_ARM_SMMUV3 "arm-smmuv3" #define ARM_SMMUV3(obj) OBJECT_CHECK(SMMUv3State, (obj), TYPE_ARM_SMMUV3) diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h index 922a733f88..6d86937e07 100644 --- a/include/hw/arm/stm32f205_soc.h +++ b/include/hw/arm/stm32f205_soc.h @@ -32,8 +32,10 @@ #include "hw/or-irq.h" #include "hw/ssi/stm32f2xx_spi.h" #include "hw/arm/armv7m.h" +#include "qom/object.h" #define TYPE_STM32F205_SOC "stm32f205-soc" +typedef struct STM32F205State STM32F205State; #define STM32F205_SOC(obj) \ OBJECT_CHECK(STM32F205State, (obj), TYPE_STM32F205_SOC) @@ -47,7 +49,7 @@ #define SRAM_BASE_ADDRESS 0x20000000 #define SRAM_SIZE (128 * 1024) -typedef struct STM32F205State { +struct STM32F205State { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -63,6 +65,6 @@ typedef struct STM32F205State { STM32F2XXSPIState spi[STM_NUM_SPIS]; qemu_or_irq *adc_irqs; -} STM32F205State; +}; #endif diff --git a/include/hw/arm/stm32f405_soc.h b/include/hw/arm/stm32f405_soc.h index 1fe97f8c3a..8f44fb2046 100644 --- a/include/hw/arm/stm32f405_soc.h +++ b/include/hw/arm/stm32f405_soc.h @@ -33,8 +33,10 @@ #include "hw/or-irq.h" #include "hw/ssi/stm32f2xx_spi.h" #include "hw/arm/armv7m.h" +#include "qom/object.h" #define TYPE_STM32F405_SOC "stm32f405-soc" +typedef struct STM32F405State STM32F405State; #define STM32F405_SOC(obj) \ OBJECT_CHECK(STM32F405State, (obj), TYPE_STM32F405_SOC) @@ -48,7 +50,7 @@ #define SRAM_BASE_ADDRESS 0x20000000 #define SRAM_SIZE (192 * 1024) -typedef struct STM32F405State { +struct STM32F405State { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -68,6 +70,6 @@ typedef struct STM32F405State { MemoryRegion sram; MemoryRegion flash; MemoryRegion flash_alias; -} STM32F405State; +}; #endif diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index dff67e1bef..49ad860943 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -37,6 +37,7 @@ #include "hw/block/flash.h" #include "sysemu/kvm.h" #include "hw/intc/arm_gicv3_common.h" +#include "qom/object.h" #define NUM_GICV2M_SPIS 64 #define NUM_VIRTIO_TRANSPORTS 32 @@ -115,7 +116,7 @@ typedef struct MemMapEntry { hwaddr size; } MemMapEntry; -typedef struct { +struct VirtMachineClass { MachineClass parent; bool disallow_affinity_adjustment; bool no_its; @@ -126,9 +127,10 @@ typedef struct { bool no_ged; /* Machines < 4.2 has no support for ACPI GED device */ bool kvm_no_adjvtime; bool acpi_expose_flash; -} VirtMachineClass; +}; +typedef struct VirtMachineClass VirtMachineClass; -typedef struct { +struct VirtMachineState { MachineState parent; Notifier machine_done; DeviceState *platform_bus_dev; @@ -162,7 +164,8 @@ typedef struct { DeviceState *gic; DeviceState *acpi_dev; Notifier powerdown_notifier; -} VirtMachineState; +}; +typedef struct VirtMachineState VirtMachineState; #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 9c9f47ba9d..a960619ec9 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -20,8 +20,10 @@ #include "hw/dma/xlnx-zdma.h" #include "hw/net/cadence_gem.h" #include "hw/rtc/xlnx-zynqmp-rtc.h" +#include "qom/object.h" #define TYPE_XLNX_VERSAL "xlnx-versal" +typedef struct Versal Versal; #define XLNX_VERSAL(obj) OBJECT_CHECK(Versal, (obj), TYPE_XLNX_VERSAL) #define XLNX_VERSAL_NR_ACPUS 2 @@ -31,7 +33,7 @@ #define XLNX_VERSAL_NR_SDS 2 #define XLNX_VERSAL_NR_IRQS 192 -typedef struct Versal { +struct Versal { /*< private >*/ SysBusDevice parent_obj; @@ -74,7 +76,7 @@ typedef struct Versal { MemoryRegion *mr_ddr; uint32_t psci_conduit; } cfg; -} Versal; +}; /* Memory-map and IRQ definitions. Copied a subset from * auto-generated files. */ diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index 53076fa29a..6a24216abf 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -32,8 +32,10 @@ #include "hw/rtc/xlnx-zynqmp-rtc.h" #include "hw/cpu/cluster.h" #include "target/arm/cpu.h" +#include "qom/object.h" #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp" +typedef struct XlnxZynqMPState XlnxZynqMPState; #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \ TYPE_XLNX_ZYNQMP) @@ -73,7 +75,7 @@ #define XLNX_ZYNQMP_MAX_RAM_SIZE (XLNX_ZYNQMP_MAX_LOW_RAM_SIZE + \ XLNX_ZYNQMP_MAX_HIGH_RAM_SIZE) -typedef struct XlnxZynqMPState { +struct XlnxZynqMPState { /*< private >*/ DeviceState parent_obj; @@ -112,6 +114,6 @@ typedef struct XlnxZynqMPState { bool virt; /* Has the RPU subsystem? */ bool has_rpu; -} XlnxZynqMPState; +}; #endif diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 2136a2d5e4..9b2fa7e92c 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -4,14 +4,15 @@ /* NOR flash devices */ #include "exec/hwaddr.h" +#include "qom/object.h" /* pflash_cfi01.c */ #define TYPE_PFLASH_CFI01 "cfi.pflash01" +typedef struct PFlashCFI01 PFlashCFI01; #define PFLASH_CFI01(obj) \ OBJECT_CHECK(PFlashCFI01, (obj), TYPE_PFLASH_CFI01) -typedef struct PFlashCFI01 PFlashCFI01; PFlashCFI01 *pflash_cfi01_register(hwaddr base, const char *name, @@ -29,10 +30,10 @@ void pflash_cfi01_legacy_drive(PFlashCFI01 *dev, DriveInfo *dinfo); /* pflash_cfi02.c */ #define TYPE_PFLASH_CFI02 "cfi.pflash02" +typedef struct PFlashCFI02 PFlashCFI02; #define PFLASH_CFI02(obj) \ OBJECT_CHECK(PFlashCFI02, (obj), TYPE_PFLASH_CFI02) -typedef struct PFlashCFI02 PFlashCFI02; PFlashCFI02 *pflash_cfi02_register(hwaddr base, const char *name, diff --git a/include/hw/block/swim.h b/include/hw/block/swim.h index 9d8b65c561..f013d634f7 100644 --- a/include/hw/block/swim.h +++ b/include/hw/block/swim.h @@ -13,6 +13,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "qom/object.h" #define SWIM_MAX_FD 2 @@ -67,10 +68,11 @@ struct SWIMCtrl { }; #define TYPE_SWIM "swim" +typedef struct Swim Swim; #define SWIM(obj) OBJECT_CHECK(Swim, (obj), TYPE_SWIM) -typedef struct Swim { +struct Swim { SysBusDevice parent_obj; SWIMCtrl ctrl; -} Swim; +}; #endif diff --git a/include/hw/char/avr_usart.h b/include/hw/char/avr_usart.h index 5739aaf26f..67ad345edd 100644 --- a/include/hw/char/avr_usart.h +++ b/include/hw/char/avr_usart.h @@ -25,6 +25,7 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" #include "hw/hw.h" +#include "qom/object.h" /* Offsets of registers. */ #define USART_DR 0x06 @@ -57,10 +58,11 @@ #define USART_CSRC_CSZ0 (1 << 1) #define TYPE_AVR_USART "avr-usart" +typedef struct AVRUsartState AVRUsartState; #define AVR_USART(obj) \ OBJECT_CHECK(AVRUsartState, (obj), TYPE_AVR_USART) -typedef struct { +struct AVRUsartState { /* <private> */ SysBusDevice parent_obj; @@ -88,6 +90,6 @@ typedef struct { qemu_irq txc_irq; /* Data Register Empty */ qemu_irq dre_irq; -} AVRUsartState; +}; #endif /* HW_CHAR_AVR_USART_H */ diff --git a/include/hw/char/bcm2835_aux.h b/include/hw/char/bcm2835_aux.h index 934acf9c81..2647becc52 100644 --- a/include/hw/char/bcm2835_aux.h +++ b/include/hw/char/bcm2835_aux.h @@ -11,13 +11,15 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define TYPE_BCM2835_AUX "bcm2835-aux" +typedef struct BCM2835AuxState BCM2835AuxState; #define BCM2835_AUX(obj) OBJECT_CHECK(BCM2835AuxState, (obj), TYPE_BCM2835_AUX) #define BCM2835_AUX_RX_FIFO_LEN 8 -typedef struct { +struct BCM2835AuxState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -29,6 +31,6 @@ typedef struct { uint8_t read_fifo[BCM2835_AUX_RX_FIFO_LEN]; uint8_t read_pos, read_count; uint8_t ier, iir; -} BCM2835AuxState; +}; #endif diff --git a/include/hw/char/cadence_uart.h b/include/hw/char/cadence_uart.h index dabc49ea4f..3d02d6ef1a 100644 --- a/include/hw/char/cadence_uart.h +++ b/include/hw/char/cadence_uart.h @@ -24,6 +24,7 @@ #include "chardev/char-fe.h" #include "qapi/error.h" #include "qemu/timer.h" +#include "qom/object.h" #define CADENCE_UART_RX_FIFO_SIZE 16 #define CADENCE_UART_TX_FIFO_SIZE 16 @@ -31,10 +32,11 @@ #define CADENCE_UART_R_MAX (0x48/4) #define TYPE_CADENCE_UART "cadence_uart" +typedef struct CadenceUARTState CadenceUARTState; #define CADENCE_UART(obj) OBJECT_CHECK(CadenceUARTState, (obj), \ TYPE_CADENCE_UART) -typedef struct { +struct CadenceUARTState { /*< private >*/ SysBusDevice parent_obj; @@ -51,6 +53,6 @@ typedef struct { qemu_irq irq; QEMUTimer *fifo_trigger_handle; Clock *refclk; -} CadenceUARTState; +}; #endif diff --git a/include/hw/char/cmsdk-apb-uart.h b/include/hw/char/cmsdk-apb-uart.h index bc9069f9fd..32c0df9df3 100644 --- a/include/hw/char/cmsdk-apb-uart.h +++ b/include/hw/char/cmsdk-apb-uart.h @@ -15,12 +15,14 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define TYPE_CMSDK_APB_UART "cmsdk-apb-uart" +typedef struct CMSDKAPBUART CMSDKAPBUART; #define CMSDK_APB_UART(obj) OBJECT_CHECK(CMSDKAPBUART, (obj), \ TYPE_CMSDK_APB_UART) -typedef struct { +struct CMSDKAPBUART { /*< private >*/ SysBusDevice parent_obj; @@ -42,7 +44,7 @@ typedef struct { /* This UART has no FIFO, only a 1-character buffer for each of Tx and Rx */ uint8_t txbuf; uint8_t rxbuf; -} CMSDKAPBUART; +}; /** * cmsdk_apb_uart_create - convenience function to create TYPE_CMSDK_APB_UART diff --git a/include/hw/char/digic-uart.h b/include/hw/char/digic-uart.h index de9a3e3551..7c6ec2a5c5 100644 --- a/include/hw/char/digic-uart.h +++ b/include/hw/char/digic-uart.h @@ -20,8 +20,10 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define TYPE_DIGIC_UART "digic-uart" +typedef struct DigicUartState DigicUartState; #define DIGIC_UART(obj) \ OBJECT_CHECK(DigicUartState, (obj), TYPE_DIGIC_UART) @@ -32,7 +34,7 @@ enum { R_MAX }; -typedef struct DigicUartState { +struct DigicUartState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -42,6 +44,6 @@ typedef struct DigicUartState { uint32_t reg_rx; uint32_t reg_st; -} DigicUartState; +}; #endif /* HW_CHAR_DIGIC_UART_H */ diff --git a/include/hw/char/escc.h b/include/hw/char/escc.h index 794b653484..5de2a39e77 100644 --- a/include/hw/char/escc.h +++ b/include/hw/char/escc.h @@ -5,11 +5,13 @@ #include "chardev/char-serial.h" #include "hw/sysbus.h" #include "ui/input.h" +#include "qom/object.h" /* escc.c */ #define TYPE_ESCC "escc" #define ESCC_SIZE 4 +typedef struct ESCCState ESCCState; #define ESCC(obj) OBJECT_CHECK(ESCCState, (obj), TYPE_ESCC) typedef enum { @@ -46,7 +48,7 @@ typedef struct ESCCChannelState { QemuInputHandlerState *hs; } ESCCChannelState; -typedef struct ESCCState { +struct ESCCState { SysBusDevice parent_obj; struct ESCCChannelState chn[2]; @@ -55,6 +57,6 @@ typedef struct ESCCState { MemoryRegion mmio; uint32_t disabled; uint32_t frequency; -} ESCCState; +}; #endif diff --git a/include/hw/char/ibex_uart.h b/include/hw/char/ibex_uart.h index b6bd5a6700..ec9fcde8f0 100644 --- a/include/hw/char/ibex_uart.h +++ b/include/hw/char/ibex_uart.h @@ -29,6 +29,7 @@ #include "hw/registerfields.h" #include "chardev/char-fe.h" #include "qemu/timer.h" +#include "qom/object.h" REG32(INTR_STATE, 0x00) FIELD(INTR_STATE, TX_WATERMARK, 0, 1) @@ -69,10 +70,11 @@ REG32(TIMEOUT_CTRL, 0x2c) #define IBEX_UART_CLOCK 50000000 /* 50MHz clock */ #define TYPE_IBEX_UART "ibex-uart" +typedef struct IbexUartState IbexUartState; #define IBEX_UART(obj) \ OBJECT_CHECK(IbexUartState, (obj), TYPE_IBEX_UART) -typedef struct { +struct IbexUartState { /* <private> */ SysBusDevice parent_obj; @@ -103,5 +105,5 @@ typedef struct { qemu_irq rx_watermark; qemu_irq tx_empty; qemu_irq rx_overflow; -} IbexUartState; +}; #endif /* HW_IBEX_UART_H */ diff --git a/include/hw/char/imx_serial.h b/include/hw/char/imx_serial.h index c8b74284f8..bfaf8ec695 100644 --- a/include/hw/char/imx_serial.h +++ b/include/hw/char/imx_serial.h @@ -20,8 +20,10 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define TYPE_IMX_SERIAL "imx.serial" +typedef struct IMXSerialState IMXSerialState; #define IMX_SERIAL(obj) OBJECT_CHECK(IMXSerialState, (obj), TYPE_IMX_SERIAL) #define URXD_CHARRDY (1<<15) /* character read is valid */ @@ -76,7 +78,7 @@ #define UTS1_TXFULL (1<<4) #define UTS1_RXFULL (1<<3) -typedef struct IMXSerialState { +struct IMXSerialState { /*< private >*/ SysBusDevice parent_obj; @@ -103,6 +105,6 @@ typedef struct IMXSerialState { qemu_irq irq; CharBackend chr; -} IMXSerialState; +}; #endif diff --git a/include/hw/char/nrf51_uart.h b/include/hw/char/nrf51_uart.h index eb1c15b490..20560ba6dc 100644 --- a/include/hw/char/nrf51_uart.h +++ b/include/hw/char/nrf51_uart.h @@ -14,11 +14,13 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" #include "hw/registerfields.h" +#include "qom/object.h" #define UART_FIFO_LENGTH 6 #define UART_SIZE 0x1000 #define TYPE_NRF51_UART "nrf51_soc.uart" +typedef struct NRF51UARTState NRF51UARTState; #define NRF51_UART(obj) OBJECT_CHECK(NRF51UARTState, (obj), TYPE_NRF51_UART) REG32(UART_STARTRX, 0x000) @@ -54,7 +56,7 @@ REG32(UART_TXD, 0x51C) REG32(UART_BAUDRATE, 0x524) REG32(UART_CONFIG, 0x56C) -typedef struct NRF51UARTState { +struct NRF51UARTState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -72,6 +74,6 @@ typedef struct NRF51UARTState { bool tx_started; bool pending_tx_byte; bool enabled; -} NRF51UARTState; +}; #endif diff --git a/include/hw/char/pl011.h b/include/hw/char/pl011.h index bed758350f..ddbd8ad45b 100644 --- a/include/hw/char/pl011.h +++ b/include/hw/char/pl011.h @@ -19,14 +19,16 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" #include "qapi/error.h" +#include "qom/object.h" #define TYPE_PL011 "pl011" +typedef struct PL011State PL011State; #define PL011(obj) OBJECT_CHECK(PL011State, (obj), TYPE_PL011) /* This shares the same struct (and cast macro) as the base pl011 device */ #define TYPE_PL011_LUMINARY "pl011_luminary" -typedef struct PL011State { +struct PL011State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -49,7 +51,7 @@ typedef struct PL011State { CharBackend chr; qemu_irq irq[6]; const unsigned char *id; -} PL011State; +}; static inline DeviceState *pl011_create(hwaddr addr, qemu_irq irq, diff --git a/include/hw/char/renesas_sci.h b/include/hw/char/renesas_sci.h index efdebc620a..5a5ebfd28c 100644 --- a/include/hw/char/renesas_sci.h +++ b/include/hw/char/renesas_sci.h @@ -11,8 +11,10 @@ #include "chardev/char-fe.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_RENESAS_SCI "renesas-sci" +typedef struct RSCIState RSCIState; #define RSCI(obj) OBJECT_CHECK(RSCIState, (obj), TYPE_RENESAS_SCI) enum { @@ -23,7 +25,7 @@ enum { SCI_NR_IRQ = 4 }; -typedef struct { +struct RSCIState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -46,6 +48,6 @@ typedef struct { int64_t trtime; int64_t rx_next; uint64_t input_freq; -} RSCIState; +}; #endif diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index 535fa23a2b..dbeef43676 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -31,10 +31,11 @@ #include "qemu/fifo8.h" #include "chardev/char.h" #include "hw/sysbus.h" +#include "qom/object.h" #define UART_FIFO_LENGTH 16 /* 16550A Fifo Length */ -typedef struct SerialState { +struct SerialState { DeviceState parent; uint16_t divider; @@ -77,22 +78,25 @@ typedef struct SerialState { QEMUTimer *modem_status_poll; MemoryRegion io; -} SerialState; +}; +typedef struct SerialState SerialState; -typedef struct SerialMM { +struct SerialMM { SysBusDevice parent; SerialState serial; uint8_t regshift; uint8_t endianness; -} SerialMM; +}; +typedef struct SerialMM SerialMM; -typedef struct SerialIO { +struct SerialIO { SysBusDevice parent; SerialState serial; -} SerialIO; +}; +typedef struct SerialIO SerialIO; extern const VMStateDescription vmstate_serial; extern const MemoryRegionOps serial_io_ops; diff --git a/include/hw/char/stm32f2xx_usart.h b/include/hw/char/stm32f2xx_usart.h index 8e112671e3..c44faca751 100644 --- a/include/hw/char/stm32f2xx_usart.h +++ b/include/hw/char/stm32f2xx_usart.h @@ -27,6 +27,7 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define USART_SR 0x00 #define USART_DR 0x04 @@ -53,10 +54,11 @@ #define USART_CR1_RE (1 << 2) #define TYPE_STM32F2XX_USART "stm32f2xx-usart" +typedef struct STM32F2XXUsartState STM32F2XXUsartState; #define STM32F2XX_USART(obj) \ OBJECT_CHECK(STM32F2XXUsartState, (obj), TYPE_STM32F2XX_USART) -typedef struct { +struct STM32F2XXUsartState { /* <private> */ SysBusDevice parent_obj; @@ -73,5 +75,5 @@ typedef struct { CharBackend chr; qemu_irq irq; -} STM32F2XXUsartState; +}; #endif /* HW_STM32F2XX_USART_H */ diff --git a/include/hw/clock.h b/include/hw/clock.h index 9ecd78b2c3..65cf363dd5 100644 --- a/include/hw/clock.h +++ b/include/hw/clock.h @@ -18,6 +18,7 @@ #include "qemu/queue.h" #define TYPE_CLOCK "clock" +typedef struct Clock Clock; #define CLOCK(obj) OBJECT_CHECK(Clock, (obj), TYPE_CLOCK) typedef void ClockCallback(void *opaque); @@ -54,7 +55,6 @@ typedef void ClockCallback(void *opaque); * @sibling: structure used to form a clock list */ -typedef struct Clock Clock; struct Clock { /*< private >*/ diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 9fc2696db5..b22bb54c82 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -30,6 +30,7 @@ #include "qemu/queue.h" #include "qemu/thread.h" #include "qemu/plugin.h" +#include "qom/object.h" typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size, void *opaque); @@ -61,6 +62,7 @@ typedef uint64_t vaddr; */ #define CPU(obj) ((CPUState *)(obj)) +typedef struct CPUClass CPUClass; #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU) #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU) @@ -156,7 +158,7 @@ struct TranslationBlock; * * Represents a CPU family or model. */ -typedef struct CPUClass { +struct CPUClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ @@ -222,7 +224,7 @@ typedef struct CPUClass { /* Keep non-pointer data at the end to minimize holes. */ int gdb_num_core_regs; bool gdb_stop_before_watchpoint; -} CPUClass; +}; /* * Low 16 bits: number of cycles left, used only in icount mode. diff --git a/include/hw/core/generic-loader.h b/include/hw/core/generic-loader.h index 9ffce1c5a3..f435af1884 100644 --- a/include/hw/core/generic-loader.h +++ b/include/hw/core/generic-loader.h @@ -20,8 +20,9 @@ #include "elf.h" #include "hw/qdev-core.h" +#include "qom/object.h" -typedef struct GenericLoaderState { +struct GenericLoaderState { /* <private> */ DeviceState parent_obj; @@ -38,7 +39,8 @@ typedef struct GenericLoaderState { bool force_raw; bool data_be; bool set_pc; -} GenericLoaderState; +}; +typedef struct GenericLoaderState GenericLoaderState; #define TYPE_GENERIC_LOADER "loader" #define GENERIC_LOADER(obj) OBJECT_CHECK(GenericLoaderState, (obj), \ diff --git a/include/hw/cpu/a15mpcore.h b/include/hw/cpu/a15mpcore.h index b423533d20..01415728d0 100644 --- a/include/hw/cpu/a15mpcore.h +++ b/include/hw/cpu/a15mpcore.h @@ -22,14 +22,16 @@ #include "hw/sysbus.h" #include "hw/intc/arm_gic.h" +#include "qom/object.h" /* A15MP private memory region. */ #define TYPE_A15MPCORE_PRIV "a15mpcore_priv" +typedef struct A15MPPrivState A15MPPrivState; #define A15MPCORE_PRIV(obj) \ OBJECT_CHECK(A15MPPrivState, (obj), TYPE_A15MPCORE_PRIV) -typedef struct A15MPPrivState { +struct A15MPPrivState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -39,6 +41,6 @@ typedef struct A15MPPrivState { MemoryRegion container; GICState gic; -} A15MPPrivState; +}; #endif diff --git a/include/hw/cpu/a9mpcore.h b/include/hw/cpu/a9mpcore.h index 5d67ca22c4..1a3b32cc4c 100644 --- a/include/hw/cpu/a9mpcore.h +++ b/include/hw/cpu/a9mpcore.h @@ -15,12 +15,14 @@ #include "hw/misc/a9scu.h" #include "hw/timer/arm_mptimer.h" #include "hw/timer/a9gtimer.h" +#include "qom/object.h" #define TYPE_A9MPCORE_PRIV "a9mpcore_priv" +typedef struct A9MPPrivState A9MPPrivState; #define A9MPCORE_PRIV(obj) \ OBJECT_CHECK(A9MPPrivState, (obj), TYPE_A9MPCORE_PRIV) -typedef struct A9MPPrivState { +struct A9MPPrivState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -34,6 +36,6 @@ typedef struct A9MPPrivState { A9GTimerState gtimer; ARMMPTimerState mptimer; ARMMPTimerState wdt; -} A9MPPrivState; +}; #endif diff --git a/include/hw/cpu/arm11mpcore.h b/include/hw/cpu/arm11mpcore.h index 6196109ca2..5a5575b86d 100644 --- a/include/hw/cpu/arm11mpcore.h +++ b/include/hw/cpu/arm11mpcore.h @@ -14,12 +14,14 @@ #include "hw/misc/arm11scu.h" #include "hw/intc/arm_gic.h" #include "hw/timer/arm_mptimer.h" +#include "qom/object.h" #define TYPE_ARM11MPCORE_PRIV "arm11mpcore_priv" +typedef struct ARM11MPCorePriveState ARM11MPCorePriveState; #define ARM11MPCORE_PRIV(obj) \ OBJECT_CHECK(ARM11MPCorePriveState, (obj), TYPE_ARM11MPCORE_PRIV) -typedef struct ARM11MPCorePriveState { +struct ARM11MPCorePriveState { SysBusDevice parent_obj; uint32_t num_cpu; @@ -30,6 +32,6 @@ typedef struct ARM11MPCorePriveState { GICState gic; ARMMPTimerState mptimer; ARMMPTimerState wdtimer; -} ARM11MPCorePriveState; +}; #endif diff --git a/include/hw/cpu/cluster.h b/include/hw/cpu/cluster.h index a616501a55..faacf9757e 100644 --- a/include/hw/cpu/cluster.h +++ b/include/hw/cpu/cluster.h @@ -21,6 +21,7 @@ #define HW_CPU_CLUSTER_H #include "hw/qdev-core.h" +#include "qom/object.h" /* * CPU Cluster type @@ -54,6 +55,7 @@ */ #define TYPE_CPU_CLUSTER "cpu-cluster" +typedef struct CPUClusterState CPUClusterState; #define CPU_CLUSTER(obj) \ OBJECT_CHECK(CPUClusterState, (obj), TYPE_CPU_CLUSTER) @@ -70,12 +72,12 @@ * * State of a CPU cluster. */ -typedef struct CPUClusterState { +struct CPUClusterState { /*< private >*/ DeviceState parent_obj; /*< public >*/ uint32_t cluster_id; -} CPUClusterState; +}; #endif diff --git a/include/hw/cpu/core.h b/include/hw/cpu/core.h index 555ad831bb..850191527e 100644 --- a/include/hw/cpu/core.h +++ b/include/hw/cpu/core.h @@ -10,20 +10,22 @@ #define HW_CPU_CORE_H #include "hw/qdev-core.h" +#include "qom/object.h" #define TYPE_CPU_CORE "cpu-core" +typedef struct CPUCore CPUCore; #define CPU_CORE(obj) \ OBJECT_CHECK(CPUCore, (obj), TYPE_CPU_CORE) -typedef struct CPUCore { +struct CPUCore { /*< private >*/ DeviceState parent_obj; /*< public >*/ int core_id; int nr_threads; -} CPUCore; +}; /* Note: topology field names need to be kept in sync with * 'CpuInstanceProperties' */ diff --git a/include/hw/display/bcm2835_fb.h b/include/hw/display/bcm2835_fb.h index 2246be74d8..5fc4d74a06 100644 --- a/include/hw/display/bcm2835_fb.h +++ b/include/hw/display/bcm2835_fb.h @@ -14,8 +14,10 @@ #include "hw/sysbus.h" #include "ui/console.h" +#include "qom/object.h" #define TYPE_BCM2835_FB "bcm2835-fb" +typedef struct BCM2835FBState BCM2835FBState; #define BCM2835_FB(obj) OBJECT_CHECK(BCM2835FBState, (obj), TYPE_BCM2835_FB) /* @@ -32,7 +34,7 @@ typedef struct { uint32_t alpha; } BCM2835FBConfig; -typedef struct { +struct BCM2835FBState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -49,7 +51,7 @@ typedef struct { BCM2835FBConfig config; BCM2835FBConfig initial_config; -} BCM2835FBState; +}; void bcm2835_fb_reconfigure(BCM2835FBState *s, BCM2835FBConfig *newconfig); diff --git a/include/hw/display/dpcd.h b/include/hw/display/dpcd.h index 6880ee36a3..6b96a463a7 100644 --- a/include/hw/display/dpcd.h +++ b/include/hw/display/dpcd.h @@ -24,6 +24,7 @@ #ifndef DPCD_H #define DPCD_H +#include "qom/object.h" typedef struct DPCDState DPCDState; diff --git a/include/hw/display/i2c-ddc.h b/include/hw/display/i2c-ddc.h index 1cf53a0c8d..8ab50641aa 100644 --- a/include/hw/display/i2c-ddc.h +++ b/include/hw/display/i2c-ddc.h @@ -21,6 +21,7 @@ #include "hw/display/edid.h" #include "hw/i2c/i2c.h" +#include "qom/object.h" /* A simple I2C slave which just returns the contents of its EDID blob. */ struct I2CDDCState { diff --git a/include/hw/display/macfb.h b/include/hw/display/macfb.h index 347871b623..d330ee9823 100644 --- a/include/hw/display/macfb.h +++ b/include/hw/display/macfb.h @@ -16,6 +16,7 @@ #include "qemu/osdep.h" #include "exec/memory.h" #include "ui/console.h" +#include "qom/object.h" typedef struct MacfbState { MemoryRegion mem_vram; @@ -31,34 +32,37 @@ typedef struct MacfbState { } MacfbState; #define TYPE_MACFB "sysbus-macfb" +typedef struct MacfbSysBusState MacfbSysBusState; #define MACFB(obj) \ OBJECT_CHECK(MacfbSysBusState, (obj), TYPE_MACFB) -typedef struct { +struct MacfbSysBusState { SysBusDevice busdev; MacfbState macfb; -} MacfbSysBusState; +}; +#define TYPE_NUBUS_MACFB "nubus-macfb" +typedef struct MacfbNubusDeviceClass MacfbNubusDeviceClass; +typedef struct MacfbNubusState MacfbNubusState; #define NUBUS_MACFB_CLASS(class) \ OBJECT_CLASS_CHECK(MacfbNubusDeviceClass, (class), TYPE_NUBUS_MACFB) #define NUBUS_MACFB_GET_CLASS(obj) \ OBJECT_GET_CLASS(MacfbNubusDeviceClass, (obj), TYPE_NUBUS_MACFB) -typedef struct MacfbNubusDeviceClass { +struct MacfbNubusDeviceClass { DeviceClass parent_class; DeviceRealize parent_realize; -} MacfbNubusDeviceClass; +}; -#define TYPE_NUBUS_MACFB "nubus-macfb" #define NUBUS_MACFB(obj) \ OBJECT_CHECK(MacfbNubusState, (obj), TYPE_NUBUS_MACFB) -typedef struct { +struct MacfbNubusState { NubusDevice busdev; MacfbState macfb; -} MacfbNubusState; +}; #endif diff --git a/include/hw/display/xlnx_dp.h b/include/hw/display/xlnx_dp.h index ab0dd250cc..f76bde2e77 100644 --- a/include/hw/display/xlnx_dp.h +++ b/include/hw/display/xlnx_dp.h @@ -34,6 +34,7 @@ #include "qemu/units.h" #include "hw/dma/xlnx_dpdma.h" #include "audio/audio.h" +#include "qom/object.h" #define AUD_CHBUF_MAX_DEPTH (32 * KiB) #define MAX_QEMU_BUFFER_SIZE (4 * KiB) @@ -48,7 +49,7 @@ struct PixmanPlane { DisplaySurface *surface; }; -typedef struct XlnxDPState { +struct XlnxDPState { /*< private >*/ SysBusDevice parent_obj; @@ -101,7 +102,8 @@ typedef struct XlnxDPState { */ DPCDState *dpcd; I2CDDCState *edid; -} XlnxDPState; +}; +typedef struct XlnxDPState XlnxDPState; #define TYPE_XLNX_DP "xlnx.v-dp" #define XLNX_DP(obj) OBJECT_CHECK(XlnxDPState, (obj), TYPE_XLNX_DP) diff --git a/include/hw/dma/bcm2835_dma.h b/include/hw/dma/bcm2835_dma.h index a6747842b7..31f335ec5b 100644 --- a/include/hw/dma/bcm2835_dma.h +++ b/include/hw/dma/bcm2835_dma.h @@ -9,6 +9,7 @@ #define BCM2835_DMA_H #include "hw/sysbus.h" +#include "qom/object.h" typedef struct { uint32_t cs; @@ -25,12 +26,13 @@ typedef struct { } BCM2835DMAChan; #define TYPE_BCM2835_DMA "bcm2835-dma" +typedef struct BCM2835DMAState BCM2835DMAState; #define BCM2835_DMA(obj) \ OBJECT_CHECK(BCM2835DMAState, (obj), TYPE_BCM2835_DMA) #define BCM2835_DMA_NCHANS 16 -typedef struct { +struct BCM2835DMAState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -42,6 +44,6 @@ typedef struct { BCM2835DMAChan chan[BCM2835_DMA_NCHANS]; uint32_t int_status; uint32_t enable; -} BCM2835DMAState; +}; #endif diff --git a/include/hw/dma/i8257.h b/include/hw/dma/i8257.h index ee06371699..46eef1f581 100644 --- a/include/hw/dma/i8257.h +++ b/include/hw/dma/i8257.h @@ -3,8 +3,10 @@ #include "hw/isa/isa.h" #include "exec/ioport.h" +#include "qom/object.h" #define TYPE_I8257 "i8257" +typedef struct I8257State I8257State; #define I8257(obj) \ OBJECT_CHECK(I8257State, (obj), TYPE_I8257) @@ -20,7 +22,7 @@ typedef struct I8257Regs { void *opaque; } I8257Regs; -typedef struct I8257State { +struct I8257State { /* <private> */ ISADevice parent_obj; @@ -43,7 +45,7 @@ typedef struct I8257State { int running; PortioList portio_page; PortioList portio_pageh; -} I8257State; +}; void i8257_dma_init(ISABus *bus, bool high_page_enable); diff --git a/include/hw/dma/pl080.h b/include/hw/dma/pl080.h index 9d4b3df143..55a645b055 100644 --- a/include/hw/dma/pl080.h +++ b/include/hw/dma/pl080.h @@ -29,6 +29,7 @@ #define HW_DMA_PL080_H #include "hw/sysbus.h" +#include "qom/object.h" #define PL080_MAX_CHANNELS 8 @@ -42,9 +43,10 @@ typedef struct { #define TYPE_PL080 "pl080" #define TYPE_PL081 "pl081" +typedef struct PL080State PL080State; #define PL080(obj) OBJECT_CHECK(PL080State, (obj), TYPE_PL080) -typedef struct PL080State { +struct PL080State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -66,6 +68,6 @@ typedef struct PL080State { MemoryRegion *downstream; AddressSpace downstream_as; -} PL080State; +}; #endif diff --git a/include/hw/dma/xlnx-zdma.h b/include/hw/dma/xlnx-zdma.h index 0b240b4c3c..8be9ee5cc2 100644 --- a/include/hw/dma/xlnx-zdma.h +++ b/include/hw/dma/xlnx-zdma.h @@ -32,6 +32,7 @@ #include "hw/sysbus.h" #include "hw/register.h" #include "sysemu/dma.h" +#include "qom/object.h" #define ZDMA_R_MAX (0x204 / 4) @@ -50,7 +51,7 @@ typedef union { uint32_t words[4]; } XlnxZDMADescr; -typedef struct XlnxZDMA { +struct XlnxZDMA { SysBusDevice parent_obj; MemoryRegion iomem; MemTxAttrs attr; @@ -74,7 +75,8 @@ typedef struct XlnxZDMA { /* We don't model the common bufs. Must be at least 16 bytes to model write only mode. */ uint8_t buf[2048]; -} XlnxZDMA; +}; +typedef struct XlnxZDMA XlnxZDMA; #define TYPE_XLNX_ZDMA "xlnx.zdma" diff --git a/include/hw/dma/xlnx-zynq-devcfg.h b/include/hw/dma/xlnx-zynq-devcfg.h index 1d3969d91f..52ba61b653 100644 --- a/include/hw/dma/xlnx-zynq-devcfg.h +++ b/include/hw/dma/xlnx-zynq-devcfg.h @@ -29,9 +29,11 @@ #include "hw/register.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_XLNX_ZYNQ_DEVCFG "xlnx.ps7-dev-cfg" +typedef struct XlnxZynqDevcfg XlnxZynqDevcfg; #define XLNX_ZYNQ_DEVCFG(obj) \ OBJECT_CHECK(XlnxZynqDevcfg, (obj), TYPE_XLNX_ZYNQ_DEVCFG) @@ -46,7 +48,7 @@ typedef struct XlnxZynqDevcfgDMACmd { uint32_t dest_len; } XlnxZynqDevcfgDMACmd; -typedef struct XlnxZynqDevcfg { +struct XlnxZynqDevcfg { SysBusDevice parent_obj; MemoryRegion iomem; @@ -57,6 +59,6 @@ typedef struct XlnxZynqDevcfg { uint32_t regs[XLNX_ZYNQ_DEVCFG_R_MAX]; RegisterInfo regs_info[XLNX_ZYNQ_DEVCFG_R_MAX]; -} XlnxZynqDevcfg; +}; #endif diff --git a/include/hw/dma/xlnx_dpdma.h b/include/hw/dma/xlnx_dpdma.h index 7a304a5bb4..50952dd7ce 100644 --- a/include/hw/dma/xlnx_dpdma.h +++ b/include/hw/dma/xlnx_dpdma.h @@ -28,6 +28,7 @@ #include "hw/sysbus.h" #include "ui/console.h" #include "sysemu/dma.h" +#include "qom/object.h" #define XLNX_DPDMA_REG_ARRAY_SIZE (0x1000 >> 2) diff --git a/include/hw/fw-path-provider.h b/include/hw/fw-path-provider.h index 10d1bd4959..1231cca63b 100644 --- a/include/hw/fw-path-provider.h +++ b/include/hw/fw-path-provider.h @@ -22,6 +22,7 @@ #define TYPE_FW_PATH_PROVIDER "fw-path-provider" +typedef struct FWPathProviderClass FWPathProviderClass; #define FW_PATH_PROVIDER_CLASS(klass) \ OBJECT_CLASS_CHECK(FWPathProviderClass, (klass), TYPE_FW_PATH_PROVIDER) #define FW_PATH_PROVIDER_GET_CLASS(obj) \ @@ -31,11 +32,11 @@ typedef struct FWPathProvider FWPathProvider; -typedef struct FWPathProviderClass { +struct FWPathProviderClass { InterfaceClass parent_class; char *(*get_dev_path)(FWPathProvider *p, BusState *bus, DeviceState *dev); -} FWPathProviderClass; +}; char *fw_path_provider_get_dev_path(FWPathProvider *p, BusState *bus, DeviceState *dev); diff --git a/include/hw/gpio/aspeed_gpio.h b/include/hw/gpio/aspeed_gpio.h index a2deac046a..4dc0bc3f3d 100644 --- a/include/hw/gpio/aspeed_gpio.h +++ b/include/hw/gpio/aspeed_gpio.h @@ -11,8 +11,11 @@ #define ASPEED_GPIO_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_GPIO "aspeed.gpio" +typedef struct AspeedGPIOClass AspeedGPIOClass; +typedef struct AspeedGPIOState AspeedGPIOState; #define ASPEED_GPIO(obj) OBJECT_CHECK(AspeedGPIOState, (obj), TYPE_ASPEED_GPIO) #define ASPEED_GPIO_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedGPIOClass, (klass), TYPE_ASPEED_GPIO) @@ -58,16 +61,16 @@ typedef struct AspeedGPIOReg { enum GPIORegType type; } AspeedGPIOReg; -typedef struct AspeedGPIOClass { +struct AspeedGPIOClass { SysBusDevice parent_obj; const GPIOSetProperties *props; uint32_t nr_gpio_pins; uint32_t nr_gpio_sets; uint32_t gap; const AspeedGPIOReg *reg_table; -} AspeedGPIOClass; +}; -typedef struct AspeedGPIOState { +struct AspeedGPIOState { /* <private> */ SysBusDevice parent; @@ -95,6 +98,6 @@ typedef struct AspeedGPIOState { uint32_t debounce_2; uint32_t input_mask; } sets[ASPEED_GPIO_MAX_NR_SETS]; -} AspeedGPIOState; +}; #endif /* _ASPEED_GPIO_H_ */ diff --git a/include/hw/gpio/bcm2835_gpio.h b/include/hw/gpio/bcm2835_gpio.h index b0de0a3c74..d8268f1461 100644 --- a/include/hw/gpio/bcm2835_gpio.h +++ b/include/hw/gpio/bcm2835_gpio.h @@ -16,8 +16,9 @@ #include "hw/sd/sd.h" #include "hw/sysbus.h" +#include "qom/object.h" -typedef struct BCM2835GpioState { +struct BCM2835GpioState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -31,7 +32,8 @@ typedef struct BCM2835GpioState { uint32_t lev0, lev1; uint8_t sd_fsel; qemu_irq out[54]; -} BCM2835GpioState; +}; +typedef struct BCM2835GpioState BCM2835GpioState; #define TYPE_BCM2835_GPIO "bcm2835_gpio" #define BCM2835_GPIO(obj) \ diff --git a/include/hw/gpio/imx_gpio.h b/include/hw/gpio/imx_gpio.h index ffab437f23..b7dc689f73 100644 --- a/include/hw/gpio/imx_gpio.h +++ b/include/hw/gpio/imx_gpio.h @@ -21,8 +21,10 @@ #define IMX_GPIO_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IMX_GPIO "imx.gpio" +typedef struct IMXGPIOState IMXGPIOState; #define IMX_GPIO(obj) OBJECT_CHECK(IMXGPIOState, (obj), TYPE_IMX_GPIO) #define IMX_GPIO_MEM_SIZE 0x20 @@ -39,7 +41,7 @@ #define IMX_GPIO_PIN_COUNT 32 -typedef struct IMXGPIOState { +struct IMXGPIOState { /*< private >*/ SysBusDevice parent_obj; @@ -58,6 +60,6 @@ typedef struct IMXGPIOState { qemu_irq irq[2]; qemu_irq output[IMX_GPIO_PIN_COUNT]; -} IMXGPIOState; +}; #endif /* IMX_GPIO_H */ diff --git a/include/hw/gpio/nrf51_gpio.h b/include/hw/gpio/nrf51_gpio.h index 1d62bbc928..0c37dd74c0 100644 --- a/include/hw/gpio/nrf51_gpio.h +++ b/include/hw/gpio/nrf51_gpio.h @@ -27,7 +27,9 @@ #define NRF51_GPIO_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_NRF51_GPIO "nrf51_soc.gpio" +typedef struct NRF51GPIOState NRF51GPIOState; #define NRF51_GPIO(obj) OBJECT_CHECK(NRF51GPIOState, (obj), TYPE_NRF51_GPIO) #define NRF51_GPIO_PINS 32 @@ -47,7 +49,7 @@ #define NRF51_GPIO_PULLDOWN 1 #define NRF51_GPIO_PULLUP 3 -typedef struct NRF51GPIOState { +struct NRF51GPIOState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -63,7 +65,7 @@ typedef struct NRF51GPIOState { uint32_t old_out_connected; qemu_irq output[NRF51_GPIO_PINS]; -} NRF51GPIOState; +}; #endif diff --git a/include/hw/hotplug.h b/include/hw/hotplug.h index 6321e292fd..6536bb01a3 100644 --- a/include/hw/hotplug.h +++ b/include/hw/hotplug.h @@ -16,6 +16,7 @@ #define TYPE_HOTPLUG_HANDLER "hotplug-handler" +typedef struct HotplugHandlerClass HotplugHandlerClass; #define HOTPLUG_HANDLER_CLASS(klass) \ OBJECT_CLASS_CHECK(HotplugHandlerClass, (klass), TYPE_HOTPLUG_HANDLER) #define HOTPLUG_HANDLER_GET_CLASS(obj) \ @@ -50,7 +51,7 @@ typedef void (*hotplug_fn)(HotplugHandler *plug_handler, * Used for device removal with devices that implement * asynchronous and synchronous (surprise) removal. */ -typedef struct HotplugHandlerClass { +struct HotplugHandlerClass { /* <private> */ InterfaceClass parent; @@ -59,7 +60,7 @@ typedef struct HotplugHandlerClass { hotplug_fn plug; hotplug_fn unplug_request; hotplug_fn unplug; -} HotplugHandlerClass; +}; /** * hotplug_handler_plug: diff --git a/include/hw/hyperv/vmbus-bridge.h b/include/hw/hyperv/vmbus-bridge.h index fe90bda01b..d090d46651 100644 --- a/include/hw/hyperv/vmbus-bridge.h +++ b/include/hw/hyperv/vmbus-bridge.h @@ -12,16 +12,18 @@ #include "hw/sysbus.h" #include "hw/hyperv/vmbus.h" +#include "qom/object.h" #define TYPE_VMBUS_BRIDGE "vmbus-bridge" -typedef struct VMBusBridge { +struct VMBusBridge { SysBusDevice parent_obj; uint8_t irq; VMBus *bus; -} VMBusBridge; +}; +typedef struct VMBusBridge VMBusBridge; #define VMBUS_BRIDGE(obj) OBJECT_CHECK(VMBusBridge, (obj), TYPE_VMBUS_BRIDGE) diff --git a/include/hw/hyperv/vmbus.h b/include/hw/hyperv/vmbus.h index cd98ec24e7..282399b8ce 100644 --- a/include/hw/hyperv/vmbus.h +++ b/include/hw/hyperv/vmbus.h @@ -16,9 +16,12 @@ #include "migration/vmstate.h" #include "hw/hyperv/vmbus-proto.h" #include "qemu/uuid.h" +#include "qom/object.h" #define TYPE_VMBUS_DEVICE "vmbus-dev" +typedef struct VMBusDevice VMBusDevice; +typedef struct VMBusDeviceClass VMBusDeviceClass; #define VMBUS_DEVICE(obj) \ OBJECT_CHECK(VMBusDevice, (obj), TYPE_VMBUS_DEVICE) #define VMBUS_DEVICE_CLASS(klass) \ @@ -44,11 +47,10 @@ typedef struct VMBusChannel VMBusChannel; * Base class for VMBus devices. Includes one or more channels. Identified by * class GUID and instance GUID. */ -typedef struct VMBusDevice VMBusDevice; typedef void(*VMBusChannelNotifyCb)(struct VMBusChannel *chan); -typedef struct VMBusDeviceClass { +struct VMBusDeviceClass { DeviceClass parent; QemuUUID classid; @@ -80,7 +82,7 @@ typedef struct VMBusDeviceClass { * side, when there's work to do with the data in the channel ring buffers. */ VMBusChannelNotifyCb chan_notify_cb; -} VMBusDeviceClass; +}; struct VMBusDevice { DeviceState parent; diff --git a/include/hw/i2c/arm_sbcon_i2c.h b/include/hw/i2c/arm_sbcon_i2c.h index 5d96507ab6..ca54867964 100644 --- a/include/hw/i2c/arm_sbcon_i2c.h +++ b/include/hw/i2c/arm_sbcon_i2c.h @@ -14,14 +14,16 @@ #include "hw/sysbus.h" #include "hw/i2c/bitbang_i2c.h" +#include "qom/object.h" #define TYPE_VERSATILE_I2C "versatile_i2c" #define TYPE_ARM_SBCON_I2C TYPE_VERSATILE_I2C +typedef struct ArmSbconI2CState ArmSbconI2CState; #define ARM_SBCON_I2C(obj) \ OBJECT_CHECK(ArmSbconI2CState, (obj), TYPE_ARM_SBCON_I2C) -typedef struct ArmSbconI2CState { +struct ArmSbconI2CState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -30,6 +32,6 @@ typedef struct ArmSbconI2CState { bitbang_i2c_interface bitbang; int out; int in; -} ArmSbconI2CState; +}; #endif /* HW_I2C_ARM_SBCON_H */ diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h index 243789ae5d..2c0198e314 100644 --- a/include/hw/i2c/aspeed_i2c.h +++ b/include/hw/i2c/aspeed_i2c.h @@ -23,11 +23,14 @@ #include "hw/i2c/i2c.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_I2C "aspeed.i2c" #define TYPE_ASPEED_2400_I2C TYPE_ASPEED_I2C "-ast2400" #define TYPE_ASPEED_2500_I2C TYPE_ASPEED_I2C "-ast2500" #define TYPE_ASPEED_2600_I2C TYPE_ASPEED_I2C "-ast2600" +typedef struct AspeedI2CClass AspeedI2CClass; +typedef struct AspeedI2CState AspeedI2CState; #define ASPEED_I2C(obj) \ OBJECT_CHECK(AspeedI2CState, (obj), TYPE_ASPEED_I2C) @@ -56,7 +59,7 @@ typedef struct AspeedI2CBus { uint32_t dma_len; } AspeedI2CBus; -typedef struct AspeedI2CState { +struct AspeedI2CState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -70,14 +73,14 @@ typedef struct AspeedI2CState { AspeedI2CBus busses[ASPEED_I2C_NR_BUSSES]; MemoryRegion *dram_mr; AddressSpace dram_as; -} AspeedI2CState; +}; #define ASPEED_I2C_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedI2CClass, (klass), TYPE_ASPEED_I2C) #define ASPEED_I2C_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedI2CClass, (obj), TYPE_ASPEED_I2C) -typedef struct AspeedI2CClass { +struct AspeedI2CClass { SysBusDeviceClass parent_class; uint8_t num_busses; @@ -91,7 +94,7 @@ typedef struct AspeedI2CClass { bool check_sram; bool has_dma; -} AspeedI2CClass; +}; I2CBus *aspeed_i2c_get_bus(AspeedI2CState *s, int busnr); diff --git a/include/hw/i2c/i2c.h b/include/hw/i2c/i2c.h index f57808851e..a22f861451 100644 --- a/include/hw/i2c/i2c.h +++ b/include/hw/i2c/i2c.h @@ -2,6 +2,7 @@ #define QEMU_I2C_H #include "hw/qdev-core.h" +#include "qom/object.h" /* The QEMU I2C implementation only supports simple transfers that complete immediately. It does not support slave devices that need to be able to @@ -18,6 +19,7 @@ enum i2c_event { typedef struct I2CSlave I2CSlave; #define TYPE_I2C_SLAVE "i2c-slave" +typedef struct I2CSlaveClass I2CSlaveClass; #define I2C_SLAVE(obj) \ OBJECT_CHECK(I2CSlave, (obj), TYPE_I2C_SLAVE) #define I2C_SLAVE_CLASS(klass) \ @@ -25,7 +27,7 @@ typedef struct I2CSlave I2CSlave; #define I2C_SLAVE_GET_CLASS(obj) \ OBJECT_GET_CLASS(I2CSlaveClass, (obj), TYPE_I2C_SLAVE) -typedef struct I2CSlaveClass { +struct I2CSlaveClass { DeviceClass parent_class; /* Master to slave. Returns non-zero for a NAK, 0 for success. */ @@ -43,7 +45,7 @@ typedef struct I2CSlaveClass { * return code is not used and should be zero. */ int (*event)(I2CSlave *s, enum i2c_event event); -} I2CSlaveClass; +}; struct I2CSlave { DeviceState qdev; diff --git a/include/hw/i2c/imx_i2c.h b/include/hw/i2c/imx_i2c.h index 7c73a1fa28..285a8f40a4 100644 --- a/include/hw/i2c/imx_i2c.h +++ b/include/hw/i2c/imx_i2c.h @@ -22,8 +22,10 @@ #define IMX_I2C_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IMX_I2C "imx.i2c" +typedef struct IMXI2CState IMXI2CState; #define IMX_I2C(obj) OBJECT_CHECK(IMXI2CState, (obj), TYPE_IMX_I2C) #define IMX_I2C_MEM_SIZE 0x14 @@ -65,7 +67,7 @@ #define ADDR_RESET 0xFF00 -typedef struct IMXI2CState { +struct IMXI2CState { /*< private >*/ SysBusDevice parent_obj; @@ -82,6 +84,6 @@ typedef struct IMXI2CState { uint16_t i2sr; uint16_t i2dr_read; uint16_t i2dr_write; -} IMXI2CState; +}; #endif /* IMX_I2C_H */ diff --git a/include/hw/i2c/microbit_i2c.h b/include/hw/i2c/microbit_i2c.h index 2bff36680c..76ffaff47a 100644 --- a/include/hw/i2c/microbit_i2c.h +++ b/include/hw/i2c/microbit_i2c.h @@ -13,6 +13,7 @@ #include "hw/sysbus.h" #include "hw/arm/nrf51.h" +#include "qom/object.h" #define NRF51_TWI_TASK_STARTRX 0x000 #define NRF51_TWI_TASK_STARTTX 0x008 @@ -26,17 +27,18 @@ #define NRF51_TWI_REG_ADDRESS 0x588 #define TYPE_MICROBIT_I2C "microbit.i2c" +typedef struct MicrobitI2CState MicrobitI2CState; #define MICROBIT_I2C(obj) \ OBJECT_CHECK(MicrobitI2CState, (obj), TYPE_MICROBIT_I2C) #define MICROBIT_I2C_NREGS (NRF51_PERIPHERAL_SIZE / sizeof(uint32_t)) -typedef struct { +struct MicrobitI2CState { SysBusDevice parent_obj; MemoryRegion iomem; uint32_t regs[MICROBIT_I2C_NREGS]; uint32_t read_idx; -} MicrobitI2CState; +}; #endif /* MICROBIT_I2C_H */ diff --git a/include/hw/i2c/ppc4xx_i2c.h b/include/hw/i2c/ppc4xx_i2c.h index f6f837fbec..3698e054b1 100644 --- a/include/hw/i2c/ppc4xx_i2c.h +++ b/include/hw/i2c/ppc4xx_i2c.h @@ -29,11 +29,13 @@ #include "hw/sysbus.h" #include "hw/i2c/bitbang_i2c.h" +#include "qom/object.h" #define TYPE_PPC4xx_I2C "ppc4xx-i2c" +typedef struct PPC4xxI2CState PPC4xxI2CState; #define PPC4xx_I2C(obj) OBJECT_CHECK(PPC4xxI2CState, (obj), TYPE_PPC4xx_I2C) -typedef struct PPC4xxI2CState { +struct PPC4xxI2CState { /*< private >*/ SysBusDevice parent_obj; @@ -57,6 +59,6 @@ typedef struct PPC4xxI2CState { uint8_t xfrcnt; uint8_t xtcntlss; uint8_t directcntl; -} PPC4xxI2CState; +}; #endif /* PPC4XX_I2C_H */ diff --git a/include/hw/i2c/smbus_slave.h b/include/hw/i2c/smbus_slave.h index ebe068304e..17f2cd2d8d 100644 --- a/include/hw/i2c/smbus_slave.h +++ b/include/hw/i2c/smbus_slave.h @@ -26,8 +26,11 @@ #define HW_SMBUS_SLAVE_H #include "hw/i2c/i2c.h" +#include "qom/object.h" #define TYPE_SMBUS_DEVICE "smbus-device" +typedef struct SMBusDevice SMBusDevice; +typedef struct SMBusDeviceClass SMBusDeviceClass; #define SMBUS_DEVICE(obj) \ OBJECT_CHECK(SMBusDevice, (obj), TYPE_SMBUS_DEVICE) #define SMBUS_DEVICE_CLASS(klass) \ @@ -35,10 +38,8 @@ #define SMBUS_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(SMBusDeviceClass, (obj), TYPE_SMBUS_DEVICE) -typedef struct SMBusDevice SMBusDevice; -typedef struct SMBusDeviceClass -{ +struct SMBusDeviceClass { I2CSlaveClass parent_class; /* @@ -67,7 +68,7 @@ typedef struct SMBusDeviceClass * return 0xff in that case. */ uint8_t (*receive_byte)(SMBusDevice *dev); -} SMBusDeviceClass; +}; #define SMBUS_DATA_MAX_LEN 34 /* command + len + 32 bytes of data. */ diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h index 2597000e03..124f1fad6f 100644 --- a/include/hw/i386/apic_internal.h +++ b/include/hw/i386/apic_internal.h @@ -25,6 +25,7 @@ #include "exec/memory.h" #include "qemu/timer.h" #include "target/i386/cpu-qom.h" +#include "qom/object.h" /* APIC Local Vector Table */ #define APIC_LVT_TIMER 0 @@ -125,6 +126,7 @@ typedef struct APICCommonState APICCommonState; #define TYPE_APIC_COMMON "apic-common" +typedef struct APICCommonClass APICCommonClass; #define APIC_COMMON(obj) \ OBJECT_CHECK(APICCommonState, (obj), TYPE_APIC_COMMON) #define APIC_COMMON_CLASS(klass) \ @@ -132,8 +134,7 @@ typedef struct APICCommonState APICCommonState; #define APIC_COMMON_GET_CLASS(obj) \ OBJECT_GET_CLASS(APICCommonClass, (obj), TYPE_APIC_COMMON) -typedef struct APICCommonClass -{ +struct APICCommonClass { DeviceClass parent_class; DeviceRealize realize; @@ -151,7 +152,7 @@ typedef struct APICCommonClass * device, but it's convenient to have it here for now. */ void (*send_msi)(MSIMessage *msi); -} APICCommonClass; +}; struct APICCommonState { /*< private >*/ diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h index a98d10b252..8fdac227f2 100644 --- a/include/hw/i386/ich9.h +++ b/include/hw/i386/ich9.h @@ -11,6 +11,7 @@ #include "hw/acpi/acpi.h" #include "hw/acpi/ich9.h" #include "hw/pci/pci_bus.h" +#include "qom/object.h" void ich9_lpc_set_irq(void *opaque, int irq_num, int level); int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx); @@ -23,10 +24,11 @@ void ich9_generate_smi(void); #define ICH9_CC_SIZE (16 * 1024) /* 16KB. Chipset configuration registers */ #define TYPE_ICH9_LPC_DEVICE "ICH9-LPC" +typedef struct ICH9LPCState ICH9LPCState; #define ICH9_LPC_DEVICE(obj) \ OBJECT_CHECK(ICH9LPCState, (obj), TYPE_ICH9_LPC_DEVICE) -typedef struct ICH9LPCState { +struct ICH9LPCState { /* ICH9 LPC PCI to ISA bridge */ PCIDevice d; @@ -77,7 +79,7 @@ typedef struct ICH9LPCState { Notifier machine_ready; qemu_irq gsi[GSI_NUM_PINS]; -} ICH9LPCState; +}; #define Q35_MASK(bit, ms_bit, ls_bit) \ ((uint##bit##_t)(((1ULL << ((ms_bit) + 1)) - 1) & ~((1ULL << ls_bit) - 1))) diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index 3870052f5f..53e5d32d54 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -24,8 +24,10 @@ #include "hw/i386/x86-iommu.h" #include "qemu/iova-tree.h" +#include "qom/object.h" #define TYPE_INTEL_IOMMU_DEVICE "intel-iommu" +typedef struct IntelIOMMUState IntelIOMMUState; #define INTEL_IOMMU_DEVICE(obj) \ OBJECT_CHECK(IntelIOMMUState, (obj), TYPE_INTEL_IOMMU_DEVICE) @@ -56,7 +58,6 @@ typedef struct VTDContextEntry VTDContextEntry; typedef struct VTDContextCacheEntry VTDContextCacheEntry; -typedef struct IntelIOMMUState IntelIOMMUState; typedef struct VTDAddressSpace VTDAddressSpace; typedef struct VTDIOTLBEntry VTDIOTLBEntry; typedef struct VTDBus VTDBus; diff --git a/include/hw/i386/ioapic_internal.h b/include/hw/i386/ioapic_internal.h index fe06938bda..29ae150727 100644 --- a/include/hw/i386/ioapic_internal.h +++ b/include/hw/i386/ioapic_internal.h @@ -25,6 +25,7 @@ #include "exec/memory.h" #include "hw/sysbus.h" #include "qemu/notify.h" +#include "qom/object.h" #define MAX_IOAPICS 1 @@ -84,6 +85,7 @@ typedef struct IOAPICCommonState IOAPICCommonState; #define TYPE_IOAPIC_COMMON "ioapic-common" +typedef struct IOAPICCommonClass IOAPICCommonClass; #define IOAPIC_COMMON(obj) \ OBJECT_CHECK(IOAPICCommonState, (obj), TYPE_IOAPIC_COMMON) #define IOAPIC_COMMON_CLASS(klass) \ @@ -91,14 +93,14 @@ typedef struct IOAPICCommonState IOAPICCommonState; #define IOAPIC_COMMON_GET_CLASS(obj) \ OBJECT_GET_CLASS(IOAPICCommonClass, (obj), TYPE_IOAPIC_COMMON) -typedef struct IOAPICCommonClass { +struct IOAPICCommonClass { SysBusDeviceClass parent_class; DeviceRealize realize; DeviceUnrealize unrealize; void (*pre_save)(IOAPICCommonState *s); void (*post_load)(IOAPICCommonState *s); -} IOAPICCommonClass; +}; struct IOAPICCommonState { SysBusDevice busdev; diff --git a/include/hw/i386/microvm.h b/include/hw/i386/microvm.h index fd34b78e0d..0556f64206 100644 --- a/include/hw/i386/microvm.h +++ b/include/hw/i386/microvm.h @@ -24,6 +24,7 @@ #include "hw/boards.h" #include "hw/i386/x86.h" +#include "qom/object.h" /* Platform virtio definitions */ #define VIRTIO_MMIO_BASE 0xfeb00000 @@ -39,13 +40,14 @@ #define MICROVM_MACHINE_OPTION_ROMS "x-option-roms" #define MICROVM_MACHINE_AUTO_KERNEL_CMDLINE "auto-kernel-cmdline" -typedef struct { +struct MicrovmMachineClass { X86MachineClass parent; HotplugHandler *(*orig_hotplug_handler)(MachineState *machine, DeviceState *dev); -} MicrovmMachineClass; +}; +typedef struct MicrovmMachineClass MicrovmMachineClass; -typedef struct { +struct MicrovmMachineState { X86MachineState parent; /* Machine type options */ @@ -58,7 +60,8 @@ typedef struct { /* Machine state */ bool kernel_cmdline_fixed; -} MicrovmMachineState; +}; +typedef struct MicrovmMachineState MicrovmMachineState; #define TYPE_MICROVM_MACHINE MACHINE_TYPE_NAME("microvm") #define MICROVM_MACHINE(obj) \ diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index fe52e165b2..602b57dc5d 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -10,6 +10,7 @@ #include "hw/acpi/acpi_dev_interface.h" #include "hw/hotplug.h" +#include "qom/object.h" #define HPET_INTCAP "hpet-intcap" @@ -76,7 +77,7 @@ struct PCMachineState { * way we can use 1GByte pages in the host. * */ -typedef struct PCMachineClass { +struct PCMachineClass { /*< private >*/ X86MachineClass parent_class; @@ -118,7 +119,8 @@ typedef struct PCMachineClass { /* use PVH to load kernels that support this feature */ bool pvh_enabled; -} PCMachineClass; +}; +typedef struct PCMachineClass PCMachineClass; #define TYPE_PC_MACHINE "generic-pc-machine" #define PC_MACHINE(obj) \ diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h index 18420ada15..dae2eab800 100644 --- a/include/hw/i386/x86-iommu.h +++ b/include/hw/i386/x86-iommu.h @@ -23,8 +23,11 @@ #include "hw/sysbus.h" #include "hw/pci/pci.h" #include "hw/pci/msi.h" +#include "qom/object.h" #define TYPE_X86_IOMMU_DEVICE ("x86-iommu") +typedef struct X86IOMMUClass X86IOMMUClass; +typedef struct X86IOMMUState X86IOMMUState; #define X86_IOMMU_DEVICE(obj) \ OBJECT_CHECK(X86IOMMUState, (obj), TYPE_X86_IOMMU_DEVICE) #define X86_IOMMU_DEVICE_CLASS(klass) \ @@ -34,8 +37,6 @@ #define X86_IOMMU_SID_INVALID (0xffff) -typedef struct X86IOMMUState X86IOMMUState; -typedef struct X86IOMMUClass X86IOMMUClass; typedef struct X86IOMMUIrq X86IOMMUIrq; typedef struct X86IOMMU_MSIMessage X86IOMMU_MSIMessage; diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index 4d9a26326d..42d46cc404 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -26,8 +26,9 @@ #include "hw/nmi.h" #include "hw/isa/isa.h" #include "hw/i386/ioapic.h" +#include "qom/object.h" -typedef struct { +struct X86MachineClass { /*< private >*/ MachineClass parent; @@ -37,9 +38,10 @@ typedef struct { bool save_tsc_khz; /* Enables contiguous-apic-ID mode */ bool compat_apic_id_mode; -} X86MachineClass; +}; +typedef struct X86MachineClass X86MachineClass; -typedef struct { +struct X86MachineState { /*< private >*/ MachineState parent; @@ -68,7 +70,8 @@ typedef struct { * will be translated to MSI messages in the address space. */ AddressSpace *ioapic_as; -} X86MachineState; +}; +typedef struct X86MachineState X86MachineState; #define X86_MACHINE_SMM "smm" #define X86_MACHINE_ACPI "acpi" diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index 41bb517047..110269f152 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -25,6 +25,7 @@ #define HW_IDE_AHCI_H #include "hw/sysbus.h" +#include "qom/object.h" typedef struct AHCIDevice AHCIDevice; @@ -60,31 +61,33 @@ int32_t ahci_get_num_ports(PCIDevice *dev); void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd); #define TYPE_SYSBUS_AHCI "sysbus-ahci" +typedef struct SysbusAHCIState SysbusAHCIState; #define SYSBUS_AHCI(obj) OBJECT_CHECK(SysbusAHCIState, (obj), TYPE_SYSBUS_AHCI) -typedef struct SysbusAHCIState { +struct SysbusAHCIState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ AHCIState ahci; uint32_t num_ports; -} SysbusAHCIState; +}; #define TYPE_ALLWINNER_AHCI "allwinner-ahci" +typedef struct AllwinnerAHCIState AllwinnerAHCIState; #define ALLWINNER_AHCI(obj) \ OBJECT_CHECK(AllwinnerAHCIState, (obj), TYPE_ALLWINNER_AHCI) #define ALLWINNER_AHCI_MMIO_OFF 0x80 #define ALLWINNER_AHCI_MMIO_SIZE 0x80 -typedef struct AllwinnerAHCIState { +struct AllwinnerAHCIState { /*< private >*/ SysbusAHCIState parent_obj; /*< public >*/ MemoryRegion mmio; uint32_t regs[ALLWINNER_AHCI_MMIO_SIZE/4]; -} AllwinnerAHCIState; +}; #endif /* HW_IDE_AHCI_H */ diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index 1a7869e85d..74ea1e324c 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -17,6 +17,7 @@ /* debug IDE devices */ #define USE_DMA_CDROM +#include "qom/object.h" typedef struct IDEBus IDEBus; typedef struct IDEDevice IDEDevice; @@ -486,6 +487,7 @@ struct IDEBus { }; #define TYPE_IDE_DEVICE "ide-device" +typedef struct IDEDeviceClass IDEDeviceClass; #define IDE_DEVICE(obj) \ OBJECT_CHECK(IDEDevice, (obj), TYPE_IDE_DEVICE) #define IDE_DEVICE_CLASS(klass) \ @@ -493,10 +495,10 @@ struct IDEBus { #define IDE_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(IDEDeviceClass, (obj), TYPE_IDE_DEVICE) -typedef struct IDEDeviceClass { +struct IDEDeviceClass { DeviceClass parent_class; void (*realize)(IDEDevice *dev, Error **errp); -} IDEDeviceClass; +}; struct IDEDevice { DeviceState qdev; diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h index dd504e5a0b..7ed1fa101d 100644 --- a/include/hw/ide/pci.h +++ b/include/hw/ide/pci.h @@ -3,6 +3,7 @@ #include "hw/ide/internal.h" #include "hw/pci/pci.h" +#include "qom/object.h" #define BM_STATUS_DMAING 0x01 #define BM_STATUS_ERROR 0x02 @@ -39,9 +40,10 @@ typedef struct BMDMAState { } BMDMAState; #define TYPE_PCI_IDE "pci-ide" +typedef struct PCIIDEState PCIIDEState; #define PCI_IDE(obj) OBJECT_CHECK(PCIIDEState, (obj), TYPE_PCI_IDE) -typedef struct PCIIDEState { +struct PCIIDEState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -52,7 +54,7 @@ typedef struct PCIIDEState { MemoryRegion bmdma_bar; MemoryRegion cmd_bar[2]; MemoryRegion data_bar[2]; -} PCIIDEState; +}; static inline IDEState *bmdma_active_if(BMDMAState *bmdma) { diff --git a/include/hw/input/adb.h b/include/hw/input/adb.h index bb75a7b1e3..ad89a21176 100644 --- a/include/hw/input/adb.h +++ b/include/hw/input/adb.h @@ -27,6 +27,7 @@ #define ADB_H #include "hw/qdev-core.h" +#include "qom/object.h" #define MAX_ADB_DEVICES 16 @@ -42,6 +43,7 @@ typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, typedef bool ADBDeviceHasData(ADBDevice *d); #define TYPE_ADB_DEVICE "adb-device" +typedef struct ADBDeviceClass ADBDeviceClass; #define ADB_DEVICE(obj) OBJECT_CHECK(ADBDevice, (obj), TYPE_ADB_DEVICE) struct ADBDevice { @@ -58,14 +60,14 @@ struct ADBDevice { #define ADB_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(ADBDeviceClass, (obj), TYPE_ADB_DEVICE) -typedef struct ADBDeviceClass { +struct ADBDeviceClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ ADBDeviceRequest *devreq; ADBDeviceHasData *devhasdata; -} ADBDeviceClass; +}; #define TYPE_ADB_BUS "apple-desktop-bus" #define ADB_BUS(obj) OBJECT_CHECK(ADBBusState, (obj), TYPE_ADB_BUS) diff --git a/include/hw/input/i8042.h b/include/hw/input/i8042.h index 4569dfddd9..d4bf584699 100644 --- a/include/hw/input/i8042.h +++ b/include/hw/input/i8042.h @@ -9,13 +9,14 @@ #define HW_INPUT_I8042_H #include "hw/isa/isa.h" +#include "qom/object.h" #define TYPE_I8042 "i8042" +typedef struct ISAKBDState ISAKBDState; #define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042) #define I8042_A20_LINE "a20" -typedef struct ISAKBDState ISAKBDState; void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, MemoryRegion *region, ram_addr_t size, diff --git a/include/hw/intc/allwinner-a10-pic.h b/include/hw/intc/allwinner-a10-pic.h index a5895401d1..692d2a88d0 100644 --- a/include/hw/intc/allwinner-a10-pic.h +++ b/include/hw/intc/allwinner-a10-pic.h @@ -2,8 +2,10 @@ #define ALLWINNER_A10_PIC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_AW_A10_PIC "allwinner-a10-pic" +typedef struct AwA10PICState AwA10PICState; #define AW_A10_PIC(obj) OBJECT_CHECK(AwA10PICState, (obj), TYPE_AW_A10_PIC) #define AW_A10_PIC_VECTOR 0 @@ -19,7 +21,7 @@ #define AW_A10_PIC_INT_NR 95 #define AW_A10_PIC_REG_NUM DIV_ROUND_UP(AW_A10_PIC_INT_NR, 32) -typedef struct AwA10PICState { +struct AwA10PICState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -37,6 +39,6 @@ typedef struct AwA10PICState { uint32_t enable[AW_A10_PIC_REG_NUM]; uint32_t mask[AW_A10_PIC_REG_NUM]; /*priority setting here*/ -} AwA10PICState; +}; #endif diff --git a/include/hw/intc/arm_gic.h b/include/hw/intc/arm_gic.h index 303b9748cb..704ef2b751 100644 --- a/include/hw/intc/arm_gic.h +++ b/include/hw/intc/arm_gic.h @@ -65,6 +65,7 @@ #define HW_ARM_GIC_H #include "arm_gic_common.h" +#include "qom/object.h" /* Number of SGI target-list bits */ #define GIC_TARGETLIST_BITS 8 @@ -72,6 +73,7 @@ #define GIC_MIN_PRIORITY_BITS 4 #define TYPE_ARM_GIC "arm_gic" +typedef struct ARMGICClass ARMGICClass; #define ARM_GIC(obj) \ OBJECT_CHECK(GICState, (obj), TYPE_ARM_GIC) #define ARM_GIC_CLASS(klass) \ @@ -79,12 +81,12 @@ #define ARM_GIC_GET_CLASS(obj) \ OBJECT_GET_CLASS(ARMGICClass, (obj), TYPE_ARM_GIC) -typedef struct ARMGICClass { +struct ARMGICClass { /*< private >*/ ARMGICCommonClass parent_class; /*< public >*/ DeviceRealize parent_realize; -} ARMGICClass; +}; #endif diff --git a/include/hw/intc/arm_gic_common.h b/include/hw/intc/arm_gic_common.h index 6e0d6b8a88..2cbde9b7a9 100644 --- a/include/hw/intc/arm_gic_common.h +++ b/include/hw/intc/arm_gic_common.h @@ -22,6 +22,7 @@ #define HW_ARM_GIC_COMMON_H #include "hw/sysbus.h" +#include "qom/object.h" /* Maximum number of possible interrupts, determined by the GIC architecture */ #define GIC_MAXIRQ 1020 @@ -61,7 +62,7 @@ typedef struct gic_irq_state { uint8_t group; } gic_irq_state; -typedef struct GICState { +struct GICState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -143,9 +144,11 @@ typedef struct GICState { bool irq_reset_nonsecure; /* configure IRQs as group 1 (NS) on reset? */ int dev_fd; /* kvm device fd if backed by kvm vgic support */ Error *migration_blocker; -} GICState; +}; +typedef struct GICState GICState; #define TYPE_ARM_GIC_COMMON "arm_gic_common" +typedef struct ARMGICCommonClass ARMGICCommonClass; #define ARM_GIC_COMMON(obj) \ OBJECT_CHECK(GICState, (obj), TYPE_ARM_GIC_COMMON) #define ARM_GIC_COMMON_CLASS(klass) \ @@ -153,14 +156,14 @@ typedef struct GICState { #define ARM_GIC_COMMON_GET_CLASS(obj) \ OBJECT_GET_CLASS(ARMGICCommonClass, (obj), TYPE_ARM_GIC_COMMON) -typedef struct ARMGICCommonClass { +struct ARMGICCommonClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ void (*pre_save)(GICState *s); void (*post_load)(GICState *s); -} ARMGICCommonClass; +}; void gic_init_irqs_and_mmio(GICState *s, qemu_irq_handler handler, const MemoryRegionOps *ops, diff --git a/include/hw/intc/arm_gicv3.h b/include/hw/intc/arm_gicv3.h index 4a6fd85e22..58e9131a33 100644 --- a/include/hw/intc/arm_gicv3.h +++ b/include/hw/intc/arm_gicv3.h @@ -13,20 +13,22 @@ #define HW_ARM_GICV3_H #include "arm_gicv3_common.h" +#include "qom/object.h" #define TYPE_ARM_GICV3 "arm-gicv3" +typedef struct ARMGICv3Class ARMGICv3Class; #define ARM_GICV3(obj) OBJECT_CHECK(GICv3State, (obj), TYPE_ARM_GICV3) #define ARM_GICV3_CLASS(klass) \ OBJECT_CLASS_CHECK(ARMGICv3Class, (klass), TYPE_ARM_GICV3) #define ARM_GICV3_GET_CLASS(obj) \ OBJECT_GET_CLASS(ARMGICv3Class, (obj), TYPE_ARM_GICV3) -typedef struct ARMGICv3Class { +struct ARMGICv3Class { /*< private >*/ ARMGICv3CommonClass parent_class; /*< public >*/ DeviceRealize parent_realize; -} ARMGICv3Class; +}; #endif diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h index 31ec9a1ae4..86fb060320 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -26,6 +26,7 @@ #include "hw/sysbus.h" #include "hw/intc/arm_gic_common.h" +#include "qom/object.h" /* * Maximum number of possible interrupts, determined by the GIC architecture. @@ -279,6 +280,7 @@ GICV3_BITMAP_ACCESSORS(level) GICV3_BITMAP_ACCESSORS(edge_trigger) #define TYPE_ARM_GICV3_COMMON "arm-gicv3-common" +typedef struct ARMGICv3CommonClass ARMGICv3CommonClass; #define ARM_GICV3_COMMON(obj) \ OBJECT_CHECK(GICv3State, (obj), TYPE_ARM_GICV3_COMMON) #define ARM_GICV3_COMMON_CLASS(klass) \ @@ -286,14 +288,14 @@ GICV3_BITMAP_ACCESSORS(edge_trigger) #define ARM_GICV3_COMMON_GET_CLASS(obj) \ OBJECT_GET_CLASS(ARMGICv3CommonClass, (obj), TYPE_ARM_GICV3_COMMON) -typedef struct ARMGICv3CommonClass { +struct ARMGICv3CommonClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ void (*pre_save)(GICv3State *s); void (*post_load)(GICv3State *s); -} ARMGICv3CommonClass; +}; void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler, const MemoryRegionOps *ops, Error **errp); diff --git a/include/hw/intc/arm_gicv3_its_common.h b/include/hw/intc/arm_gicv3_its_common.h index fd1fe64c03..03a0fa335b 100644 --- a/include/hw/intc/arm_gicv3_its_common.h +++ b/include/hw/intc/arm_gicv3_its_common.h @@ -23,6 +23,7 @@ #include "hw/sysbus.h" #include "hw/intc/arm_gicv3_common.h" +#include "qom/object.h" #define ITS_CONTROL_SIZE 0x10000 #define ITS_TRANS_SIZE 0x10000 @@ -64,6 +65,7 @@ typedef struct GICv3ITSState GICv3ITSState; void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops); #define TYPE_ARM_GICV3_ITS_COMMON "arm-gicv3-its-common" +typedef struct GICv3ITSCommonClass GICv3ITSCommonClass; #define ARM_GICV3_ITS_COMMON(obj) \ OBJECT_CHECK(GICv3ITSState, (obj), TYPE_ARM_GICV3_ITS_COMMON) #define ARM_GICV3_ITS_COMMON_CLASS(klass) \ @@ -81,6 +83,5 @@ struct GICv3ITSCommonClass { void (*post_load)(GICv3ITSState *s); }; -typedef struct GICv3ITSCommonClass GICv3ITSCommonClass; #endif diff --git a/include/hw/intc/armv7m_nvic.h b/include/hw/intc/armv7m_nvic.h index a472c9b8f0..63098822fa 100644 --- a/include/hw/intc/armv7m_nvic.h +++ b/include/hw/intc/armv7m_nvic.h @@ -13,9 +13,11 @@ #include "target/arm/cpu.h" #include "hw/sysbus.h" #include "hw/timer/armv7m_systick.h" +#include "qom/object.h" #define TYPE_NVIC "armv7m_nvic" +typedef struct NVICState NVICState; #define NVIC(obj) \ OBJECT_CHECK(NVICState, (obj), TYPE_NVIC) @@ -35,7 +37,7 @@ typedef struct VecInfo { uint8_t level; /* exceptions <=15 never set level */ } VecInfo; -typedef struct NVICState { +struct NVICState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -88,6 +90,6 @@ typedef struct NVICState { qemu_irq sysresetreq; SysTickState systick[M_REG_NUM_BANKS]; -} NVICState; +}; #endif diff --git a/include/hw/intc/aspeed_vic.h b/include/hw/intc/aspeed_vic.h index 107ff17c3b..f8844b3327 100644 --- a/include/hw/intc/aspeed_vic.h +++ b/include/hw/intc/aspeed_vic.h @@ -14,13 +14,15 @@ #define ASPEED_VIC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_VIC "aspeed.vic" +typedef struct AspeedVICState AspeedVICState; #define ASPEED_VIC(obj) OBJECT_CHECK(AspeedVICState, (obj), TYPE_ASPEED_VIC) #define ASPEED_VIC_NR_IRQS 51 -typedef struct AspeedVICState { +struct AspeedVICState { /*< private >*/ SysBusDevice parent_obj; @@ -43,6 +45,6 @@ typedef struct AspeedVICState { /* 0=low-sensitive/falling-edge, 1=high-sensitive/rising-edge */ uint64_t event; -} AspeedVICState; +}; #endif /* ASPEED_VIC_H */ diff --git a/include/hw/intc/bcm2835_ic.h b/include/hw/intc/bcm2835_ic.h index 392ded1cb3..4a9f093025 100644 --- a/include/hw/intc/bcm2835_ic.h +++ b/include/hw/intc/bcm2835_ic.h @@ -9,14 +9,16 @@ #define BCM2835_IC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_BCM2835_IC "bcm2835-ic" +typedef struct BCM2835ICState BCM2835ICState; #define BCM2835_IC(obj) OBJECT_CHECK(BCM2835ICState, (obj), TYPE_BCM2835_IC) #define BCM2835_IC_GPU_IRQ "gpu-irq" #define BCM2835_IC_ARM_IRQ "arm-irq" -typedef struct BCM2835ICState { +struct BCM2835ICState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -30,6 +32,6 @@ typedef struct BCM2835ICState { uint8_t arm_irq_level, arm_irq_enable; bool fiq_enable; uint8_t fiq_select; -} BCM2835ICState; +}; #endif diff --git a/include/hw/intc/bcm2836_control.h b/include/hw/intc/bcm2836_control.h index 2c22405686..7d8a51fc72 100644 --- a/include/hw/intc/bcm2836_control.h +++ b/include/hw/intc/bcm2836_control.h @@ -17,16 +17,18 @@ #include "hw/sysbus.h" #include "qemu/timer.h" +#include "qom/object.h" /* 4 mailboxes per core, for 16 total */ #define BCM2836_NCORES 4 #define BCM2836_MBPERCORE 4 #define TYPE_BCM2836_CONTROL "bcm2836-control" +typedef struct BCM2836ControlState BCM2836ControlState; #define BCM2836_CONTROL(obj) \ OBJECT_CHECK(BCM2836ControlState, (obj), TYPE_BCM2836_CONTROL) -typedef struct BCM2836ControlState { +struct BCM2836ControlState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -56,6 +58,6 @@ typedef struct BCM2836ControlState { /* outputs to CPU cores */ qemu_irq irq[BCM2836_NCORES]; qemu_irq fiq[BCM2836_NCORES]; -} BCM2836ControlState; +}; #endif diff --git a/include/hw/intc/heathrow_pic.h b/include/hw/intc/heathrow_pic.h index b163e27ab9..bd9fc115a8 100644 --- a/include/hw/intc/heathrow_pic.h +++ b/include/hw/intc/heathrow_pic.h @@ -27,8 +27,10 @@ #define HW_INTC_HEATHROW_PIC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_HEATHROW "heathrow" +typedef struct HeathrowState HeathrowState; #define HEATHROW(obj) OBJECT_CHECK(HeathrowState, (obj), TYPE_HEATHROW) typedef struct HeathrowPICState { @@ -38,13 +40,13 @@ typedef struct HeathrowPICState { uint32_t level_triggered; } HeathrowPICState; -typedef struct HeathrowState { +struct HeathrowState { SysBusDevice parent_obj; MemoryRegion mem; HeathrowPICState pics[2]; qemu_irq irqs[1]; -} HeathrowState; +}; #define HEATHROW_NUM_IRQS 64 diff --git a/include/hw/intc/ibex_plic.h b/include/hw/intc/ibex_plic.h index d8eb09b258..0125b36267 100644 --- a/include/hw/intc/ibex_plic.h +++ b/include/hw/intc/ibex_plic.h @@ -20,12 +20,14 @@ #define HW_IBEX_PLIC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IBEX_PLIC "ibex-plic" +typedef struct IbexPlicState IbexPlicState; #define IBEX_PLIC(obj) \ OBJECT_CHECK(IbexPlicState, (obj), TYPE_IBEX_PLIC) -typedef struct IbexPlicState { +struct IbexPlicState { /*< private >*/ SysBusDevice parent_obj; @@ -59,6 +61,6 @@ typedef struct IbexPlicState { uint32_t threshold_base; uint32_t claim_base; -} IbexPlicState; +}; #endif /* HW_IBEX_PLIC_H */ diff --git a/include/hw/intc/imx_avic.h b/include/hw/intc/imx_avic.h index 1b80769018..124f29f763 100644 --- a/include/hw/intc/imx_avic.h +++ b/include/hw/intc/imx_avic.h @@ -18,8 +18,10 @@ #define IMX_AVIC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IMX_AVIC "imx.avic" +typedef struct IMXAVICState IMXAVICState; #define IMX_AVIC(obj) OBJECT_CHECK(IMXAVICState, (obj), TYPE_IMX_AVIC) #define IMX_AVIC_NUM_IRQS 64 @@ -36,7 +38,7 @@ #define PRIO_PER_WORD (sizeof(uint32_t) * 8 / 4) #define PRIO_WORDS (IMX_AVIC_NUM_IRQS/PRIO_PER_WORD) -typedef struct IMXAVICState{ +struct IMXAVICState { /*< private >*/ SysBusDevice parent_obj; @@ -50,6 +52,6 @@ typedef struct IMXAVICState{ qemu_irq irq; qemu_irq fiq; uint32_t prio[PRIO_WORDS]; /* Priorities are 4-bits each */ -} IMXAVICState; +}; #endif /* IMX_AVIC_H */ diff --git a/include/hw/intc/imx_gpcv2.h b/include/hw/intc/imx_gpcv2.h index ed978b24bb..66befda3fd 100644 --- a/include/hw/intc/imx_gpcv2.h +++ b/include/hw/intc/imx_gpcv2.h @@ -2,19 +2,21 @@ #define IMX_GPCV2_H #include "hw/sysbus.h" +#include "qom/object.h" enum IMXGPCv2Registers { GPC_NUM = 0xE00 / sizeof(uint32_t), }; -typedef struct IMXGPCv2State { +struct IMXGPCv2State { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ MemoryRegion iomem; uint32_t regs[GPC_NUM]; -} IMXGPCv2State; +}; +typedef struct IMXGPCv2State IMXGPCv2State; #define TYPE_IMX_GPCV2 "imx-gpcv2" #define IMX_GPCV2(obj) OBJECT_CHECK(IMXGPCv2State, (obj), TYPE_IMX_GPCV2) diff --git a/include/hw/intc/intc.h b/include/hw/intc/intc.h index fb3e8e621f..b51c0ac0f4 100644 --- a/include/hw/intc/intc.h +++ b/include/hw/intc/intc.h @@ -5,6 +5,7 @@ #define TYPE_INTERRUPT_STATS_PROVIDER "intctrl" +typedef struct InterruptStatsProviderClass InterruptStatsProviderClass; #define INTERRUPT_STATS_PROVIDER_CLASS(klass) \ OBJECT_CLASS_CHECK(InterruptStatsProviderClass, (klass), \ TYPE_INTERRUPT_STATS_PROVIDER) @@ -17,7 +18,7 @@ typedef struct InterruptStatsProvider InterruptStatsProvider; -typedef struct InterruptStatsProviderClass { +struct InterruptStatsProviderClass { InterfaceClass parent; /* The returned pointer and statistics must remain valid until @@ -26,6 +27,6 @@ typedef struct InterruptStatsProviderClass { bool (*get_statistics)(InterruptStatsProvider *obj, uint64_t **irq_counts, unsigned int *nb_irqs); void (*print_info)(InterruptStatsProvider *obj, Monitor *mon); -} InterruptStatsProviderClass; +}; #endif diff --git a/include/hw/intc/mips_gic.h b/include/hw/intc/mips_gic.h index 8428287bf9..5670421e62 100644 --- a/include/hw/intc/mips_gic.h +++ b/include/hw/intc/mips_gic.h @@ -15,6 +15,7 @@ #include "hw/timer/mips_gictimer.h" #include "hw/sysbus.h" #include "cpu.h" +#include "qom/object.h" /* * GIC Specific definitions */ @@ -170,13 +171,13 @@ #define GIC_LOCAL_INT_WD 0 /* GIC watchdog */ #define TYPE_MIPS_GIC "mips-gic" +typedef struct MIPSGICState MIPSGICState; #define MIPS_GIC(obj) OBJECT_CHECK(MIPSGICState, (obj), TYPE_MIPS_GIC) /* Support up to 32 VPs and 256 IRQs */ #define GIC_MAX_VPS 32 #define GIC_MAX_INTRS 256 -typedef struct MIPSGICState MIPSGICState; typedef struct MIPSGICIRQState MIPSGICIRQState; typedef struct MIPSGICVPState MIPSGICVPState; diff --git a/include/hw/intc/realview_gic.h b/include/hw/intc/realview_gic.h index 1783ea11b9..e633992b9c 100644 --- a/include/hw/intc/realview_gic.h +++ b/include/hw/intc/realview_gic.h @@ -12,17 +12,19 @@ #include "hw/sysbus.h" #include "hw/intc/arm_gic.h" +#include "qom/object.h" #define TYPE_REALVIEW_GIC "realview_gic" +typedef struct RealViewGICState RealViewGICState; #define REALVIEW_GIC(obj) \ OBJECT_CHECK(RealViewGICState, (obj), TYPE_REALVIEW_GIC) -typedef struct RealViewGICState { +struct RealViewGICState { SysBusDevice parent_obj; MemoryRegion container; GICState gic; -} RealViewGICState; +}; #endif diff --git a/include/hw/intc/rx_icu.h b/include/hw/intc/rx_icu.h index 7176015cd9..5660cb4e7f 100644 --- a/include/hw/intc/rx_icu.h +++ b/include/hw/intc/rx_icu.h @@ -22,6 +22,7 @@ #define HW_INTC_RX_ICU_H #include "hw/sysbus.h" +#include "qom/object.h" enum TRG_MODE { TRG_LEVEL = 0, diff --git a/include/hw/intc/xlnx-pmu-iomod-intc.h b/include/hw/intc/xlnx-pmu-iomod-intc.h index 0bd118884a..fce35ac941 100644 --- a/include/hw/intc/xlnx-pmu-iomod-intc.h +++ b/include/hw/intc/xlnx-pmu-iomod-intc.h @@ -27,16 +27,18 @@ #include "hw/sysbus.h" #include "hw/register.h" +#include "qom/object.h" #define TYPE_XLNX_PMU_IO_INTC "xlnx.pmu_io_intc" +typedef struct XlnxPMUIOIntc XlnxPMUIOIntc; #define XLNX_PMU_IO_INTC(obj) \ OBJECT_CHECK(XlnxPMUIOIntc, (obj), TYPE_XLNX_PMU_IO_INTC) /* This is R_PIT3_CONTROL + 1 */ #define XLNXPMUIOINTC_R_MAX (0x78 + 1) -typedef struct XlnxPMUIOIntc { +struct XlnxPMUIOIntc { SysBusDevice parent_obj; MemoryRegion iomem; @@ -52,6 +54,6 @@ typedef struct XlnxPMUIOIntc { uint32_t regs[XLNXPMUIOINTC_R_MAX]; RegisterInfo regs_info[XLNXPMUIOINTC_R_MAX]; -} XlnxPMUIOIntc; +}; #endif /* HW_INTC_XLNX_PMU_IOMOD_INTC_H */ diff --git a/include/hw/intc/xlnx-zynqmp-ipi.h b/include/hw/intc/xlnx-zynqmp-ipi.h index 866c719c6f..9044ca5afe 100644 --- a/include/hw/intc/xlnx-zynqmp-ipi.h +++ b/include/hw/intc/xlnx-zynqmp-ipi.h @@ -27,9 +27,11 @@ #include "hw/sysbus.h" #include "hw/register.h" +#include "qom/object.h" #define TYPE_XLNX_ZYNQMP_IPI "xlnx.zynqmp_ipi" +typedef struct XlnxZynqMPIPI XlnxZynqMPIPI; #define XLNX_ZYNQMP_IPI(obj) \ OBJECT_CHECK(XlnxZynqMPIPI, (obj), TYPE_XLNX_ZYNQMP_IPI) @@ -38,7 +40,7 @@ #define NUM_IPIS 11 -typedef struct XlnxZynqMPIPI { +struct XlnxZynqMPIPI { /* Private */ SysBusDevice parent_obj; @@ -51,6 +53,6 @@ typedef struct XlnxZynqMPIPI { uint32_t regs[R_XLNX_ZYNQMP_IPI_MAX]; RegisterInfo regs_info[R_XLNX_ZYNQMP_IPI_MAX]; -} XlnxZynqMPIPI; +}; #endif /* XLNX_ZYNQMP_IPI_H */ diff --git a/include/hw/ipack/ipack.h b/include/hw/ipack/ipack.h index 1c07969bc9..ac6105ff8b 100644 --- a/include/hw/ipack/ipack.h +++ b/include/hw/ipack/ipack.h @@ -12,6 +12,7 @@ #define QEMU_IPACK_H #include "hw/qdev-core.h" +#include "qom/object.h" typedef struct IPackBus IPackBus; diff --git a/include/hw/ipmi/ipmi.h b/include/hw/ipmi/ipmi.h index c1efdaa4cb..355a8714bb 100644 --- a/include/hw/ipmi/ipmi.h +++ b/include/hw/ipmi/ipmi.h @@ -27,6 +27,7 @@ #include "exec/memory.h" #include "hw/qdev-core.h" +#include "qom/object.h" #define MAX_IPMI_MSG_SIZE 300 @@ -110,6 +111,7 @@ uint32_t ipmi_next_uuid(void); #define TYPE_IPMI_INTERFACE "ipmi-interface" #define IPMI_INTERFACE(obj) \ INTERFACE_CHECK(IPMIInterface, (obj), TYPE_IPMI_INTERFACE) +typedef struct IPMIInterfaceClass IPMIInterfaceClass; #define IPMI_INTERFACE_CLASS(class) \ OBJECT_CLASS_CHECK(IPMIInterfaceClass, (class), TYPE_IPMI_INTERFACE) #define IPMI_INTERFACE_GET_CLASS(class) \ @@ -117,7 +119,7 @@ uint32_t ipmi_next_uuid(void); typedef struct IPMIInterface IPMIInterface; -typedef struct IPMIInterfaceClass { +struct IPMIInterfaceClass { InterfaceClass parent; /* @@ -170,12 +172,14 @@ typedef struct IPMIInterfaceClass { * Return the firmware info for a device. */ void (*get_fwinfo)(struct IPMIInterface *s, IPMIFwInfo *info); -} IPMIInterfaceClass; +}; /* * Define a BMC simulator (or perhaps a connection to a real BMC) */ #define TYPE_IPMI_BMC "ipmi-bmc" +typedef struct IPMIBmc IPMIBmc; +typedef struct IPMIBmcClass IPMIBmcClass; #define IPMI_BMC(obj) \ OBJECT_CHECK(IPMIBmc, (obj), TYPE_IPMI_BMC) #define IPMI_BMC_CLASS(obj_class) \ @@ -183,15 +187,15 @@ typedef struct IPMIInterfaceClass { #define IPMI_BMC_GET_CLASS(obj) \ OBJECT_GET_CLASS(IPMIBmcClass, (obj), TYPE_IPMI_BMC) -typedef struct IPMIBmc { +struct IPMIBmc { DeviceState parent; uint8_t slave_addr; IPMIInterface *intf; -} IPMIBmc; +}; -typedef struct IPMIBmcClass { +struct IPMIBmcClass { DeviceClass parent; /* Called when the system resets to report to the bmc. */ @@ -204,7 +208,7 @@ typedef struct IPMIBmcClass { uint8_t *cmd, unsigned int cmd_len, unsigned int max_cmd_len, uint8_t msg_id); -} IPMIBmcClass; +}; /* * Add a link property to obj that points to a BMC. @@ -268,10 +272,10 @@ int ipmi_bmc_sdr_find(IPMIBmc *b, uint16_t recid, void ipmi_bmc_gen_event(IPMIBmc *b, uint8_t *evt, bool log); #define TYPE_IPMI_BMC_SIMULATOR "ipmi-bmc-sim" +typedef struct IPMIBmcSim IPMIBmcSim; #define IPMI_BMC_SIMULATOR(obj) OBJECT_CHECK(IPMIBmcSim, (obj), \ TYPE_IPMI_BMC_SIMULATOR) -typedef struct IPMIBmcSim IPMIBmcSim; typedef struct RspBuffer { uint8_t buffer[MAX_IPMI_MSG_SIZE]; diff --git a/include/hw/isa/i8259_internal.h b/include/hw/isa/i8259_internal.h index 861d70d8f8..69170df6f8 100644 --- a/include/hw/isa/i8259_internal.h +++ b/include/hw/isa/i8259_internal.h @@ -28,10 +28,12 @@ #include "hw/isa/isa.h" #include "hw/intc/intc.h" #include "hw/intc/i8259.h" +#include "qom/object.h" typedef struct PICCommonState PICCommonState; #define TYPE_PIC_COMMON "pic-common" +typedef struct PICCommonClass PICCommonClass; #define PIC_COMMON(obj) \ OBJECT_CHECK(PICCommonState, (obj), TYPE_PIC_COMMON) #define PIC_COMMON_CLASS(klass) \ @@ -39,13 +41,12 @@ typedef struct PICCommonState PICCommonState; #define PIC_COMMON_GET_CLASS(obj) \ OBJECT_GET_CLASS(PICCommonClass, (obj), TYPE_PIC_COMMON) -typedef struct PICCommonClass -{ +struct PICCommonClass { ISADeviceClass parent_class; void (*pre_save)(PICCommonState *s); void (*post_load)(PICCommonState *s); -} PICCommonClass; +}; struct PICCommonState { ISADevice parent_obj; diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 52b61eed88..c7f27d5aa9 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -6,10 +6,12 @@ #include "exec/memory.h" #include "exec/ioport.h" #include "hw/qdev-core.h" +#include "qom/object.h" #define ISA_NUM_IRQS 16 #define TYPE_ISA_DEVICE "isa-device" +typedef struct ISADeviceClass ISADeviceClass; #define ISA_DEVICE(obj) \ OBJECT_CHECK(ISADevice, (obj), TYPE_ISA_DEVICE) #define ISA_DEVICE_CLASS(klass) \ @@ -36,6 +38,7 @@ static inline uint16_t applesmc_port(void) #define TYPE_ISADMA "isa-dma" +typedef struct IsaDmaClass IsaDmaClass; #define ISADMA_CLASS(klass) \ OBJECT_CLASS_CHECK(IsaDmaClass, (klass), TYPE_ISADMA) #define ISADMA_GET_CLASS(obj) \ @@ -53,7 +56,7 @@ typedef enum { typedef int (*IsaDmaTransferHandler)(void *opaque, int nchan, int pos, int size); -typedef struct IsaDmaClass { +struct IsaDmaClass { InterfaceClass parent; bool (*has_autoinitialization)(IsaDma *obj, int nchan); @@ -65,12 +68,12 @@ typedef struct IsaDmaClass { void (*register_channel)(IsaDma *obj, int nchan, IsaDmaTransferHandler transfer_handler, void *opaque); -} IsaDmaClass; +}; -typedef struct ISADeviceClass { +struct ISADeviceClass { DeviceClass parent_class; void (*build_aml)(ISADevice *dev, Aml *scope); -} ISADeviceClass; +}; struct ISABus { /*< private >*/ diff --git a/include/hw/isa/pc87312.h b/include/hw/isa/pc87312.h index e16263d4b1..c8e98ea029 100644 --- a/include/hw/isa/pc87312.h +++ b/include/hw/isa/pc87312.h @@ -26,12 +26,14 @@ #define QEMU_PC87312_H #include "hw/isa/superio.h" +#include "qom/object.h" #define TYPE_PC87312_SUPERIO "pc87312" +typedef struct PC87312State PC87312State; #define PC87312(obj) OBJECT_CHECK(PC87312State, (obj), TYPE_PC87312_SUPERIO) -typedef struct PC87312State { +struct PC87312State { /*< private >*/ ISASuperIODevice parent_dev; /*< public >*/ @@ -49,7 +51,7 @@ typedef struct PC87312State { uint8_t selected_index; uint8_t regs[3]; -} PC87312State; +}; #endif diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h index 147cc0a7b7..c782c8b64e 100644 --- a/include/hw/isa/superio.h +++ b/include/hw/isa/superio.h @@ -12,8 +12,11 @@ #include "sysemu/sysemu.h" #include "hw/isa/isa.h" +#include "qom/object.h" #define TYPE_ISA_SUPERIO "isa-superio" +typedef struct ISASuperIOClass ISASuperIOClass; +typedef struct ISASuperIODevice ISASuperIODevice; #define ISA_SUPERIO(obj) \ OBJECT_CHECK(ISASuperIODevice, (obj), TYPE_ISA_SUPERIO) #define ISA_SUPERIO_GET_CLASS(obj) \ @@ -23,7 +26,7 @@ #define SUPERIO_MAX_SERIAL_PORTS 4 -typedef struct ISASuperIODevice { +struct ISASuperIODevice { /*< private >*/ ISADevice parent_obj; /*< public >*/ @@ -33,7 +36,7 @@ typedef struct ISASuperIODevice { ISADevice *floppy; ISADevice *kbc; ISADevice *ide; -} ISASuperIODevice; +}; typedef struct ISASuperIOFuncs { size_t count; @@ -43,7 +46,7 @@ typedef struct ISASuperIOFuncs { unsigned int (*get_dma)(ISASuperIODevice *sio, uint8_t index); } ISASuperIOFuncs; -typedef struct ISASuperIOClass { +struct ISASuperIOClass { /*< private >*/ ISADeviceClass parent_class; /*< public >*/ @@ -53,7 +56,7 @@ typedef struct ISASuperIOClass { ISASuperIOFuncs serial; ISASuperIOFuncs floppy; ISASuperIOFuncs ide; -} ISASuperIOClass; +}; #define TYPE_FDC37M81X_SUPERIO "fdc37m81x-superio" #define TYPE_SMC37C669_SUPERIO "smc37c669-superio" diff --git a/include/hw/m68k/mcf_fec.h b/include/hw/m68k/mcf_fec.h index c09e33a57c..c8ece3cb4b 100644 --- a/include/hw/m68k/mcf_fec.h +++ b/include/hw/m68k/mcf_fec.h @@ -9,6 +9,7 @@ #ifndef HW_M68K_MCF_FEC_H #define HW_M68K_MCF_FEC_H +#include "qom/object.h" #define TYPE_MCF_FEC_NET "mcf-fec" typedef struct mcf_fec_state mcf_fec_state; diff --git a/include/hw/mem/memory-device.h b/include/hw/mem/memory-device.h index 04476acb8f..d19bca5942 100644 --- a/include/hw/mem/memory-device.h +++ b/include/hw/mem/memory-device.h @@ -19,6 +19,7 @@ #define TYPE_MEMORY_DEVICE "memory-device" +typedef struct MemoryDeviceClass MemoryDeviceClass; #define MEMORY_DEVICE_CLASS(klass) \ OBJECT_CLASS_CHECK(MemoryDeviceClass, (klass), TYPE_MEMORY_DEVICE) #define MEMORY_DEVICE_GET_CLASS(obj) \ @@ -43,7 +44,7 @@ typedef struct MemoryDeviceState MemoryDeviceState; * be provided. Scattered memory regions are not supported for single * devices. */ -typedef struct MemoryDeviceClass { +struct MemoryDeviceClass { /* private */ InterfaceClass parent_class; @@ -94,7 +95,7 @@ typedef struct MemoryDeviceClass { */ void (*fill_device_info)(const MemoryDeviceState *md, MemoryDeviceInfo *info); -} MemoryDeviceClass; +}; MemoryDeviceInfoList *qmp_memory_device_list(void); uint64_t get_plugged_memory_size(void); diff --git a/include/hw/mem/nvdimm.h b/include/hw/mem/nvdimm.h index b67a1aedf6..4b4a4b5b17 100644 --- a/include/hw/mem/nvdimm.h +++ b/include/hw/mem/nvdimm.h @@ -27,6 +27,7 @@ #include "hw/acpi/bios-linker-loader.h" #include "qemu/uuid.h" #include "hw/acpi/aml-build.h" +#include "qom/object.h" #define NVDIMM_DEBUG 0 #define nvdimm_debug(fmt, ...) \ @@ -45,6 +46,8 @@ #define MIN_NAMESPACE_LABEL_SIZE (128UL << 10) #define TYPE_NVDIMM "nvdimm" +typedef struct NVDIMMClass NVDIMMClass; +typedef struct NVDIMMDevice NVDIMMDevice; #define NVDIMM(obj) OBJECT_CHECK(NVDIMMDevice, (obj), TYPE_NVDIMM) #define NVDIMM_CLASS(oc) OBJECT_CLASS_CHECK(NVDIMMClass, (oc), TYPE_NVDIMM) #define NVDIMM_GET_CLASS(obj) OBJECT_GET_CLASS(NVDIMMClass, (obj), \ @@ -92,7 +95,6 @@ struct NVDIMMDevice { */ QemuUUID uuid; }; -typedef struct NVDIMMDevice NVDIMMDevice; struct NVDIMMClass { /* private */ @@ -107,7 +109,6 @@ struct NVDIMMClass { void (*write_label_data)(NVDIMMDevice *nvdimm, const void *buf, uint64_t size, uint64_t offset); }; -typedef struct NVDIMMClass NVDIMMClass; #define NVDIMM_DSM_MEM_FILE "etc/acpi/nvdimm-mem" diff --git a/include/hw/mem/pc-dimm.h b/include/hw/mem/pc-dimm.h index 289edc0f3d..41d4ff39ba 100644 --- a/include/hw/mem/pc-dimm.h +++ b/include/hw/mem/pc-dimm.h @@ -18,8 +18,11 @@ #include "exec/memory.h" #include "hw/qdev-core.h" +#include "qom/object.h" #define TYPE_PC_DIMM "pc-dimm" +typedef struct PCDIMMDevice PCDIMMDevice; +typedef struct PCDIMMDeviceClass PCDIMMDeviceClass; #define PC_DIMM(obj) \ OBJECT_CHECK(PCDIMMDevice, (obj), TYPE_PC_DIMM) #define PC_DIMM_CLASS(oc) \ @@ -44,7 +47,7 @@ * Default value: -1, means that slot is auto-allocated. * @hostmem: host memory backend providing memory for @PCDIMMDevice */ -typedef struct PCDIMMDevice { +struct PCDIMMDevice { /* private */ DeviceState parent_obj; @@ -53,7 +56,7 @@ typedef struct PCDIMMDevice { uint32_t node; int32_t slot; HostMemoryBackend *hostmem; -} PCDIMMDevice; +}; /** * PCDIMMDeviceClass: @@ -63,7 +66,7 @@ typedef struct PCDIMMDevice { * memory of @dimm should be kept during live migration. Will not fail * after the device was realized. */ -typedef struct PCDIMMDeviceClass { +struct PCDIMMDeviceClass { /* private */ DeviceClass parent_class; @@ -71,7 +74,7 @@ typedef struct PCDIMMDeviceClass { void (*realize)(PCDIMMDevice *dimm, Error **errp); MemoryRegion *(*get_vmstate_memory_region)(PCDIMMDevice *dimm, Error **errp); -} PCDIMMDeviceClass; +}; void pc_dimm_pre_plug(PCDIMMDevice *dimm, MachineState *machine, const uint64_t *legacy_align, Error **errp); diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h index a941c55f27..ab79a66b1d 100644 --- a/include/hw/mips/cps.h +++ b/include/hw/mips/cps.h @@ -26,11 +26,13 @@ #include "hw/misc/mips_cpc.h" #include "hw/misc/mips_itu.h" #include "target/mips/cpu.h" +#include "qom/object.h" #define TYPE_MIPS_CPS "mips-cps" +typedef struct MIPSCPSState MIPSCPSState; #define MIPS_CPS(obj) OBJECT_CHECK(MIPSCPSState, (obj), TYPE_MIPS_CPS) -typedef struct MIPSCPSState { +struct MIPSCPSState { SysBusDevice parent_obj; uint32_t num_vp; @@ -42,7 +44,7 @@ typedef struct MIPSCPSState { MIPSGICState gic; MIPSCPCState cpc; MIPSITUState itu; -} MIPSCPSState; +}; qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number); diff --git a/include/hw/misc/a9scu.h b/include/hw/misc/a9scu.h index efb0c305c2..c5481f4dbb 100644 --- a/include/hw/misc/a9scu.h +++ b/include/hw/misc/a9scu.h @@ -11,10 +11,11 @@ #define HW_MISC_A9SCU_H #include "hw/sysbus.h" +#include "qom/object.h" /* A9MP private memory region. */ -typedef struct A9SCUState { +struct A9SCUState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -23,7 +24,8 @@ typedef struct A9SCUState { uint32_t control; uint32_t status; uint32_t num_cpu; -} A9SCUState; +}; +typedef struct A9SCUState A9SCUState; #define TYPE_A9_SCU "a9-scu" #define A9_SCU(obj) OBJECT_CHECK(A9SCUState, (obj), TYPE_A9_SCU) diff --git a/include/hw/misc/allwinner-cpucfg.h b/include/hw/misc/allwinner-cpucfg.h index 2c3693a8be..f5420b11d5 100644 --- a/include/hw/misc/allwinner-cpucfg.h +++ b/include/hw/misc/allwinner-cpucfg.h @@ -29,6 +29,7 @@ */ #define TYPE_AW_CPUCFG "allwinner-cpucfg" +typedef struct AwCpuCfgState AwCpuCfgState; #define AW_CPUCFG(obj) \ OBJECT_CHECK(AwCpuCfgState, (obj), TYPE_AW_CPUCFG) @@ -37,7 +38,7 @@ /** * Allwinner CPU Configuration Module instance state */ -typedef struct AwCpuCfgState { +struct AwCpuCfgState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -47,6 +48,6 @@ typedef struct AwCpuCfgState { uint32_t super_standby; uint32_t entry_addr; -} AwCpuCfgState; +}; #endif /* HW_MISC_ALLWINNER_CPUCFG_H */ diff --git a/include/hw/misc/allwinner-h3-ccu.h b/include/hw/misc/allwinner-h3-ccu.h index eec59649f3..60f0c56cd9 100644 --- a/include/hw/misc/allwinner-h3-ccu.h +++ b/include/hw/misc/allwinner-h3-ccu.h @@ -42,6 +42,7 @@ */ #define TYPE_AW_H3_CCU "allwinner-h3-ccu" +typedef struct AwH3ClockCtlState AwH3ClockCtlState; #define AW_H3_CCU(obj) \ OBJECT_CHECK(AwH3ClockCtlState, (obj), TYPE_AW_H3_CCU) @@ -50,7 +51,7 @@ /** * Allwinner H3 CCU object instance state. */ -typedef struct AwH3ClockCtlState { +struct AwH3ClockCtlState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -61,6 +62,6 @@ typedef struct AwH3ClockCtlState { /** Array of hardware registers */ uint32_t regs[AW_H3_CCU_REGS_NUM]; -} AwH3ClockCtlState; +}; #endif /* HW_MISC_ALLWINNER_H3_CCU_H */ diff --git a/include/hw/misc/allwinner-h3-dramc.h b/include/hw/misc/allwinner-h3-dramc.h index bacdf236b7..0538e598b0 100644 --- a/include/hw/misc/allwinner-h3-dramc.h +++ b/include/hw/misc/allwinner-h3-dramc.h @@ -58,6 +58,7 @@ */ #define TYPE_AW_H3_DRAMC "allwinner-h3-dramc" +typedef struct AwH3DramCtlState AwH3DramCtlState; #define AW_H3_DRAMC(obj) \ OBJECT_CHECK(AwH3DramCtlState, (obj), TYPE_AW_H3_DRAMC) @@ -66,7 +67,7 @@ /** * Allwinner H3 SDRAM Controller object instance state. */ -typedef struct AwH3DramCtlState { +struct AwH3DramCtlState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -101,6 +102,6 @@ typedef struct AwH3DramCtlState { /** @} */ -} AwH3DramCtlState; +}; #endif /* HW_MISC_ALLWINNER_H3_DRAMC_H */ diff --git a/include/hw/misc/allwinner-h3-sysctrl.h b/include/hw/misc/allwinner-h3-sysctrl.h index af4119e026..7360698f8f 100644 --- a/include/hw/misc/allwinner-h3-sysctrl.h +++ b/include/hw/misc/allwinner-h3-sysctrl.h @@ -43,6 +43,7 @@ */ #define TYPE_AW_H3_SYSCTRL "allwinner-h3-sysctrl" +typedef struct AwH3SysCtrlState AwH3SysCtrlState; #define AW_H3_SYSCTRL(obj) \ OBJECT_CHECK(AwH3SysCtrlState, (obj), TYPE_AW_H3_SYSCTRL) @@ -51,7 +52,7 @@ /** * Allwinner H3 System Control object instance state */ -typedef struct AwH3SysCtrlState { +struct AwH3SysCtrlState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -62,6 +63,6 @@ typedef struct AwH3SysCtrlState { /** Array of hardware registers */ uint32_t regs[AW_H3_SYSCTRL_REGS_NUM]; -} AwH3SysCtrlState; +}; #endif /* HW_MISC_ALLWINNER_H3_SYSCTRL_H */ diff --git a/include/hw/misc/allwinner-sid.h b/include/hw/misc/allwinner-sid.h index 4c1fa4762b..70cd7cc7c0 100644 --- a/include/hw/misc/allwinner-sid.h +++ b/include/hw/misc/allwinner-sid.h @@ -30,6 +30,7 @@ */ #define TYPE_AW_SID "allwinner-sid" +typedef struct AwSidState AwSidState; #define AW_SID(obj) \ OBJECT_CHECK(AwSidState, (obj), TYPE_AW_SID) @@ -38,7 +39,7 @@ /** * Allwinner Security ID object instance state */ -typedef struct AwSidState { +struct AwSidState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -55,6 +56,6 @@ typedef struct AwSidState { /** Stores the emulated device identifier */ QemuUUID identifier; -} AwSidState; +}; #endif /* HW_MISC_ALLWINNER_SID_H */ diff --git a/include/hw/misc/arm11scu.h b/include/hw/misc/arm11scu.h index 5ad0f3d339..7e2e6d2b44 100644 --- a/include/hw/misc/arm11scu.h +++ b/include/hw/misc/arm11scu.h @@ -12,11 +12,13 @@ #define HW_MISC_ARM11SCU_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ARM11_SCU "arm11-scu" +typedef struct ARM11SCUState ARM11SCUState; #define ARM11_SCU(obj) OBJECT_CHECK(ARM11SCUState, (obj), TYPE_ARM11_SCU) -typedef struct ARM11SCUState { +struct ARM11SCUState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -24,6 +26,6 @@ typedef struct ARM11SCUState { uint32_t control; uint32_t num_cpu; MemoryRegion iomem; -} ARM11SCUState; +}; #endif diff --git a/include/hw/misc/armsse-cpuid.h b/include/hw/misc/armsse-cpuid.h index 0ef33fcaba..290a52cf10 100644 --- a/include/hw/misc/armsse-cpuid.h +++ b/include/hw/misc/armsse-cpuid.h @@ -23,11 +23,13 @@ #define HW_MISC_ARMSSE_CPUID_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ARMSSE_CPUID "armsse-cpuid" +typedef struct ARMSSECPUID ARMSSECPUID; #define ARMSSE_CPUID(obj) OBJECT_CHECK(ARMSSECPUID, (obj), TYPE_ARMSSE_CPUID) -typedef struct ARMSSECPUID { +struct ARMSSECPUID { /*< private >*/ SysBusDevice parent_obj; @@ -36,6 +38,6 @@ typedef struct ARMSSECPUID { /* Properties */ uint32_t cpuid; -} ARMSSECPUID; +}; #endif diff --git a/include/hw/misc/armsse-mhu.h b/include/hw/misc/armsse-mhu.h index cf5d8a73e6..d1ae4a463a 100644 --- a/include/hw/misc/armsse-mhu.h +++ b/include/hw/misc/armsse-mhu.h @@ -24,11 +24,13 @@ #define HW_MISC_ARMSSE_MHU_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ARMSSE_MHU "armsse-mhu" +typedef struct ARMSSEMHU ARMSSEMHU; #define ARMSSE_MHU(obj) OBJECT_CHECK(ARMSSEMHU, (obj), TYPE_ARMSSE_MHU) -typedef struct ARMSSEMHU { +struct ARMSSEMHU { /*< private >*/ SysBusDevice parent_obj; @@ -39,6 +41,6 @@ typedef struct ARMSSEMHU { uint32_t cpu0intr; uint32_t cpu1intr; -} ARMSSEMHU; +}; #endif diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h index 9cd530afa2..feebb1baf6 100644 --- a/include/hw/misc/aspeed_scu.h +++ b/include/hw/misc/aspeed_scu.h @@ -12,8 +12,11 @@ #define ASPEED_SCU_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_SCU "aspeed.scu" +typedef struct AspeedSCUClass AspeedSCUClass; +typedef struct AspeedSCUState AspeedSCUState; #define ASPEED_SCU(obj) OBJECT_CHECK(AspeedSCUState, (obj), TYPE_ASPEED_SCU) #define TYPE_ASPEED_2400_SCU TYPE_ASPEED_SCU "-ast2400" #define TYPE_ASPEED_2500_SCU TYPE_ASPEED_SCU "-ast2500" @@ -22,7 +25,7 @@ #define ASPEED_SCU_NR_REGS (0x1A8 >> 2) #define ASPEED_AST2600_SCU_NR_REGS (0xE20 >> 2) -typedef struct AspeedSCUState { +struct AspeedSCUState { /*< private >*/ SysBusDevice parent_obj; @@ -34,7 +37,7 @@ typedef struct AspeedSCUState { uint32_t hw_strap1; uint32_t hw_strap2; uint32_t hw_prot_key; -} AspeedSCUState; +}; #define AST2400_A0_SILICON_REV 0x02000303U #define AST2400_A1_SILICON_REV 0x02010303U @@ -52,7 +55,7 @@ extern bool is_supported_silicon_rev(uint32_t silicon_rev); #define ASPEED_SCU_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedSCUClass, (obj), TYPE_ASPEED_SCU) -typedef struct AspeedSCUClass { +struct AspeedSCUClass { SysBusDeviceClass parent_class; const uint32_t *resets; @@ -60,7 +63,7 @@ typedef struct AspeedSCUClass { uint32_t apb_divider; uint32_t nr_regs; const MemoryRegionOps *ops; -} AspeedSCUClass; +}; #define ASPEED_SCU_PROT_KEY 0x1688A8A8 diff --git a/include/hw/misc/aspeed_sdmc.h b/include/hw/misc/aspeed_sdmc.h index c6226957dd..3d98817715 100644 --- a/include/hw/misc/aspeed_sdmc.h +++ b/include/hw/misc/aspeed_sdmc.h @@ -10,8 +10,11 @@ #define ASPEED_SDMC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_SDMC "aspeed.sdmc" +typedef struct AspeedSDMCClass AspeedSDMCClass; +typedef struct AspeedSDMCState AspeedSDMCState; #define ASPEED_SDMC(obj) OBJECT_CHECK(AspeedSDMCState, (obj), TYPE_ASPEED_SDMC) #define TYPE_ASPEED_2400_SDMC TYPE_ASPEED_SDMC "-ast2400" #define TYPE_ASPEED_2500_SDMC TYPE_ASPEED_SDMC "-ast2500" @@ -30,7 +33,7 @@ */ #define ASPEED_SDMC_NR_REGS (0x500 >> 2) -typedef struct AspeedSDMCState { +struct AspeedSDMCState { /*< private >*/ SysBusDevice parent_obj; @@ -40,20 +43,20 @@ typedef struct AspeedSDMCState { uint32_t regs[ASPEED_SDMC_NR_REGS]; uint64_t ram_size; uint64_t max_ram_size; -} AspeedSDMCState; +}; #define ASPEED_SDMC_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedSDMCClass, (klass), TYPE_ASPEED_SDMC) #define ASPEED_SDMC_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedSDMCClass, (obj), TYPE_ASPEED_SDMC) -typedef struct AspeedSDMCClass { +struct AspeedSDMCClass { SysBusDeviceClass parent_class; uint64_t max_ram_size; const uint64_t *valid_ram_sizes; uint32_t (*compute_conf)(AspeedSDMCState *s, uint32_t data); void (*write)(AspeedSDMCState *s, uint32_t reg, uint32_t data); -} AspeedSDMCClass; +}; #endif /* ASPEED_SDMC_H */ diff --git a/include/hw/misc/aspeed_xdma.h b/include/hw/misc/aspeed_xdma.h index 00b45d931f..e5177e2c02 100644 --- a/include/hw/misc/aspeed_xdma.h +++ b/include/hw/misc/aspeed_xdma.h @@ -10,14 +10,16 @@ #define ASPEED_XDMA_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_XDMA "aspeed.xdma" +typedef struct AspeedXDMAState AspeedXDMAState; #define ASPEED_XDMA(obj) OBJECT_CHECK(AspeedXDMAState, (obj), TYPE_ASPEED_XDMA) #define ASPEED_XDMA_NUM_REGS (ASPEED_XDMA_REG_SIZE / sizeof(uint32_t)) #define ASPEED_XDMA_REG_SIZE 0x7C -typedef struct AspeedXDMAState { +struct AspeedXDMAState { SysBusDevice parent; MemoryRegion iomem; @@ -25,6 +27,6 @@ typedef struct AspeedXDMAState { char bmc_cmdq_readp_set; uint32_t regs[ASPEED_XDMA_NUM_REGS]; -} AspeedXDMAState; +}; #endif /* ASPEED_XDMA_H */ diff --git a/include/hw/misc/auxbus.h b/include/hw/misc/auxbus.h index 041edfc9e9..f24f2fd789 100644 --- a/include/hw/misc/auxbus.h +++ b/include/hw/misc/auxbus.h @@ -27,6 +27,7 @@ #include "exec/memory.h" #include "hw/qdev-core.h" +#include "qom/object.h" typedef struct AUXBus AUXBus; typedef struct AUXSlave AUXSlave; diff --git a/include/hw/misc/avr_power.h b/include/hw/misc/avr_power.h index e08e44f629..c230a2655c 100644 --- a/include/hw/misc/avr_power.h +++ b/include/hw/misc/avr_power.h @@ -27,12 +27,14 @@ #include "hw/sysbus.h" #include "hw/hw.h" +#include "qom/object.h" #define TYPE_AVR_MASK "avr-power" +typedef struct AVRMaskState AVRMaskState; #define AVR_MASK(obj) OBJECT_CHECK(AVRMaskState, (obj), TYPE_AVR_MASK) -typedef struct { +struct AVRMaskState { /* <private> */ SysBusDevice parent_obj; @@ -41,6 +43,6 @@ typedef struct { uint8_t val; qemu_irq irq[8]; -} AVRMaskState; +}; #endif /* HW_MISC_AVR_POWER_H */ diff --git a/include/hw/misc/bcm2835_mbox.h b/include/hw/misc/bcm2835_mbox.h index 57f95cc35e..3ec6a2f0e8 100644 --- a/include/hw/misc/bcm2835_mbox.h +++ b/include/hw/misc/bcm2835_mbox.h @@ -10,8 +10,10 @@ #include "bcm2835_mbox_defs.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_BCM2835_MBOX "bcm2835-mbox" +typedef struct BCM2835MboxState BCM2835MboxState; #define BCM2835_MBOX(obj) \ OBJECT_CHECK(BCM2835MboxState, (obj), TYPE_BCM2835_MBOX) @@ -22,7 +24,7 @@ typedef struct { uint32_t config; } BCM2835Mbox; -typedef struct { +struct BCM2835MboxState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -34,6 +36,6 @@ typedef struct { bool mbox_irq_disabled; bool available[MBOX_CHAN_COUNT]; BCM2835Mbox mbox[2]; -} BCM2835MboxState; +}; #endif diff --git a/include/hw/misc/bcm2835_mphi.h b/include/hw/misc/bcm2835_mphi.h index e084314d0f..ce1c273cfb 100644 --- a/include/hw/misc/bcm2835_mphi.h +++ b/include/hw/misc/bcm2835_mphi.h @@ -19,6 +19,7 @@ #include "hw/irq.h" #include "hw/sysbus.h" +#include "qom/object.h" #define MPHI_MMIO_SIZE 0x1000 diff --git a/include/hw/misc/bcm2835_property.h b/include/hw/misc/bcm2835_property.h index b321f22499..28bf2b49b6 100644 --- a/include/hw/misc/bcm2835_property.h +++ b/include/hw/misc/bcm2835_property.h @@ -11,12 +11,14 @@ #include "hw/sysbus.h" #include "net/net.h" #include "hw/display/bcm2835_fb.h" +#include "qom/object.h" #define TYPE_BCM2835_PROPERTY "bcm2835-property" +typedef struct BCM2835PropertyState BCM2835PropertyState; #define BCM2835_PROPERTY(obj) \ OBJECT_CHECK(BCM2835PropertyState, (obj), TYPE_BCM2835_PROPERTY) -typedef struct { +struct BCM2835PropertyState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -31,6 +33,6 @@ typedef struct { uint32_t board_rev; uint32_t addr; bool pending; -} BCM2835PropertyState; +}; #endif diff --git a/include/hw/misc/bcm2835_rng.h b/include/hw/misc/bcm2835_rng.h index 41a531bce7..0921d9b3f1 100644 --- a/include/hw/misc/bcm2835_rng.h +++ b/include/hw/misc/bcm2835_rng.h @@ -11,17 +11,19 @@ #define BCM2835_RNG_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_BCM2835_RNG "bcm2835-rng" +typedef struct BCM2835RngState BCM2835RngState; #define BCM2835_RNG(obj) \ OBJECT_CHECK(BCM2835RngState, (obj), TYPE_BCM2835_RNG) -typedef struct { +struct BCM2835RngState { SysBusDevice busdev; MemoryRegion iomem; uint32_t rng_ctrl; uint32_t rng_status; -} BCM2835RngState; +}; #endif diff --git a/include/hw/misc/bcm2835_thermal.h b/include/hw/misc/bcm2835_thermal.h index c3651b27ec..2b937527eb 100644 --- a/include/hw/misc/bcm2835_thermal.h +++ b/include/hw/misc/bcm2835_thermal.h @@ -10,18 +10,20 @@ #define HW_MISC_BCM2835_THERMAL_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_BCM2835_THERMAL "bcm2835-thermal" +typedef struct Bcm2835ThermalState Bcm2835ThermalState; #define BCM2835_THERMAL(obj) \ OBJECT_CHECK(Bcm2835ThermalState, (obj), TYPE_BCM2835_THERMAL) -typedef struct { +struct Bcm2835ThermalState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ MemoryRegion iomem; uint32_t ctl; -} Bcm2835ThermalState; +}; #endif diff --git a/include/hw/misc/grlib_ahb_apb_pnp.h b/include/hw/misc/grlib_ahb_apb_pnp.h index a0f6dcfda7..427606fd6b 100644 --- a/include/hw/misc/grlib_ahb_apb_pnp.h +++ b/include/hw/misc/grlib_ahb_apb_pnp.h @@ -23,16 +23,17 @@ #ifndef GRLIB_AHB_APB_PNP_H #define GRLIB_AHB_APB_PNP_H +#include "qom/object.h" #define TYPE_GRLIB_AHB_PNP "grlib,ahbpnp" +typedef struct AHBPnp AHBPnp; #define GRLIB_AHB_PNP(obj) \ OBJECT_CHECK(AHBPnp, (obj), TYPE_GRLIB_AHB_PNP) -typedef struct AHBPnp AHBPnp; #define TYPE_GRLIB_APB_PNP "grlib,apbpnp" +typedef struct APBPnp APBPnp; #define GRLIB_APB_PNP(obj) \ OBJECT_CHECK(APBPnp, (obj), TYPE_GRLIB_APB_PNP) -typedef struct APBPnp APBPnp; void grlib_ahb_pnp_add_entry(AHBPnp *dev, uint32_t address, uint32_t mask, uint8_t vendor, uint16_t device, int slave, diff --git a/include/hw/misc/imx25_ccm.h b/include/hw/misc/imx25_ccm.h index 296321c612..8a7a9b675f 100644 --- a/include/hw/misc/imx25_ccm.h +++ b/include/hw/misc/imx25_ccm.h @@ -12,6 +12,7 @@ #define IMX25_CCM_H #include "hw/misc/imx_ccm.h" +#include "qom/object.h" #define IMX25_CCM_MPCTL_REG 0 #define IMX25_CCM_UPCTL_REG 1 @@ -63,9 +64,10 @@ CCTL_##name##_SHIFT) #define TYPE_IMX25_CCM "imx25.ccm" +typedef struct IMX25CCMState IMX25CCMState; #define IMX25_CCM(obj) OBJECT_CHECK(IMX25CCMState, (obj), TYPE_IMX25_CCM) -typedef struct IMX25CCMState { +struct IMX25CCMState { /* <private> */ IMXCCMState parent_obj; @@ -74,6 +76,6 @@ typedef struct IMX25CCMState { uint32_t reg[IMX25_CCM_MAX_REG]; -} IMX25CCMState; +}; #endif /* IMX25_CCM_H */ diff --git a/include/hw/misc/imx31_ccm.h b/include/hw/misc/imx31_ccm.h index c376fad14c..a56ee992af 100644 --- a/include/hw/misc/imx31_ccm.h +++ b/include/hw/misc/imx31_ccm.h @@ -12,6 +12,7 @@ #define IMX31_CCM_H #include "hw/misc/imx_ccm.h" +#include "qom/object.h" #define IMX31_CCM_CCMR_REG 0 #define IMX31_CCM_PDR0_REG 1 @@ -72,9 +73,10 @@ PDR0_##name##_PODF_SHIFT) #define TYPE_IMX31_CCM "imx31.ccm" +typedef struct IMX31CCMState IMX31CCMState; #define IMX31_CCM(obj) OBJECT_CHECK(IMX31CCMState, (obj), TYPE_IMX31_CCM) -typedef struct IMX31CCMState { +struct IMX31CCMState { /* <private> */ IMXCCMState parent_obj; @@ -83,6 +85,6 @@ typedef struct IMX31CCMState { uint32_t reg[IMX31_CCM_MAX_REG]; -} IMX31CCMState; +}; #endif /* IMX31_CCM_H */ diff --git a/include/hw/misc/imx6_ccm.h b/include/hw/misc/imx6_ccm.h index 80505809b4..affa13087e 100644 --- a/include/hw/misc/imx6_ccm.h +++ b/include/hw/misc/imx6_ccm.h @@ -13,6 +13,7 @@ #include "hw/misc/imx_ccm.h" #include "qemu/bitops.h" +#include "qom/object.h" #define CCM_CCR 0 #define CCM_CCDR 1 @@ -178,9 +179,10 @@ #define EXTRACT(value, name) extract32(value, name##_SHIFT, name##_LENGTH) #define TYPE_IMX6_CCM "imx6.ccm" +typedef struct IMX6CCMState IMX6CCMState; #define IMX6_CCM(obj) OBJECT_CHECK(IMX6CCMState, (obj), TYPE_IMX6_CCM) -typedef struct IMX6CCMState { +struct IMX6CCMState { /* <private> */ IMXCCMState parent_obj; @@ -192,6 +194,6 @@ typedef struct IMX6CCMState { uint32_t ccm[CCM_MAX]; uint32_t analog[CCM_ANALOG_MAX]; -} IMX6CCMState; +}; #endif /* IMX6_CCM_H */ diff --git a/include/hw/misc/imx6_src.h b/include/hw/misc/imx6_src.h index eb3640732e..f1d70ec177 100644 --- a/include/hw/misc/imx6_src.h +++ b/include/hw/misc/imx6_src.h @@ -13,6 +13,7 @@ #include "hw/sysbus.h" #include "qemu/bitops.h" +#include "qom/object.h" #define SRC_SCR 0 #define SRC_SBMR1 1 @@ -57,9 +58,10 @@ #define EXTRACT(value, name) extract32(value, name##_SHIFT, name##_LENGTH) #define TYPE_IMX6_SRC "imx6.src" +typedef struct IMX6SRCState IMX6SRCState; #define IMX6_SRC(obj) OBJECT_CHECK(IMX6SRCState, (obj), TYPE_IMX6_SRC) -typedef struct IMX6SRCState { +struct IMX6SRCState { /* <private> */ SysBusDevice parent_obj; @@ -68,6 +70,6 @@ typedef struct IMX6SRCState { uint32_t regs[SRC_MAX]; -} IMX6SRCState; +}; #endif /* IMX6_SRC_H */ diff --git a/include/hw/misc/imx6ul_ccm.h b/include/hw/misc/imx6ul_ccm.h index 377ddca244..2304c6e738 100644 --- a/include/hw/misc/imx6ul_ccm.h +++ b/include/hw/misc/imx6ul_ccm.h @@ -12,6 +12,7 @@ #include "hw/misc/imx_ccm.h" #include "qemu/bitops.h" +#include "qom/object.h" #define CCM_CCR 0 #define CCM_CCDR 1 @@ -207,9 +208,10 @@ #define CCM_ANALOG_PLL_LOCK (1 << 31); #define TYPE_IMX6UL_CCM "imx6ul.ccm" +typedef struct IMX6ULCCMState IMX6ULCCMState; #define IMX6UL_CCM(obj) OBJECT_CHECK(IMX6ULCCMState, (obj), TYPE_IMX6UL_CCM) -typedef struct IMX6ULCCMState { +struct IMX6ULCCMState { /* <private> */ IMXCCMState parent_obj; @@ -221,6 +223,6 @@ typedef struct IMX6ULCCMState { uint32_t ccm[CCM_MAX]; uint32_t analog[CCM_ANALOG_MAX]; -} IMX6ULCCMState; +}; #endif /* IMX6UL_CCM_H */ diff --git a/include/hw/misc/imx7_ccm.h b/include/hw/misc/imx7_ccm.h index 9538f37d98..9e9e58a5c2 100644 --- a/include/hw/misc/imx7_ccm.h +++ b/include/hw/misc/imx7_ccm.h @@ -14,6 +14,7 @@ #include "hw/misc/imx_ccm.h" #include "qemu/bitops.h" +#include "qom/object.h" enum IMX7AnalogRegisters { ANALOG_PLL_ARM, @@ -104,9 +105,10 @@ enum IMX7PMURegisters { }; #define TYPE_IMX7_CCM "imx7.ccm" +typedef struct IMX7CCMState IMX7CCMState; #define IMX7_CCM(obj) OBJECT_CHECK(IMX7CCMState, (obj), TYPE_IMX7_CCM) -typedef struct IMX7CCMState { +struct IMX7CCMState { /* <private> */ IMXCCMState parent_obj; @@ -114,13 +116,14 @@ typedef struct IMX7CCMState { MemoryRegion iomem; uint32_t ccm[CCM_MAX]; -} IMX7CCMState; +}; #define TYPE_IMX7_ANALOG "imx7.analog" +typedef struct IMX7AnalogState IMX7AnalogState; #define IMX7_ANALOG(obj) OBJECT_CHECK(IMX7AnalogState, (obj), TYPE_IMX7_ANALOG) -typedef struct IMX7AnalogState { +struct IMX7AnalogState { /* <private> */ IMXCCMState parent_obj; @@ -134,6 +137,6 @@ typedef struct IMX7AnalogState { uint32_t analog[ANALOG_MAX]; uint32_t pmu[PMU_MAX]; -} IMX7AnalogState; +}; #endif /* IMX7_CCM_H */ diff --git a/include/hw/misc/imx7_gpr.h b/include/hw/misc/imx7_gpr.h index e19373d274..83384ec0cc 100644 --- a/include/hw/misc/imx7_gpr.h +++ b/include/hw/misc/imx7_gpr.h @@ -14,15 +14,17 @@ #include "qemu/bitops.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IMX7_GPR "imx7.gpr" +typedef struct IMX7GPRState IMX7GPRState; #define IMX7_GPR(obj) OBJECT_CHECK(IMX7GPRState, (obj), TYPE_IMX7_GPR) -typedef struct IMX7GPRState { +struct IMX7GPRState { /* <private> */ SysBusDevice parent_obj; MemoryRegion mmio; -} IMX7GPRState; +}; #endif /* IMX7_GPR_H */ diff --git a/include/hw/misc/imx7_snvs.h b/include/hw/misc/imx7_snvs.h index 255f8f26f9..f8659acb7d 100644 --- a/include/hw/misc/imx7_snvs.h +++ b/include/hw/misc/imx7_snvs.h @@ -14,6 +14,7 @@ #include "qemu/bitops.h" #include "hw/sysbus.h" +#include "qom/object.h" enum IMX7SNVSRegisters { @@ -23,13 +24,14 @@ enum IMX7SNVSRegisters { }; #define TYPE_IMX7_SNVS "imx7.snvs" +typedef struct IMX7SNVSState IMX7SNVSState; #define IMX7_SNVS(obj) OBJECT_CHECK(IMX7SNVSState, (obj), TYPE_IMX7_SNVS) -typedef struct IMX7SNVSState { +struct IMX7SNVSState { /* <private> */ SysBusDevice parent_obj; MemoryRegion mmio; -} IMX7SNVSState; +}; #endif /* IMX7_SNVS_H */ diff --git a/include/hw/misc/imx_ccm.h b/include/hw/misc/imx_ccm.h index efdc451eb0..174248e5df 100644 --- a/include/hw/misc/imx_ccm.h +++ b/include/hw/misc/imx_ccm.h @@ -12,6 +12,7 @@ #define IMX_CCM_H #include "hw/sysbus.h" +#include "qom/object.h" #define CKIL_FREQ 32768 /* nominal 32khz clock */ @@ -27,6 +28,8 @@ #define PLL_MFN(x) (((x) & 0x3ff) << 0) #define TYPE_IMX_CCM "imx.ccm" +typedef struct IMXCCMClass IMXCCMClass; +typedef struct IMXCCMState IMXCCMState; #define IMX_CCM(obj) \ OBJECT_CHECK(IMXCCMState, (obj), TYPE_IMX_CCM) #define IMX_CCM_CLASS(klass) \ @@ -34,13 +37,13 @@ #define IMX_CCM_GET_CLASS(obj) \ OBJECT_GET_CLASS(IMXCCMClass, (obj), TYPE_IMX_CCM) -typedef struct IMXCCMState { +struct IMXCCMState { /* <private> */ SysBusDevice parent_obj; /* <public> */ -} IMXCCMState; +}; typedef enum { CLK_NONE, @@ -52,13 +55,13 @@ typedef enum { CLK_HIGH, } IMXClk; -typedef struct IMXCCMClass { +struct IMXCCMClass { /* <private> */ SysBusDeviceClass parent_class; /* <public> */ uint32_t (*get_clock_frequency)(IMXCCMState *s, IMXClk clk); -} IMXCCMClass; +}; uint32_t imx_ccm_calc_pll(uint32_t pllreg, uint32_t base_freq); diff --git a/include/hw/misc/imx_rngc.h b/include/hw/misc/imx_rngc.h index f0d2b44d4f..cd7ba8f91e 100644 --- a/include/hw/misc/imx_rngc.h +++ b/include/hw/misc/imx_rngc.h @@ -11,11 +11,13 @@ #define IMX_RNGC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IMX_RNGC "imx.rngc" +typedef struct IMXRNGCState IMXRNGCState; #define IMX_RNGC(obj) OBJECT_CHECK(IMXRNGCState, (obj), TYPE_IMX_RNGC) -typedef struct IMXRNGCState { +struct IMXRNGCState { /*< private >*/ SysBusDevice parent_obj; @@ -30,6 +32,6 @@ typedef struct IMXRNGCState { QEMUBH *self_test_bh; QEMUBH *seed_bh; qemu_irq irq; -} IMXRNGCState; +}; #endif /* IMX_RNGC_H */ diff --git a/include/hw/misc/iotkit-secctl.h b/include/hw/misc/iotkit-secctl.h index bcb0437be5..3d54d8f3de 100644 --- a/include/hw/misc/iotkit-secctl.h +++ b/include/hw/misc/iotkit-secctl.h @@ -56,8 +56,10 @@ #define IOTKIT_SECCTL_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IOTKIT_SECCTL "iotkit-secctl" +typedef struct IoTKitSecCtl IoTKitSecCtl; #define IOTKIT_SECCTL(obj) OBJECT_CHECK(IoTKitSecCtl, (obj), TYPE_IOTKIT_SECCTL) #define IOTS_APB_PPC0_NUM_PORTS 3 @@ -70,7 +72,6 @@ #define IOTS_NUM_MPC 4 #define IOTS_NUM_EXP_MSC 16 -typedef struct IoTKitSecCtl IoTKitSecCtl; /* State and IRQ lines relating to a PPC. For the * PPCs in the IoTKit not all the IRQ lines are used. diff --git a/include/hw/misc/iotkit-sysctl.h b/include/hw/misc/iotkit-sysctl.h index 601c8ecc0d..27fe6346e6 100644 --- a/include/hw/misc/iotkit-sysctl.h +++ b/include/hw/misc/iotkit-sysctl.h @@ -28,12 +28,14 @@ #define HW_MISC_IOTKIT_SYSCTL_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IOTKIT_SYSCTL "iotkit-sysctl" +typedef struct IoTKitSysCtl IoTKitSysCtl; #define IOTKIT_SYSCTL(obj) OBJECT_CHECK(IoTKitSysCtl, (obj), \ TYPE_IOTKIT_SYSCTL) -typedef struct IoTKitSysCtl { +struct IoTKitSysCtl { /*< private >*/ SysBusDevice parent_obj; @@ -67,6 +69,6 @@ typedef struct IoTKitSysCtl { uint32_t initsvtor1_rst; bool is_sse200; -} IoTKitSysCtl; +}; #endif diff --git a/include/hw/misc/iotkit-sysinfo.h b/include/hw/misc/iotkit-sysinfo.h index d84eb203b9..e0e610c75c 100644 --- a/include/hw/misc/iotkit-sysinfo.h +++ b/include/hw/misc/iotkit-sysinfo.h @@ -23,12 +23,14 @@ #define HW_MISC_IOTKIT_SYSINFO_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_IOTKIT_SYSINFO "iotkit-sysinfo" +typedef struct IoTKitSysInfo IoTKitSysInfo; #define IOTKIT_SYSINFO(obj) OBJECT_CHECK(IoTKitSysInfo, (obj), \ TYPE_IOTKIT_SYSINFO) -typedef struct IoTKitSysInfo { +struct IoTKitSysInfo { /*< private >*/ SysBusDevice parent_obj; @@ -38,6 +40,6 @@ typedef struct IoTKitSysInfo { /* Properties */ uint32_t sys_version; uint32_t sys_config; -} IoTKitSysInfo; +}; #endif diff --git a/include/hw/misc/mac_via.h b/include/hw/misc/mac_via.h index 0be05d649b..a59750634f 100644 --- a/include/hw/misc/mac_via.h +++ b/include/hw/misc/mac_via.h @@ -12,6 +12,7 @@ #include "exec/memory.h" #include "hw/sysbus.h" #include "hw/misc/mos6522.h" +#include "qom/object.h" /* VIA 1 */ @@ -31,10 +32,11 @@ #define TYPE_MOS6522_Q800_VIA1 "mos6522-q800-via1" +typedef struct MOS6522Q800VIA1State MOS6522Q800VIA1State; #define MOS6522_Q800_VIA1(obj) OBJECT_CHECK(MOS6522Q800VIA1State, (obj), \ TYPE_MOS6522_Q800_VIA1) -typedef struct MOS6522Q800VIA1State { +struct MOS6522Q800VIA1State { /*< private >*/ MOS6522State parent_obj; @@ -47,7 +49,7 @@ typedef struct MOS6522Q800VIA1State { int64_t next_second; QEMUTimer *VBL_timer; int64_t next_VBL; -} MOS6522Q800VIA1State; +}; /* VIA 2 */ @@ -66,19 +68,21 @@ typedef struct MOS6522Q800VIA1State { #define VIA2_IRQ_ASC (1 << VIA2_IRQ_ASC_BIT) #define TYPE_MOS6522_Q800_VIA2 "mos6522-q800-via2" +typedef struct MOS6522Q800VIA2State MOS6522Q800VIA2State; #define MOS6522_Q800_VIA2(obj) OBJECT_CHECK(MOS6522Q800VIA2State, (obj), \ TYPE_MOS6522_Q800_VIA2) -typedef struct MOS6522Q800VIA2State { +struct MOS6522Q800VIA2State { /*< private >*/ MOS6522State parent_obj; -} MOS6522Q800VIA2State; +}; #define TYPE_MAC_VIA "mac_via" +typedef struct MacVIAState MacVIAState; #define MAC_VIA(obj) OBJECT_CHECK(MacVIAState, (obj), TYPE_MAC_VIA) -typedef struct MacVIAState { +struct MacVIAState { SysBusDevice busdev; VMChangeStateEntry *vmstate; @@ -113,6 +117,6 @@ typedef struct MacVIAState { uint8_t adb_data_in[128]; uint8_t adb_data_out[16]; uint8_t adb_autopoll_cmd; -} MacVIAState; +}; #endif diff --git a/include/hw/misc/macio/cuda.h b/include/hw/misc/macio/cuda.h index a8cf0be1ec..f2b0069262 100644 --- a/include/hw/misc/macio/cuda.h +++ b/include/hw/misc/macio/cuda.h @@ -27,6 +27,7 @@ #define CUDA_H #include "hw/misc/mos6522.h" +#include "qom/object.h" /* CUDA commands (2nd byte) */ #define CUDA_WARM_START 0x0 @@ -58,10 +59,11 @@ /* MOS6522 CUDA */ -typedef struct MOS6522CUDAState { +struct MOS6522CUDAState { /*< private >*/ MOS6522State parent_obj; -} MOS6522CUDAState; +}; +typedef struct MOS6522CUDAState MOS6522CUDAState; #define TYPE_MOS6522_CUDA "mos6522-cuda" #define MOS6522_CUDA(obj) OBJECT_CHECK(MOS6522CUDAState, (obj), \ @@ -69,9 +71,10 @@ typedef struct MOS6522CUDAState { /* Cuda */ #define TYPE_CUDA "cuda" +typedef struct CUDAState CUDAState; #define CUDA(obj) OBJECT_CHECK(CUDAState, (obj), TYPE_CUDA) -typedef struct CUDAState { +struct CUDAState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -97,6 +100,6 @@ typedef struct CUDAState { qemu_irq irq; uint8_t data_in[128]; uint8_t data_out[16]; -} CUDAState; +}; #endif /* CUDA_H */ diff --git a/include/hw/misc/macio/gpio.h b/include/hw/misc/macio/gpio.h index 24a4364b39..2234873250 100644 --- a/include/hw/misc/macio/gpio.h +++ b/include/hw/misc/macio/gpio.h @@ -28,11 +28,13 @@ #include "hw/ppc/openpic.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_MACIO_GPIO "macio-gpio" +typedef struct MacIOGPIOState MacIOGPIOState; #define MACIO_GPIO(obj) OBJECT_CHECK(MacIOGPIOState, (obj), TYPE_MACIO_GPIO) -typedef struct MacIOGPIOState { +struct MacIOGPIOState { /*< private >*/ SysBusDevice parent; /*< public >*/ @@ -43,7 +45,7 @@ typedef struct MacIOGPIOState { qemu_irq gpio_extirqs[10]; uint8_t gpio_levels[8]; uint8_t gpio_regs[36]; /* XXX Check count */ -} MacIOGPIOState; +}; void macio_set_gpio(MacIOGPIOState *s, uint32_t gpio, bool state); diff --git a/include/hw/misc/macio/macio.h b/include/hw/misc/macio/macio.h index 87335a991c..81c28eeef7 100644 --- a/include/hw/misc/macio/macio.h +++ b/include/hw/misc/macio/macio.h @@ -36,21 +36,24 @@ #include "hw/ppc/mac.h" #include "hw/ppc/mac_dbdma.h" #include "hw/ppc/openpic.h" +#include "qom/object.h" /* MacIO virtual bus */ #define TYPE_MACIO_BUS "macio-bus" +typedef struct MacIOBusState MacIOBusState; #define MACIO_BUS(obj) OBJECT_CHECK(MacIOBusState, (obj), TYPE_MACIO_BUS) -typedef struct MacIOBusState { +struct MacIOBusState { /*< private >*/ BusState parent_obj; -} MacIOBusState; +}; /* MacIO IDE */ #define TYPE_MACIO_IDE "macio-ide" +typedef struct MACIOIDEState MACIOIDEState; #define MACIO_IDE(obj) OBJECT_CHECK(MACIOIDEState, (obj), TYPE_MACIO_IDE) -typedef struct MACIOIDEState { +struct MACIOIDEState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -68,15 +71,16 @@ typedef struct MACIOIDEState { bool dma_active; uint32_t timing_reg; uint32_t irq_reg; -} MACIOIDEState; +}; void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table); void macio_ide_register_dma(MACIOIDEState *ide); #define TYPE_MACIO "macio" +typedef struct MacIOState MacIOState; #define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO) -typedef struct MacIOState { +struct MacIOState { /*< private >*/ PCIDevice parent; /*< public >*/ @@ -88,13 +92,14 @@ typedef struct MacIOState { DBDMAState dbdma; ESCCState escc; uint64_t frequency; -} MacIOState; +}; #define TYPE_OLDWORLD_MACIO "macio-oldworld" +typedef struct OldWorldMacIOState OldWorldMacIOState; #define OLDWORLD_MACIO(obj) \ OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO) -typedef struct OldWorldMacIOState { +struct OldWorldMacIOState { /*< private >*/ MacIOState parent_obj; /*< public >*/ @@ -103,13 +108,14 @@ typedef struct OldWorldMacIOState { MacIONVRAMState nvram; MACIOIDEState ide[2]; -} OldWorldMacIOState; +}; #define TYPE_NEWWORLD_MACIO "macio-newworld" +typedef struct NewWorldMacIOState NewWorldMacIOState; #define NEWWORLD_MACIO(obj) \ OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO) -typedef struct NewWorldMacIOState { +struct NewWorldMacIOState { /*< private >*/ MacIOState parent_obj; /*< public >*/ @@ -119,6 +125,6 @@ typedef struct NewWorldMacIOState { OpenPICState *pic; MACIOIDEState ide[2]; MacIOGPIOState gpio; -} NewWorldMacIOState; +}; #endif /* MACIO_H */ diff --git a/include/hw/misc/macio/pmu.h b/include/hw/misc/macio/pmu.h index 72f75612b6..b3982f6f32 100644 --- a/include/hw/misc/macio/pmu.h +++ b/include/hw/misc/macio/pmu.h @@ -12,6 +12,7 @@ #include "hw/misc/mos6522.h" #include "hw/misc/macio/gpio.h" +#include "qom/object.h" /* * PMU commands @@ -173,10 +174,11 @@ typedef enum { } PMUCmdState; /* MOS6522 PMU */ -typedef struct MOS6522PMUState { +struct MOS6522PMUState { /*< private >*/ MOS6522State parent_obj; -} MOS6522PMUState; +}; +typedef struct MOS6522PMUState MOS6522PMUState; #define TYPE_MOS6522_PMU "mos6522-pmu" #define MOS6522_PMU(obj) OBJECT_CHECK(MOS6522PMUState, (obj), \ @@ -186,7 +188,7 @@ typedef struct MOS6522PMUState { * @last_b: last value of B register */ -typedef struct PMUState { +struct PMUState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -228,7 +230,8 @@ typedef struct PMUState { /* GPIO */ MacIOGPIOState *gpio; -} PMUState; +}; +typedef struct PMUState PMUState; #define TYPE_VIA_PMU "via-pmu" #define VIA_PMU(obj) OBJECT_CHECK(PMUState, (obj), TYPE_VIA_PMU) diff --git a/include/hw/misc/max111x.h b/include/hw/misc/max111x.h index af7f1017ef..e903a1af9c 100644 --- a/include/hw/misc/max111x.h +++ b/include/hw/misc/max111x.h @@ -14,6 +14,7 @@ #define HW_MISC_MAX111X_H #include "hw/ssi/ssi.h" +#include "qom/object.h" /* * This is a model of the Maxim MAX1110/1111 ADC chip, which for QEMU @@ -31,7 +32,7 @@ * + the interrupt line is not correctly implemented, and will never * be lowered once it has been asserted. */ -typedef struct { +struct MAX111xState { SSISlave parent_obj; qemu_irq interrupt; @@ -43,7 +44,8 @@ typedef struct { uint8_t input[8]; int inputs, com; -} MAX111xState; +}; +typedef struct MAX111xState MAX111xState; #define TYPE_MAX_111X "max111x" diff --git a/include/hw/misc/mips_cmgcr.h b/include/hw/misc/mips_cmgcr.h index 3e6e223273..a334be8edd 100644 --- a/include/hw/misc/mips_cmgcr.h +++ b/include/hw/misc/mips_cmgcr.h @@ -11,8 +11,10 @@ #define MIPS_CMGCR_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_MIPS_GCR "mips-gcr" +typedef struct MIPSGCRState MIPSGCRState; #define MIPS_GCR(obj) OBJECT_CHECK(MIPSGCRState, (obj), TYPE_MIPS_GCR) #define GCR_BASE_ADDR 0x1fbf8000ULL @@ -70,7 +72,6 @@ struct MIPSGCRVPState { uint64_t reset_base; }; -typedef struct MIPSGCRState MIPSGCRState; struct MIPSGCRState { SysBusDevice parent_obj; diff --git a/include/hw/misc/mips_cpc.h b/include/hw/misc/mips_cpc.h index 3f670578b0..b0131e4a54 100644 --- a/include/hw/misc/mips_cpc.h +++ b/include/hw/misc/mips_cpc.h @@ -21,6 +21,7 @@ #define MIPS_CPC_H #include "hw/sysbus.h" +#include "qom/object.h" #define CPC_ADDRSPACE_SZ 0x6000 @@ -34,9 +35,10 @@ #define CPC_VP_RUNNING_OFS 0x30 #define TYPE_MIPS_CPC "mips-cpc" +typedef struct MIPSCPCState MIPSCPCState; #define MIPS_CPC(obj) OBJECT_CHECK(MIPSCPCState, (obj), TYPE_MIPS_CPC) -typedef struct MIPSCPCState { +struct MIPSCPCState { SysBusDevice parent_obj; uint32_t num_vp; @@ -44,6 +46,6 @@ typedef struct MIPSCPCState { MemoryRegion mr; uint64_t vp_running; /* Indicates which VPs are in the run state */ -} MIPSCPCState; +}; #endif /* MIPS_CPC_H */ diff --git a/include/hw/misc/mips_itu.h b/include/hw/misc/mips_itu.h index c44e7672b6..9ddb04708a 100644 --- a/include/hw/misc/mips_itu.h +++ b/include/hw/misc/mips_itu.h @@ -21,8 +21,10 @@ #define MIPS_ITU_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_MIPS_ITU "mips-itu" +typedef struct MIPSITUState MIPSITUState; #define MIPS_ITU(obj) OBJECT_CHECK(MIPSITUState, (obj), TYPE_MIPS_ITU) #define ITC_CELL_DEPTH_SHIFT 2 @@ -51,7 +53,7 @@ typedef struct ITCStorageCell { #define ITC_ADDRESSMAP_NUM 2 -typedef struct MIPSITUState { +struct MIPSITUState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -74,7 +76,7 @@ typedef struct MIPSITUState { bool saar_present; void *saar; -} MIPSITUState; +}; /* Get ITC Configuration Tag memory region. */ MemoryRegion *mips_itu_get_tag_region(MIPSITUState *itu); diff --git a/include/hw/misc/mos6522.h b/include/hw/misc/mos6522.h index 6b25ffd439..b099814879 100644 --- a/include/hw/misc/mos6522.h +++ b/include/hw/misc/mos6522.h @@ -30,6 +30,7 @@ #include "exec/memory.h" #include "hw/sysbus.h" #include "hw/input/adb.h" +#include "qom/object.h" /* Bits in ACR */ #define SR_CTRL 0x1c /* Shift register control bits */ @@ -99,7 +100,7 @@ typedef struct MOS6522Timer { * @last_b: last value of B register * @last_acr: last value of ACR register */ -typedef struct MOS6522State { +struct MOS6522State { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -120,12 +121,14 @@ typedef struct MOS6522State { uint64_t frequency; qemu_irq irq; -} MOS6522State; +}; +typedef struct MOS6522State MOS6522State; #define TYPE_MOS6522 "mos6522" +typedef struct MOS6522DeviceClass MOS6522DeviceClass; #define MOS6522(obj) OBJECT_CHECK(MOS6522State, (obj), TYPE_MOS6522) -typedef struct MOS6522DeviceClass { +struct MOS6522DeviceClass { DeviceClass parent_class; DeviceReset parent_reset; @@ -138,7 +141,7 @@ typedef struct MOS6522DeviceClass { uint64_t (*get_timer2_counter_value)(MOS6522State *dev, MOS6522Timer *ti); uint64_t (*get_timer1_load_time)(MOS6522State *dev, MOS6522Timer *ti); uint64_t (*get_timer2_load_time)(MOS6522State *dev, MOS6522Timer *ti); -} MOS6522DeviceClass; +}; #define MOS6522_CLASS(cls) \ OBJECT_CLASS_CHECK(MOS6522DeviceClass, (cls), TYPE_MOS6522) diff --git a/include/hw/misc/mps2-fpgaio.h b/include/hw/misc/mps2-fpgaio.h index 69e265cd4b..e844041bb0 100644 --- a/include/hw/misc/mps2-fpgaio.h +++ b/include/hw/misc/mps2-fpgaio.h @@ -22,11 +22,13 @@ #define MPS2_FPGAIO_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_MPS2_FPGAIO "mps2-fpgaio" +typedef struct MPS2FPGAIO MPS2FPGAIO; #define MPS2_FPGAIO(obj) OBJECT_CHECK(MPS2FPGAIO, (obj), TYPE_MPS2_FPGAIO) -typedef struct { +struct MPS2FPGAIO { /*< private >*/ SysBusDevice parent_obj; @@ -48,6 +50,6 @@ typedef struct { /* These hold the CLOCK_VIRTUAL ns tick when the CLK1HZ/CLK100HZ was zero */ int64_t clk1hz_tick_offset; int64_t clk100hz_tick_offset; -} MPS2FPGAIO; +}; #endif diff --git a/include/hw/misc/mps2-scc.h b/include/hw/misc/mps2-scc.h index 7045473788..10393c4e3a 100644 --- a/include/hw/misc/mps2-scc.h +++ b/include/hw/misc/mps2-scc.h @@ -13,13 +13,15 @@ #define MPS2_SCC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_MPS2_SCC "mps2-scc" +typedef struct MPS2SCC MPS2SCC; #define MPS2_SCC(obj) OBJECT_CHECK(MPS2SCC, (obj), TYPE_MPS2_SCC) #define NUM_OSCCLK 3 -typedef struct { +struct MPS2SCC { /*< private >*/ SysBusDevice parent_obj; @@ -38,6 +40,6 @@ typedef struct { uint32_t id; uint32_t oscclk[NUM_OSCCLK]; uint32_t oscclk_reset[NUM_OSCCLK]; -} MPS2SCC; +}; #endif diff --git a/include/hw/misc/msf2-sysreg.h b/include/hw/misc/msf2-sysreg.h index 5993f67b4e..6b5d03608a 100644 --- a/include/hw/misc/msf2-sysreg.h +++ b/include/hw/misc/msf2-sysreg.h @@ -26,6 +26,7 @@ #define HW_MSF2_SYSREG_H #include "hw/sysbus.h" +#include "qom/object.h" enum { ESRAM_CR = 0x00 / 4, @@ -61,9 +62,10 @@ enum { #define MSF2_SYSREG_MMIO_SIZE 0x300 #define TYPE_MSF2_SYSREG "msf2-sysreg" +typedef struct MSF2SysregState MSF2SysregState; #define MSF2_SYSREG(obj) OBJECT_CHECK(MSF2SysregState, (obj), TYPE_MSF2_SYSREG) -typedef struct MSF2SysregState { +struct MSF2SysregState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -72,6 +74,6 @@ typedef struct MSF2SysregState { uint8_t apb1div; uint32_t regs[MSF2_SYSREG_MMIO_SIZE / 4]; -} MSF2SysregState; +}; #endif /* HW_MSF2_SYSREG_H */ diff --git a/include/hw/misc/nrf51_rng.h b/include/hw/misc/nrf51_rng.h index b0133bf665..247f167100 100644 --- a/include/hw/misc/nrf51_rng.h +++ b/include/hw/misc/nrf51_rng.h @@ -36,7 +36,9 @@ #include "hw/sysbus.h" #include "qemu/timer.h" +#include "qom/object.h" #define TYPE_NRF51_RNG "nrf51_soc.rng" +typedef struct NRF51RNGState NRF51RNGState; #define NRF51_RNG(obj) OBJECT_CHECK(NRF51RNGState, (obj), TYPE_NRF51_RNG) #define NRF51_RNG_SIZE 0x1000 @@ -54,7 +56,7 @@ #define NRF51_RNG_REG_CONFIG_DECEN 0 #define NRF51_RNG_REG_VALUE 0x508 -typedef struct { +struct NRF51RNGState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -78,7 +80,7 @@ typedef struct { uint32_t interrupt_enabled; uint32_t filter_enabled; -} NRF51RNGState; +}; #endif /* NRF51_RNG_H */ diff --git a/include/hw/misc/pca9552.h b/include/hw/misc/pca9552.h index 600356fbf9..ebf8425903 100644 --- a/include/hw/misc/pca9552.h +++ b/include/hw/misc/pca9552.h @@ -10,15 +10,17 @@ #define PCA9552_H #include "hw/i2c/i2c.h" +#include "qom/object.h" #define TYPE_PCA9552 "pca9552" #define TYPE_PCA955X "pca955x" +typedef struct PCA955xState PCA955xState; #define PCA955X(obj) OBJECT_CHECK(PCA955xState, (obj), TYPE_PCA955X) #define PCA955X_NR_REGS 10 #define PCA955X_PIN_COUNT_MAX 16 -typedef struct PCA955xState { +struct PCA955xState { /*< private >*/ I2CSlave i2c; /*< public >*/ @@ -29,6 +31,6 @@ typedef struct PCA955xState { uint8_t regs[PCA955X_NR_REGS]; qemu_irq gpio[PCA955X_PIN_COUNT_MAX]; char *description; /* For debugging purpose only */ -} PCA955xState; +}; #endif diff --git a/include/hw/misc/stm32f2xx_syscfg.h b/include/hw/misc/stm32f2xx_syscfg.h index 84e06fdecf..ff7c976d66 100644 --- a/include/hw/misc/stm32f2xx_syscfg.h +++ b/include/hw/misc/stm32f2xx_syscfg.h @@ -26,6 +26,7 @@ #define HW_STM32F2XX_SYSCFG_H #include "hw/sysbus.h" +#include "qom/object.h" #define SYSCFG_MEMRMP 0x00 #define SYSCFG_PMC 0x04 @@ -36,10 +37,11 @@ #define SYSCFG_CMPCR 0x20 #define TYPE_STM32F2XX_SYSCFG "stm32f2xx-syscfg" +typedef struct STM32F2XXSyscfgState STM32F2XXSyscfgState; #define STM32F2XX_SYSCFG(obj) \ OBJECT_CHECK(STM32F2XXSyscfgState, (obj), TYPE_STM32F2XX_SYSCFG) -typedef struct { +struct STM32F2XXSyscfgState { /* <private> */ SysBusDevice parent_obj; @@ -55,6 +57,6 @@ typedef struct { uint32_t syscfg_cmpcr; qemu_irq irq; -} STM32F2XXSyscfgState; +}; #endif /* HW_STM32F2XX_SYSCFG_H */ diff --git a/include/hw/misc/stm32f4xx_exti.h b/include/hw/misc/stm32f4xx_exti.h index 707036a41b..7132615785 100644 --- a/include/hw/misc/stm32f4xx_exti.h +++ b/include/hw/misc/stm32f4xx_exti.h @@ -27,6 +27,7 @@ #include "hw/sysbus.h" #include "hw/hw.h" +#include "qom/object.h" #define EXTI_IMR 0x00 #define EXTI_EMR 0x04 @@ -36,13 +37,14 @@ #define EXTI_PR 0x14 #define TYPE_STM32F4XX_EXTI "stm32f4xx-exti" +typedef struct STM32F4xxExtiState STM32F4xxExtiState; #define STM32F4XX_EXTI(obj) \ OBJECT_CHECK(STM32F4xxExtiState, (obj), TYPE_STM32F4XX_EXTI) #define NUM_GPIO_EVENT_IN_LINES 16 #define NUM_INTERRUPT_OUT_LINES 16 -typedef struct { +struct STM32F4xxExtiState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -55,6 +57,6 @@ typedef struct { uint32_t exti_pr; qemu_irq irq[NUM_INTERRUPT_OUT_LINES]; -} STM32F4xxExtiState; +}; #endif diff --git a/include/hw/misc/stm32f4xx_syscfg.h b/include/hw/misc/stm32f4xx_syscfg.h index c62c6629e5..78130cb9c3 100644 --- a/include/hw/misc/stm32f4xx_syscfg.h +++ b/include/hw/misc/stm32f4xx_syscfg.h @@ -27,6 +27,7 @@ #include "hw/sysbus.h" #include "hw/hw.h" +#include "qom/object.h" #define SYSCFG_MEMRMP 0x00 #define SYSCFG_PMC 0x04 @@ -37,12 +38,13 @@ #define SYSCFG_CMPCR 0x20 #define TYPE_STM32F4XX_SYSCFG "stm32f4xx-syscfg" +typedef struct STM32F4xxSyscfgState STM32F4xxSyscfgState; #define STM32F4XX_SYSCFG(obj) \ OBJECT_CHECK(STM32F4xxSyscfgState, (obj), TYPE_STM32F4XX_SYSCFG) #define SYSCFG_NUM_EXTICR 4 -typedef struct { +struct STM32F4xxSyscfgState { /* <private> */ SysBusDevice parent_obj; @@ -56,6 +58,6 @@ typedef struct { qemu_irq irq; qemu_irq gpio_out[16]; -} STM32F4xxSyscfgState; +}; #endif diff --git a/include/hw/misc/tz-mpc.h b/include/hw/misc/tz-mpc.h index 6f15945410..2d3eae0834 100644 --- a/include/hw/misc/tz-mpc.h +++ b/include/hw/misc/tz-mpc.h @@ -32,15 +32,16 @@ #define TZ_MPC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_TZ_MPC "tz-mpc" +typedef struct TZMPC TZMPC; #define TZ_MPC(obj) OBJECT_CHECK(TZMPC, (obj), TYPE_TZ_MPC) #define TZ_NUM_PORTS 16 #define TYPE_TZ_MPC_IOMMU_MEMORY_REGION "tz-mpc-iommu-memory-region" -typedef struct TZMPC TZMPC; struct TZMPC { /*< private >*/ diff --git a/include/hw/misc/tz-msc.h b/include/hw/misc/tz-msc.h index 116b96ae9b..3f719833a9 100644 --- a/include/hw/misc/tz-msc.h +++ b/include/hw/misc/tz-msc.h @@ -52,11 +52,13 @@ #include "hw/sysbus.h" #include "target/arm/idau.h" +#include "qom/object.h" #define TYPE_TZ_MSC "tz-msc" +typedef struct TZMSC TZMSC; #define TZ_MSC(obj) OBJECT_CHECK(TZMSC, (obj), TYPE_TZ_MSC) -typedef struct TZMSC { +struct TZMSC { /*< private >*/ SysBusDevice parent_obj; @@ -74,6 +76,6 @@ typedef struct TZMSC { AddressSpace downstream_as; MemoryRegion upstream; IDAUInterface *idau; -} TZMSC; +}; #endif diff --git a/include/hw/misc/tz-ppc.h b/include/hw/misc/tz-ppc.h index 080d6e2ec1..4646005fa5 100644 --- a/include/hw/misc/tz-ppc.h +++ b/include/hw/misc/tz-ppc.h @@ -66,13 +66,14 @@ #define TZ_PPC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_TZ_PPC "tz-ppc" +typedef struct TZPPC TZPPC; #define TZ_PPC(obj) OBJECT_CHECK(TZPPC, (obj), TYPE_TZ_PPC) #define TZ_NUM_PORTS 16 -typedef struct TZPPC TZPPC; typedef struct TZPPCPort { TZPPC *ppc; diff --git a/include/hw/misc/unimp.h b/include/hw/misc/unimp.h index c63968a2cd..6c04c8a923 100644 --- a/include/hw/misc/unimp.h +++ b/include/hw/misc/unimp.h @@ -11,19 +11,21 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "qapi/error.h" +#include "qom/object.h" #define TYPE_UNIMPLEMENTED_DEVICE "unimplemented-device" +typedef struct UnimplementedDeviceState UnimplementedDeviceState; #define UNIMPLEMENTED_DEVICE(obj) \ OBJECT_CHECK(UnimplementedDeviceState, (obj), TYPE_UNIMPLEMENTED_DEVICE) -typedef struct { +struct UnimplementedDeviceState { SysBusDevice parent_obj; MemoryRegion iomem; unsigned offset_fmt_width; char *name; uint64_t size; -} UnimplementedDeviceState; +}; /** * create_unimplemented_device: create and map a dummy device diff --git a/include/hw/misc/vmcoreinfo.h b/include/hw/misc/vmcoreinfo.h index d4f3d3a91c..cf0e51f863 100644 --- a/include/hw/misc/vmcoreinfo.h +++ b/include/hw/misc/vmcoreinfo.h @@ -14,18 +14,20 @@ #include "hw/qdev-core.h" #include "standard-headers/linux/qemu_fw_cfg.h" +#include "qom/object.h" #define VMCOREINFO_DEVICE "vmcoreinfo" +typedef struct VMCoreInfoState VMCoreInfoState; #define VMCOREINFO(obj) OBJECT_CHECK(VMCoreInfoState, (obj), VMCOREINFO_DEVICE) typedef struct fw_cfg_vmcoreinfo FWCfgVMCoreInfo; -typedef struct VMCoreInfoState { +struct VMCoreInfoState { DeviceClass parent_obj; bool has_vmcoreinfo; FWCfgVMCoreInfo vmcoreinfo; -} VMCoreInfoState; +}; /* returns NULL unless there is exactly one device */ static inline VMCoreInfoState *vmcoreinfo_find(void) diff --git a/include/hw/misc/zynq-xadc.h b/include/hw/misc/zynq-xadc.h index f1a410a376..7e9767c74f 100644 --- a/include/hw/misc/zynq-xadc.h +++ b/include/hw/misc/zynq-xadc.h @@ -16,6 +16,7 @@ #define ZYNQ_XADC_H #include "hw/sysbus.h" +#include "qom/object.h" #define ZYNQ_XADC_MMIO_SIZE 0x0020 #define ZYNQ_XADC_NUM_IO_REGS (ZYNQ_XADC_MMIO_SIZE / 4) @@ -23,10 +24,11 @@ #define ZYNQ_XADC_FIFO_DEPTH 15 #define TYPE_ZYNQ_XADC "xlnx,zynq-xadc" +typedef struct ZynqXADCState ZynqXADCState; #define ZYNQ_XADC(obj) \ OBJECT_CHECK(ZynqXADCState, (obj), TYPE_ZYNQ_XADC) -typedef struct ZynqXADCState { +struct ZynqXADCState { /*< private >*/ SysBusDevice parent_obj; @@ -41,6 +43,6 @@ typedef struct ZynqXADCState { struct IRQState *qemu_irq; -} ZynqXADCState; +}; #endif /* ZYNQ_XADC_H */ diff --git a/include/hw/net/allwinner-sun8i-emac.h b/include/hw/net/allwinner-sun8i-emac.h index dd1d7b96cd..bd38588885 100644 --- a/include/hw/net/allwinner-sun8i-emac.h +++ b/include/hw/net/allwinner-sun8i-emac.h @@ -30,6 +30,7 @@ */ #define TYPE_AW_SUN8I_EMAC "allwinner-sun8i-emac" +typedef struct AwSun8iEmacState AwSun8iEmacState; #define AW_SUN8I_EMAC(obj) \ OBJECT_CHECK(AwSun8iEmacState, (obj), TYPE_AW_SUN8I_EMAC) @@ -38,7 +39,7 @@ /** * Allwinner Sun8i EMAC object instance state */ -typedef struct AwSun8iEmacState { +struct AwSun8iEmacState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -100,6 +101,6 @@ typedef struct AwSun8iEmacState { /** @} */ -} AwSun8iEmacState; +}; #endif /* HW_NET_ALLWINNER_SUN8I_H */ diff --git a/include/hw/net/allwinner_emac.h b/include/hw/net/allwinner_emac.h index 5013207d15..e927082580 100644 --- a/include/hw/net/allwinner_emac.h +++ b/include/hw/net/allwinner_emac.h @@ -28,8 +28,10 @@ #include "qemu/fifo8.h" #include "hw/net/mii.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_AW_EMAC "allwinner-emac" +typedef struct AwEmacState AwEmacState; #define AW_EMAC(obj) OBJECT_CHECK(AwEmacState, (obj), TYPE_AW_EMAC) /* @@ -144,7 +146,7 @@ typedef struct RTL8201CPState { uint16_t anlpar; } RTL8201CPState; -typedef struct AwEmacState { +struct AwEmacState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -171,6 +173,6 @@ typedef struct AwEmacState { Fifo8 tx_fifo[NUM_TX_FIFOS]; uint32_t tx_length[NUM_TX_FIFOS]; uint32_t tx_channel; -} AwEmacState; +}; #endif diff --git a/include/hw/net/cadence_gem.h b/include/hw/net/cadence_gem.h index 54e646ff79..04fd59a525 100644 --- a/include/hw/net/cadence_gem.h +++ b/include/hw/net/cadence_gem.h @@ -24,8 +24,10 @@ #ifndef CADENCE_GEM_H #define CADENCE_GEM_H +#include "qom/object.h" #define TYPE_CADENCE_GEM "cadence_gem" +typedef struct CadenceGEMState CadenceGEMState; #define CADENCE_GEM(obj) OBJECT_CHECK(CadenceGEMState, (obj), TYPE_CADENCE_GEM) #include "net/net.h" @@ -43,7 +45,7 @@ #define MAX_JUMBO_FRAME_SIZE_MASK 0x3FFF #define MAX_FRAME_SIZE MAX_JUMBO_FRAME_SIZE_MASK -typedef struct CadenceGEMState { +struct CadenceGEMState { /*< private >*/ SysBusDevice parent_obj; @@ -89,6 +91,6 @@ typedef struct CadenceGEMState { uint32_t rx_desc[MAX_PRIORITY_QUEUES][DESC_MAX_NUM_WORDS]; bool sar_active[4]; -} CadenceGEMState; +}; #endif diff --git a/include/hw/net/ftgmac100.h b/include/hw/net/ftgmac100.h index ab37e7b2b8..6371bf60ab 100644 --- a/include/hw/net/ftgmac100.h +++ b/include/hw/net/ftgmac100.h @@ -9,8 +9,10 @@ #ifndef FTGMAC100_H #define FTGMAC100_H +#include "qom/object.h" #define TYPE_FTGMAC100 "ftgmac100" +typedef struct FTGMAC100State FTGMAC100State; #define FTGMAC100(obj) OBJECT_CHECK(FTGMAC100State, (obj), TYPE_FTGMAC100) #include "hw/sysbus.h" @@ -21,7 +23,7 @@ */ #define FTGMAC100_MAX_FRAME_SIZE 9220 -typedef struct FTGMAC100State { +struct FTGMAC100State { /*< private >*/ SysBusDevice parent_obj; @@ -64,15 +66,16 @@ typedef struct FTGMAC100State { bool aspeed; uint32_t txdes0_edotr; uint32_t rxdes0_edorr; -} FTGMAC100State; +}; #define TYPE_ASPEED_MII "aspeed-mmi" +typedef struct AspeedMiiState AspeedMiiState; #define ASPEED_MII(obj) OBJECT_CHECK(AspeedMiiState, (obj), TYPE_ASPEED_MII) /* * AST2600 MII controller */ -typedef struct AspeedMiiState { +struct AspeedMiiState { /*< private >*/ SysBusDevice parent_obj; @@ -81,6 +84,6 @@ typedef struct AspeedMiiState { MemoryRegion iomem; uint32_t phycr; uint32_t phydata; -} AspeedMiiState; +}; #endif diff --git a/include/hw/net/imx_fec.h b/include/hw/net/imx_fec.h index 9f03034b89..4d6ac5e408 100644 --- a/include/hw/net/imx_fec.h +++ b/include/hw/net/imx_fec.h @@ -23,8 +23,10 @@ #ifndef IMX_FEC_H #define IMX_FEC_H +#include "qom/object.h" #define TYPE_IMX_FEC "imx.fec" +typedef struct IMXFECState IMXFECState; #define IMX_FEC(obj) OBJECT_CHECK(IMXFECState, (obj), TYPE_IMX_FEC) #define TYPE_IMX_ENET "imx.enet" @@ -247,7 +249,7 @@ typedef struct { #define FSL_IMX25_FEC_SIZE 0x4000 -typedef struct IMXFECState { +struct IMXFECState { /*< private >*/ SysBusDevice parent_obj; @@ -274,6 +276,6 @@ typedef struct IMXFECState { /* Buffer used to assemble a Tx frame */ uint8_t frame[ENET_MAX_FRAME_SIZE]; -} IMXFECState; +}; #endif diff --git a/include/hw/net/lance.h b/include/hw/net/lance.h index 0357f5f65c..fe459ffea7 100644 --- a/include/hw/net/lance.h +++ b/include/hw/net/lance.h @@ -32,15 +32,17 @@ #include "net/net.h" #include "hw/net/pcnet.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_LANCE "lance" +typedef struct SysBusPCNetState SysBusPCNetState; #define SYSBUS_PCNET(obj) \ OBJECT_CHECK(SysBusPCNetState, (obj), TYPE_LANCE) -typedef struct { +struct SysBusPCNetState { SysBusDevice parent_obj; PCNetState state; -} SysBusPCNetState; +}; #endif diff --git a/include/hw/net/lasi_82596.h b/include/hw/net/lasi_82596.h index e76ef8308e..141e0cc17a 100644 --- a/include/hw/net/lasi_82596.h +++ b/include/hw/net/lasi_82596.h @@ -10,18 +10,20 @@ #include "net/net.h" #include "hw/net/i82596.h" +#include "qom/object.h" #define TYPE_LASI_82596 "lasi_82596" +typedef struct SysBusI82596State SysBusI82596State; #define SYSBUS_I82596(obj) \ OBJECT_CHECK(SysBusI82596State, (obj), TYPE_LASI_82596) -typedef struct { +struct SysBusI82596State { SysBusDevice parent_obj; I82596State state; uint16_t last_val; int val_index:1; -} SysBusI82596State; +}; SysBusI82596State *lasi_82596_init(MemoryRegion *addr_space, hwaddr hpa, qemu_irq irq); diff --git a/include/hw/net/msf2-emac.h b/include/hw/net/msf2-emac.h index 37966d3a81..6aef711007 100644 --- a/include/hw/net/msf2-emac.h +++ b/include/hw/net/msf2-emac.h @@ -26,15 +26,17 @@ #include "exec/memory.h" #include "net/net.h" #include "net/eth.h" +#include "qom/object.h" #define TYPE_MSS_EMAC "msf2-emac" +typedef struct MSF2EmacState MSF2EmacState; #define MSS_EMAC(obj) \ OBJECT_CHECK(MSF2EmacState, (obj), TYPE_MSS_EMAC) #define R_MAX (0x1a0 / 4) #define PHY_MAX_REGS 32 -typedef struct MSF2EmacState { +struct MSF2EmacState { SysBusDevice parent; MemoryRegion mmio; @@ -50,4 +52,4 @@ typedef struct MSF2EmacState { uint16_t phy_regs[PHY_MAX_REGS]; uint32_t regs[R_MAX]; -} MSF2EmacState; +}; diff --git a/include/hw/nmi.h b/include/hw/nmi.h index fe37ce3ad8..47fc036e74 100644 --- a/include/hw/nmi.h +++ b/include/hw/nmi.h @@ -26,6 +26,7 @@ #define TYPE_NMI "nmi" +typedef struct NMIClass NMIClass; #define NMI_CLASS(klass) \ OBJECT_CLASS_CHECK(NMIClass, (klass), TYPE_NMI) #define NMI_GET_CLASS(obj) \ @@ -35,11 +36,11 @@ typedef struct NMIState NMIState; -typedef struct NMIClass { +struct NMIClass { InterfaceClass parent_class; void (*nmi_monitor_handler)(NMIState *n, int cpu_index, Error **errp); -} NMIClass; +}; void nmi_monitor_handle(int cpu_index, Error **errp); diff --git a/include/hw/nubus/mac-nubus-bridge.h b/include/hw/nubus/mac-nubus-bridge.h index ce9c789d99..8407ad21f6 100644 --- a/include/hw/nubus/mac-nubus-bridge.h +++ b/include/hw/nubus/mac-nubus-bridge.h @@ -10,15 +10,17 @@ #define HW_NUBUS_MAC_H #include "hw/nubus/nubus.h" +#include "qom/object.h" #define TYPE_MAC_NUBUS_BRIDGE "mac-nubus-bridge" +typedef struct MacNubusState MacNubusState; #define MAC_NUBUS_BRIDGE(obj) OBJECT_CHECK(MacNubusState, (obj), \ TYPE_MAC_NUBUS_BRIDGE) -typedef struct MacNubusState { +struct MacNubusState { SysBusDevice sysbus_dev; NubusBus *bus; -} MacNubusState; +}; #endif diff --git a/include/hw/nubus/nubus.h b/include/hw/nubus/nubus.h index c350948262..226efb2ff7 100644 --- a/include/hw/nubus/nubus.h +++ b/include/hw/nubus/nubus.h @@ -11,6 +11,7 @@ #include "hw/qdev-properties.h" #include "exec/address-spaces.h" +#include "qom/object.h" #define NUBUS_SUPER_SLOT_SIZE 0x10000000U #define NUBUS_SUPER_SLOT_NB 0x9 @@ -22,24 +23,26 @@ #define NUBUS_LAST_SLOT 0xF #define TYPE_NUBUS_DEVICE "nubus-device" +typedef struct NubusDevice NubusDevice; #define NUBUS_DEVICE(obj) \ OBJECT_CHECK(NubusDevice, (obj), TYPE_NUBUS_DEVICE) #define TYPE_NUBUS_BUS "nubus-bus" +typedef struct NubusBus NubusBus; #define NUBUS_BUS(obj) OBJECT_CHECK(NubusBus, (obj), TYPE_NUBUS_BUS) #define TYPE_NUBUS_BRIDGE "nubus-bridge" -typedef struct NubusBus { +struct NubusBus { BusState qbus; MemoryRegion super_slot_io; MemoryRegion slot_io; int current_slot; -} NubusBus; +}; -typedef struct NubusDevice { +struct NubusDevice { DeviceState qdev; int slot_nb; @@ -60,7 +63,7 @@ typedef struct NubusDevice { MemoryRegion rom_io; const uint8_t *rom; -} NubusDevice; +}; void nubus_register_rom(NubusDevice *dev, const uint8_t *rom, uint32_t size, int revision, int format, uint8_t byte_lanes); diff --git a/include/hw/nvram/fw_cfg.h b/include/hw/nvram/fw_cfg.h index f190c428e8..5e00fdc21e 100644 --- a/include/hw/nvram/fw_cfg.h +++ b/include/hw/nvram/fw_cfg.h @@ -5,6 +5,7 @@ #include "standard-headers/linux/qemu_fw_cfg.h" #include "hw/sysbus.h" #include "sysemu/dma.h" +#include "qom/object.h" #define TYPE_FW_CFG "fw_cfg" #define TYPE_FW_CFG_IO "fw_cfg_io" @@ -15,6 +16,7 @@ #define FW_CFG_IO(obj) OBJECT_CHECK(FWCfgIoState, (obj), TYPE_FW_CFG_IO) #define FW_CFG_MEM(obj) OBJECT_CHECK(FWCfgMemState, (obj), TYPE_FW_CFG_MEM) +typedef struct FWCfgDataGeneratorClass FWCfgDataGeneratorClass; #define FW_CFG_DATA_GENERATOR_CLASS(class) \ OBJECT_CLASS_CHECK(FWCfgDataGeneratorClass, (class), \ TYPE_FW_CFG_DATA_GENERATOR_INTERFACE) @@ -22,7 +24,7 @@ OBJECT_GET_CLASS(FWCfgDataGeneratorClass, (obj), \ TYPE_FW_CFG_DATA_GENERATOR_INTERFACE) -typedef struct FWCfgDataGeneratorClass { +struct FWCfgDataGeneratorClass { /*< private >*/ InterfaceClass parent_class; /*< public >*/ @@ -39,7 +41,7 @@ typedef struct FWCfgDataGeneratorClass { * required. */ GByteArray *(*get_data)(Object *obj, Error **errp); -} FWCfgDataGeneratorClass; +}; typedef struct fw_cfg_file FWCfgFile; diff --git a/include/hw/nvram/nrf51_nvm.h b/include/hw/nvram/nrf51_nvm.h index 3792e4a9fe..48871667f1 100644 --- a/include/hw/nvram/nrf51_nvm.h +++ b/include/hw/nvram/nrf51_nvm.h @@ -23,7 +23,9 @@ #define NRF51_NVM_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_NRF51_NVM "nrf51_soc.nvm" +typedef struct NRF51NVMState NRF51NVMState; #define NRF51_NVM(obj) OBJECT_CHECK(NRF51NVMState, (obj), TYPE_NRF51_NVM) #define NRF51_UICR_FIXTURE_SIZE 64 @@ -44,7 +46,7 @@ #define NRF51_UICR_SIZE 0x100 -typedef struct NRF51NVMState { +struct NRF51NVMState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -58,7 +60,7 @@ typedef struct NRF51NVMState { uint32_t config; -} NRF51NVMState; +}; #endif diff --git a/include/hw/pci-bridge/simba.h b/include/hw/pci-bridge/simba.h index d8649973ee..300379b94d 100644 --- a/include/hw/pci-bridge/simba.h +++ b/include/hw/pci-bridge/simba.h @@ -28,12 +28,14 @@ #define HW_PCI_BRIDGE_SIMBA_H #include "hw/pci/pci_bridge.h" +#include "qom/object.h" -typedef struct SimbaPCIBridge { +struct SimbaPCIBridge { /*< private >*/ PCIBridge parent_obj; -} SimbaPCIBridge; +}; +typedef struct SimbaPCIBridge SimbaPCIBridge; #define TYPE_SIMBA_PCI_BRIDGE "pbm-bridge" #define SIMBA_PCI_BRIDGE(obj) \ diff --git a/include/hw/pci-host/designware.h b/include/hw/pci-host/designware.h index 31c41231b1..43ee5b3a12 100644 --- a/include/hw/pci-host/designware.h +++ b/include/hw/pci-host/designware.h @@ -26,17 +26,19 @@ #include "hw/pci/pci_bus.h" #include "hw/pci/pcie_host.h" #include "hw/pci/pci_bridge.h" +#include "qom/object.h" #define TYPE_DESIGNWARE_PCIE_HOST "designware-pcie-host" +typedef struct DesignwarePCIEHost DesignwarePCIEHost; #define DESIGNWARE_PCIE_HOST(obj) \ OBJECT_CHECK(DesignwarePCIEHost, (obj), TYPE_DESIGNWARE_PCIE_HOST) #define TYPE_DESIGNWARE_PCIE_ROOT "designware-pcie-root" +typedef struct DesignwarePCIERoot DesignwarePCIERoot; #define DESIGNWARE_PCIE_ROOT(obj) \ OBJECT_CHECK(DesignwarePCIERoot, (obj), TYPE_DESIGNWARE_PCIE_ROOT) struct DesignwarePCIERoot; -typedef struct DesignwarePCIERoot DesignwarePCIERoot; typedef struct DesignwarePCIEViewport { DesignwarePCIERoot *root; @@ -80,7 +82,7 @@ struct DesignwarePCIERoot { DesignwarePCIEMSI msi; }; -typedef struct DesignwarePCIEHost { +struct DesignwarePCIEHost { PCIHostState parent_obj; DesignwarePCIERoot root; @@ -96,6 +98,6 @@ typedef struct DesignwarePCIEHost { } pci; MemoryRegion mmio; -} DesignwarePCIEHost; +}; #endif /* DESIGNWARE_H */ diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h index faea040a93..d70e1c69dc 100644 --- a/include/hw/pci-host/gpex.h +++ b/include/hw/pci-host/gpex.h @@ -23,24 +23,27 @@ #include "hw/sysbus.h" #include "hw/pci/pci.h" #include "hw/pci/pcie_host.h" +#include "qom/object.h" #define TYPE_GPEX_HOST "gpex-pcihost" +typedef struct GPEXHost GPEXHost; #define GPEX_HOST(obj) \ OBJECT_CHECK(GPEXHost, (obj), TYPE_GPEX_HOST) #define TYPE_GPEX_ROOT_DEVICE "gpex-root" +typedef struct GPEXRootState GPEXRootState; #define MCH_PCI_DEVICE(obj) \ OBJECT_CHECK(GPEXRootState, (obj), TYPE_GPEX_ROOT_DEVICE) #define GPEX_NUM_IRQS 4 -typedef struct GPEXRootState { +struct GPEXRootState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ -} GPEXRootState; +}; -typedef struct GPEXHost { +struct GPEXHost { /*< private >*/ PCIExpressHost parent_obj; /*< public >*/ @@ -51,7 +54,7 @@ typedef struct GPEXHost { MemoryRegion io_mmio; qemu_irq irq[GPEX_NUM_IRQS]; int irq_num[GPEX_NUM_IRQS]; -} GPEXHost; +}; int gpex_set_irq_num(GPEXHost *s, int index, int gsi); diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index cc58d82ed4..74fe300bff 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -14,14 +14,16 @@ #include "hw/hw.h" #include "hw/pci/pci_bus.h" #include "hw/pci-host/pam.h" +#include "qom/object.h" #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" #define TYPE_I440FX_PCI_DEVICE "i440FX" +typedef struct PCII440FXState PCII440FXState; #define I440FX_PCI_DEVICE(obj) \ OBJECT_CHECK(PCII440FXState, (obj), TYPE_I440FX_PCI_DEVICE) -typedef struct PCII440FXState { +struct PCII440FXState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -32,7 +34,7 @@ typedef struct PCII440FXState { PAMMemoryRegion pam_regions[13]; MemoryRegion smram_region; MemoryRegion smram, low_smram; -} PCII440FXState; +}; #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h index 75b787867a..43f9e873ae 100644 --- a/include/hw/pci-host/pnv_phb3.h +++ b/include/hw/pci-host/pnv_phb3.h @@ -13,6 +13,7 @@ #include "hw/pci/pcie_host.h" #include "hw/pci/pcie_port.h" #include "hw/ppc/xics.h" +#include "qom/object.h" typedef struct PnvPHB3 PnvPHB3; @@ -20,18 +21,19 @@ typedef struct PnvPHB3 PnvPHB3; * PHB3 XICS Source for MSIs */ #define TYPE_PHB3_MSI "phb3-msi" +typedef struct Phb3MsiState Phb3MsiState; #define PHB3_MSI(obj) OBJECT_CHECK(Phb3MsiState, (obj), TYPE_PHB3_MSI) #define PHB3_MAX_MSI 2048 -typedef struct Phb3MsiState { +struct Phb3MsiState { ICSState ics; qemu_irq *qirqs; PnvPHB3 *phb; uint64_t rba[PHB3_MAX_MSI / 64]; uint32_t rba_sum; -} Phb3MsiState; +}; void pnv_phb3_msi_update_config(Phb3MsiState *msis, uint32_t base, uint32_t count); @@ -69,9 +71,10 @@ typedef struct PnvPhb3DMASpace { * PHB3 Power Bus Common Queue */ #define TYPE_PNV_PBCQ "pnv-pbcq" +typedef struct PnvPBCQState PnvPBCQState; #define PNV_PBCQ(obj) OBJECT_CHECK(PnvPBCQState, (obj), TYPE_PNV_PBCQ) -typedef struct PnvPBCQState { +struct PnvPBCQState { DeviceState parent; uint32_t nest_xbase; @@ -96,7 +99,7 @@ typedef struct PnvPBCQState { MemoryRegion xscom_nest_regs; MemoryRegion xscom_pci_regs; MemoryRegion xscom_spci_regs; -} PnvPBCQState; +}; /* * PHB3 PCIe Root port diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index c882bfd0aa..450602cb72 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -13,6 +13,7 @@ #include "hw/pci/pcie_host.h" #include "hw/pci/pcie_port.h" #include "hw/ppc/xive.h" +#include "qom/object.h" typedef struct PnvPhb4PecState PnvPhb4PecState; typedef struct PnvPhb4PecStack PnvPhb4PecStack; @@ -140,6 +141,7 @@ extern const MemoryRegionOps pnv_phb4_xscom_ops; * PHB4 PEC (PCI Express Controller) */ #define TYPE_PNV_PHB4_PEC "pnv-phb4-pec" +typedef struct PnvPhb4PecClass PnvPhb4PecClass; #define PNV_PHB4_PEC(obj) \ OBJECT_CHECK(PnvPhb4PecState, (obj), TYPE_PNV_PHB4_PEC) @@ -214,7 +216,7 @@ struct PnvPhb4PecState { #define PNV_PHB4_PEC_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvPhb4PecClass, (obj), TYPE_PNV_PHB4_PEC) -typedef struct PnvPhb4PecClass { +struct PnvPhb4PecClass { DeviceClass parent_class; uint32_t (*xscom_nest_base)(PnvPhb4PecState *pec); @@ -225,6 +227,6 @@ typedef struct PnvPhb4PecClass { int compat_size; const char *stk_compat; int stk_compat_size; -} PnvPhb4PecClass; +}; #endif /* PCI_HOST_PNV_PHB4_H */ diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h index 070305f83d..5db5a763d4 100644 --- a/include/hw/pci-host/q35.h +++ b/include/hw/pci-host/q35.h @@ -27,16 +27,19 @@ #include "hw/pci-host/pam.h" #include "qemu/units.h" #include "qemu/range.h" +#include "qom/object.h" #define TYPE_Q35_HOST_DEVICE "q35-pcihost" +typedef struct Q35PCIHost Q35PCIHost; #define Q35_HOST_DEVICE(obj) \ OBJECT_CHECK(Q35PCIHost, (obj), TYPE_Q35_HOST_DEVICE) #define TYPE_MCH_PCI_DEVICE "mch" +typedef struct MCHPCIState MCHPCIState; #define MCH_PCI_DEVICE(obj) \ OBJECT_CHECK(MCHPCIState, (obj), TYPE_MCH_PCI_DEVICE) -typedef struct MCHPCIState { +struct MCHPCIState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -57,16 +60,16 @@ typedef struct MCHPCIState { uint64_t pci_hole64_size; uint32_t short_root_bus; uint16_t ext_tseg_mbytes; -} MCHPCIState; +}; -typedef struct Q35PCIHost { +struct Q35PCIHost { /*< private >*/ PCIExpressHost parent_obj; /*< public >*/ bool pci_hole64_fix; MCHPCIState mch; -} Q35PCIHost; +}; #define Q35_MASK(bit, ms_bit, ls_bit) \ ((uint##bit##_t)(((1ULL << ((ms_bit) + 1)) - 1) & ~((1ULL << ls_bit) - 1))) diff --git a/include/hw/pci-host/sabre.h b/include/hw/pci-host/sabre.h index 99b5aefbec..5fb508e9ce 100644 --- a/include/hw/pci-host/sabre.h +++ b/include/hw/pci-host/sabre.h @@ -4,6 +4,7 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "hw/sparc/sun4u_iommu.h" +#include "qom/object.h" #define MAX_IVEC 0x40 @@ -16,15 +17,16 @@ #define OBIO_MSE_IRQ 0x2a #define OBIO_SER_IRQ 0x2b -typedef struct SabrePCIState { +struct SabrePCIState { PCIDevice parent_obj; -} SabrePCIState; +}; +typedef struct SabrePCIState SabrePCIState; #define TYPE_SABRE_PCI_DEVICE "sabre-pci" #define SABRE_PCI_DEVICE(obj) \ OBJECT_CHECK(SabrePCIState, (obj), TYPE_SABRE_PCI_DEVICE) -typedef struct SabreState { +struct SabreState { PCIHostState parent_obj; hwaddr special_base; @@ -45,7 +47,8 @@ typedef struct SabreState { unsigned int irq_request; uint32_t reset_control; unsigned int nr_resets; -} SabreState; +}; +typedef struct SabreState SabreState; #define TYPE_SABRE "sabre" #define SABRE_DEVICE(obj) \ diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 600eb55c34..783e8905df 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -24,15 +24,16 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "hw/ppc/xics.h" +#include "qom/object.h" #define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge" +typedef struct SpaprPhbState SpaprPhbState; #define SPAPR_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(SpaprPhbState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE) #define SPAPR_PCI_DMA_MAX_WINDOWS 2 -typedef struct SpaprPhbState SpaprPhbState; typedef struct SpaprPciMsi { uint32_t first_irq; diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h index 72d2a97355..a1f3aaaecd 100644 --- a/include/hw/pci-host/uninorth.h +++ b/include/hw/pci-host/uninorth.h @@ -27,6 +27,7 @@ #include "hw/pci/pci_host.h" #include "hw/ppc/openpic.h" +#include "qom/object.h" /* UniNorth version */ #define UNINORTH_VERSION_10A 0x7 @@ -36,6 +37,7 @@ #define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost" #define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost" +typedef struct UNINHostState UNINHostState; #define UNI_NORTH_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE) #define UNI_NORTH_AGP_HOST_BRIDGE(obj) \ @@ -45,7 +47,7 @@ #define U3_AGP_HOST_BRIDGE(obj) \ OBJECT_CHECK(UNINHostState, (obj), TYPE_U3_AGP_HOST_BRIDGE) -typedef struct UNINHostState { +struct UNINHostState { PCIHostState parent_obj; uint32_t ofw_addr; @@ -54,13 +56,14 @@ typedef struct UNINHostState { MemoryRegion pci_mmio; MemoryRegion pci_hole; MemoryRegion pci_io; -} UNINHostState; +}; -typedef struct UNINState { +struct UNINState { SysBusDevice parent_obj; MemoryRegion mem; -} UNINState; +}; +typedef struct UNINState UNINState; #define TYPE_UNI_NORTH "uni-north" #define UNI_NORTH(obj) \ diff --git a/include/hw/pci-host/xilinx-pcie.h b/include/hw/pci-host/xilinx-pcie.h index c0f15314be..1cbd6d2f79 100644 --- a/include/hw/pci-host/xilinx-pcie.h +++ b/include/hw/pci-host/xilinx-pcie.h @@ -24,25 +24,28 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_bridge.h" #include "hw/pci/pcie_host.h" +#include "qom/object.h" #define TYPE_XILINX_PCIE_HOST "xilinx-pcie-host" +typedef struct XilinxPCIEHost XilinxPCIEHost; #define XILINX_PCIE_HOST(obj) \ OBJECT_CHECK(XilinxPCIEHost, (obj), TYPE_XILINX_PCIE_HOST) #define TYPE_XILINX_PCIE_ROOT "xilinx-pcie-root" +typedef struct XilinxPCIERoot XilinxPCIERoot; #define XILINX_PCIE_ROOT(obj) \ OBJECT_CHECK(XilinxPCIERoot, (obj), TYPE_XILINX_PCIE_ROOT) -typedef struct XilinxPCIERoot { +struct XilinxPCIERoot { PCIBridge parent_obj; -} XilinxPCIERoot; +}; typedef struct XilinxPCIEInt { uint32_t fifo_reg1; uint32_t fifo_reg2; } XilinxPCIEInt; -typedef struct XilinxPCIEHost { +struct XilinxPCIEHost { PCIExpressHost parent_obj; char name[16]; @@ -62,6 +65,6 @@ typedef struct XilinxPCIEHost { XilinxPCIEInt intr_fifo[16]; unsigned int intr_fifo_r, intr_fifo_w; uint32_t rpscr; -} XilinxPCIEHost; +}; #endif /* HW_XILINX_PCIE_H */ diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 4ca7258b5b..be9e298dba 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -8,6 +8,7 @@ #include "hw/isa/isa.h" #include "hw/pci/pcie.h" +#include "qom/object.h" extern bool pci_available; @@ -195,6 +196,7 @@ enum { }; #define TYPE_PCI_DEVICE "pci-device" +typedef struct PCIDeviceClass PCIDeviceClass; #define PCI_DEVICE(obj) \ OBJECT_CHECK(PCIDevice, (obj), TYPE_PCI_DEVICE) #define PCI_DEVICE_CLASS(klass) \ @@ -217,7 +219,7 @@ typedef struct PCIINTxRoute { int irq; } PCIINTxRoute; -typedef struct PCIDeviceClass { +struct PCIDeviceClass { DeviceClass parent_class; void (*realize)(PCIDevice *dev, Error **errp); @@ -241,7 +243,7 @@ typedef struct PCIDeviceClass { /* rom bar */ const char *romfile; -} PCIDeviceClass; +}; typedef void (*PCIINTxRoutingNotifier)(PCIDevice *dev); typedef int (*MSIVectorUseNotifier)(PCIDevice *dev, unsigned int vector, diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h index 99c674e949..b46d37faa8 100644 --- a/include/hw/pci/pci_bridge.h +++ b/include/hw/pci/pci_bridge.h @@ -28,6 +28,7 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_bus.h" +#include "qom/object.h" typedef struct PCIBridgeWindows PCIBridgeWindows; diff --git a/include/hw/pci/pci_host.h b/include/hw/pci/pci_host.h index 6210a7e14d..51ea53908f 100644 --- a/include/hw/pci/pci_host.h +++ b/include/hw/pci/pci_host.h @@ -29,8 +29,10 @@ #define PCI_HOST_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_PCI_HOST_BRIDGE "pci-host-bridge" +typedef struct PCIHostBridgeClass PCIHostBridgeClass; #define PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(PCIHostState, (obj), TYPE_PCI_HOST_BRIDGE) #define PCI_HOST_BRIDGE_CLASS(klass) \ @@ -51,11 +53,11 @@ struct PCIHostState { QLIST_ENTRY(PCIHostState) next; }; -typedef struct PCIHostBridgeClass { +struct PCIHostBridgeClass { SysBusDeviceClass parent_class; const char *(*root_bus_path)(PCIHostState *, PCIBus *); -} PCIHostBridgeClass; +}; /* common internal helpers for PCI/PCIe hosts, cut off overflows */ void pci_host_config_write_common(PCIDevice *pci_dev, uint32_t addr, diff --git a/include/hw/pci/pcie_host.h b/include/hw/pci/pcie_host.h index 3f7b9886d1..c7d2ae5bf4 100644 --- a/include/hw/pci/pcie_host.h +++ b/include/hw/pci/pcie_host.h @@ -23,6 +23,7 @@ #include "hw/pci/pci_host.h" #include "exec/memory.h" +#include "qom/object.h" #define TYPE_PCIE_HOST_BRIDGE "pcie-host-bridge" #define PCIE_HOST_BRIDGE(obj) \ diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h index caae57573b..765399159f 100644 --- a/include/hw/pci/pcie_port.h +++ b/include/hw/pci/pcie_port.h @@ -23,6 +23,7 @@ #include "hw/pci/pci_bridge.h" #include "hw/pci/pci_bus.h" +#include "qom/object.h" #define TYPE_PCIE_PORT "pcie-port" #define PCIE_PORT(obj) OBJECT_CHECK(PCIEPort, (obj), TYPE_PCIE_PORT) @@ -67,12 +68,13 @@ int pcie_chassis_add_slot(struct PCIESlot *slot); void pcie_chassis_del_slot(PCIESlot *s); #define TYPE_PCIE_ROOT_PORT "pcie-root-port-base" +typedef struct PCIERootPortClass PCIERootPortClass; #define PCIE_ROOT_PORT_CLASS(klass) \ OBJECT_CLASS_CHECK(PCIERootPortClass, (klass), TYPE_PCIE_ROOT_PORT) #define PCIE_ROOT_PORT_GET_CLASS(obj) \ OBJECT_GET_CLASS(PCIERootPortClass, (obj), TYPE_PCIE_ROOT_PORT) -typedef struct PCIERootPortClass { +struct PCIERootPortClass { PCIDeviceClass parent_class; DeviceRealize parent_realize; DeviceReset parent_reset; @@ -86,6 +88,6 @@ typedef struct PCIERootPortClass { int ssvid_offset; int acs_offset; /* If nonzero, optional ACS capability offset */ int ssid; -} PCIERootPortClass; +}; #endif /* QEMU_PCIE_PORT_H */ diff --git a/include/hw/pcmcia.h b/include/hw/pcmcia.h index ebad7bc504..0f9e41db02 100644 --- a/include/hw/pcmcia.h +++ b/include/hw/pcmcia.h @@ -4,6 +4,7 @@ /* PCMCIA/Cardbus */ #include "hw/qdev-core.h" +#include "qom/object.h" typedef struct PCMCIASocket { qemu_irq irq; @@ -11,6 +12,8 @@ typedef struct PCMCIASocket { } PCMCIASocket; #define TYPE_PCMCIA_CARD "pcmcia-card" +typedef struct PCMCIACardClass PCMCIACardClass; +typedef struct PCMCIACardState PCMCIACardState; #define PCMCIA_CARD(obj) \ OBJECT_CHECK(PCMCIACardState, (obj), TYPE_PCMCIA_CARD) #define PCMCIA_CARD_GET_CLASS(obj) \ @@ -18,15 +21,15 @@ typedef struct PCMCIASocket { #define PCMCIA_CARD_CLASS(cls) \ OBJECT_CLASS_CHECK(PCMCIACardClass, cls, TYPE_PCMCIA_CARD) -typedef struct PCMCIACardState { +struct PCMCIACardState { /*< private >*/ DeviceState parent_obj; /*< public >*/ PCMCIASocket *slot; -} PCMCIACardState; +}; -typedef struct PCMCIACardClass { +struct PCMCIACardClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ @@ -45,7 +48,7 @@ typedef struct PCMCIACardClass { uint32_t address, uint16_t value); uint16_t (*io_read)(PCMCIACardState *card, uint32_t address); void (*io_write)(PCMCIACardState *card, uint32_t address, uint16_t value); -} PCMCIACardClass; +}; #define CISTPL_DEVICE 0x01 /* 5V Device Information Tuple */ #define CISTPL_NO_LINK 0x14 /* No Link Tuple */ diff --git a/include/hw/platform-bus.h b/include/hw/platform-bus.h index 33745a418e..cda1346a4f 100644 --- a/include/hw/platform-bus.h +++ b/include/hw/platform-bus.h @@ -23,6 +23,7 @@ */ #include "hw/sysbus.h" +#include "qom/object.h" typedef struct PlatformBusDevice PlatformBusDevice; diff --git a/include/hw/ppc/mac_dbdma.h b/include/hw/ppc/mac_dbdma.h index 26cc469de4..e1f42cdbd3 100644 --- a/include/hw/ppc/mac_dbdma.h +++ b/include/hw/ppc/mac_dbdma.h @@ -27,6 +27,7 @@ #include "qemu/iov.h" #include "sysemu/dma.h" #include "hw/sysbus.h" +#include "qom/object.h" typedef struct DBDMA_io DBDMA_io; @@ -160,13 +161,14 @@ typedef struct DBDMA_channel { dbdma_cmd current; } DBDMA_channel; -typedef struct { +struct DBDMAState { SysBusDevice parent_obj; MemoryRegion mem; DBDMA_channel channels[DBDMA_CHANNELS]; QEMUBH *bh; -} DBDMAState; +}; +typedef struct DBDMAState DBDMAState; /* Externally callable functions */ diff --git a/include/hw/ppc/openpic.h b/include/hw/ppc/openpic.h index db0d29e6c2..81a0b3b1ee 100644 --- a/include/hw/ppc/openpic.h +++ b/include/hw/ppc/openpic.h @@ -3,6 +3,7 @@ #include "hw/sysbus.h" #include "hw/core/cpu.h" +#include "qom/object.h" #define MAX_CPU 32 #define MAX_MSI 8 @@ -136,9 +137,10 @@ typedef struct IRQDest { } IRQDest; #define TYPE_OPENPIC "openpic" +typedef struct OpenPICState OpenPICState; #define OPENPIC(obj) OBJECT_CHECK(OpenPICState, (obj), TYPE_OPENPIC) -typedef struct OpenPICState { +struct OpenPICState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -183,6 +185,6 @@ typedef struct OpenPICState { uint32_t irq_ipi0; uint32_t irq_tim0; uint32_t irq_msi; -} OpenPICState; +}; #endif /* OPENPIC_H */ diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index d4b0b0e2ff..64f9ee8867 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -32,15 +32,18 @@ #include "hw/ppc/pnv_core.h" #include "hw/pci-host/pnv_phb3.h" #include "hw/pci-host/pnv_phb4.h" +#include "qom/object.h" #define TYPE_PNV_CHIP "pnv-chip" +typedef struct PnvChip PnvChip; +typedef struct PnvChipClass PnvChipClass; #define PNV_CHIP(obj) OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP) #define PNV_CHIP_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvChipClass, (klass), TYPE_PNV_CHIP) #define PNV_CHIP_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvChipClass, (obj), TYPE_PNV_CHIP) -typedef struct PnvChip { +struct PnvChip { /*< private >*/ SysBusDevice parent_obj; @@ -61,12 +64,13 @@ typedef struct PnvChip { AddressSpace xscom_as; gchar *dt_isa_nodename; -} PnvChip; +}; #define TYPE_PNV8_CHIP "pnv8-chip" +typedef struct Pnv8Chip Pnv8Chip; #define PNV8_CHIP(obj) OBJECT_CHECK(Pnv8Chip, (obj), TYPE_PNV8_CHIP) -typedef struct Pnv8Chip { +struct Pnv8Chip { /*< private >*/ PnvChip parent_obj; @@ -82,12 +86,13 @@ typedef struct Pnv8Chip { PnvPHB3 phbs[PNV8_CHIP_PHB3_MAX]; XICSFabric *xics; -} Pnv8Chip; +}; #define TYPE_PNV9_CHIP "pnv9-chip" +typedef struct Pnv9Chip Pnv9Chip; #define PNV9_CHIP(obj) OBJECT_CHECK(Pnv9Chip, (obj), TYPE_PNV9_CHIP) -typedef struct Pnv9Chip { +struct Pnv9Chip { /*< private >*/ PnvChip parent_obj; @@ -103,7 +108,7 @@ typedef struct Pnv9Chip { #define PNV9_CHIP_MAX_PEC 3 PnvPhb4PecState pecs[PNV9_CHIP_MAX_PEC]; -} Pnv9Chip; +}; /* * A SMT8 fused core is a pair of SMT4 cores. @@ -112,18 +117,19 @@ typedef struct Pnv9Chip { #define PNV9_PIR2CHIP(pir) (((pir) >> 8) & 0x7f) #define TYPE_PNV10_CHIP "pnv10-chip" +typedef struct Pnv10Chip Pnv10Chip; #define PNV10_CHIP(obj) OBJECT_CHECK(Pnv10Chip, (obj), TYPE_PNV10_CHIP) -typedef struct Pnv10Chip { +struct Pnv10Chip { /*< private >*/ PnvChip parent_obj; /*< public >*/ Pnv9Psi psi; PnvLpcController lpc; -} Pnv10Chip; +}; -typedef struct PnvChipClass { +struct PnvChipClass { /*< private >*/ SysBusDeviceClass parent_class; @@ -144,7 +150,7 @@ typedef struct PnvChipClass { void (*pic_print_info)(PnvChip *chip, Monitor *mon); uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id); uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr); -} PnvChipClass; +}; #define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP #define PNV_CHIP_TYPE_NAME(cpu_model) cpu_model PNV_CHIP_TYPE_SUFFIX @@ -191,6 +197,8 @@ typedef struct PnvChipClass { PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir); #define TYPE_PNV_MACHINE MACHINE_TYPE_NAME("powernv") +typedef struct PnvMachineClass PnvMachineClass; +typedef struct PnvMachineState PnvMachineState; #define PNV_MACHINE(obj) \ OBJECT_CHECK(PnvMachineState, (obj), TYPE_PNV_MACHINE) #define PNV_MACHINE_GET_CLASS(obj) \ @@ -198,9 +206,8 @@ PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir); #define PNV_MACHINE_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvMachineClass, klass, TYPE_PNV_MACHINE) -typedef struct PnvMachineState PnvMachineState; -typedef struct PnvMachineClass { +struct PnvMachineClass { /*< private >*/ MachineClass parent_class; @@ -209,7 +216,7 @@ typedef struct PnvMachineClass { int compat_size; void (*dt_power_mgt)(PnvMachineState *pnv, void *fdt); -} PnvMachineClass; +}; struct PnvMachineState { /*< private >*/ diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h index 113550eb7f..2d91a7d519 100644 --- a/include/hw/ppc/pnv_core.h +++ b/include/hw/ppc/pnv_core.h @@ -22,8 +22,11 @@ #include "hw/cpu/core.h" #include "target/ppc/cpu.h" +#include "qom/object.h" #define TYPE_PNV_CORE "powernv-cpu-core" +typedef struct PnvCore PnvCore; +typedef struct PnvCoreClass PnvCoreClass; #define PNV_CORE(obj) \ OBJECT_CHECK(PnvCore, (obj), TYPE_PNV_CORE) #define PNV_CORE_CLASS(klass) \ @@ -33,7 +36,7 @@ typedef struct PnvChip PnvChip; -typedef struct PnvCore { +struct PnvCore { /*< private >*/ CPUCore parent_obj; @@ -44,13 +47,13 @@ typedef struct PnvCore { PnvChip *chip; MemoryRegion xscom_regs; -} PnvCore; +}; -typedef struct PnvCoreClass { +struct PnvCoreClass { DeviceClass parent_class; const MemoryRegionOps *xscom_ops; -} PnvCoreClass; +}; #define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE #define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX @@ -65,13 +68,14 @@ static inline PnvCPUState *pnv_cpu_state(PowerPCCPU *cpu) } #define TYPE_PNV_QUAD "powernv-cpu-quad" +typedef struct PnvQuad PnvQuad; #define PNV_QUAD(obj) \ OBJECT_CHECK(PnvQuad, (obj), TYPE_PNV_QUAD) -typedef struct PnvQuad { +struct PnvQuad { DeviceState parent_obj; uint32_t id; MemoryRegion xscom_regs; -} PnvQuad; +}; #endif /* PPC_PNV_CORE_H */ diff --git a/include/hw/ppc/pnv_homer.h b/include/hw/ppc/pnv_homer.h index 1e91c950f6..bedba94e18 100644 --- a/include/hw/ppc/pnv_homer.h +++ b/include/hw/ppc/pnv_homer.h @@ -21,28 +21,31 @@ #define PPC_PNV_HOMER_H #include "hw/ppc/pnv.h" +#include "qom/object.h" #define TYPE_PNV_HOMER "pnv-homer" +typedef struct PnvHomer PnvHomer; +typedef struct PnvHomerClass PnvHomerClass; #define PNV_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV_HOMER) #define TYPE_PNV8_HOMER TYPE_PNV_HOMER "-POWER8" #define PNV8_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV8_HOMER) #define TYPE_PNV9_HOMER TYPE_PNV_HOMER "-POWER9" #define PNV9_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV9_HOMER) -typedef struct PnvHomer { +struct PnvHomer { DeviceState parent; struct PnvChip *chip; MemoryRegion pba_regs; MemoryRegion regs; -} PnvHomer; +}; #define PNV_HOMER_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvHomerClass, (klass), TYPE_PNV_HOMER) #define PNV_HOMER_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvHomerClass, (obj), TYPE_PNV_HOMER) -typedef struct PnvHomerClass { +struct PnvHomerClass { DeviceClass parent_class; int pba_size; @@ -51,6 +54,6 @@ typedef struct PnvHomerClass { const MemoryRegionOps *homer_ops; hwaddr core_max_base; -} PnvHomerClass; +}; #endif /* PPC_PNV_HOMER_H */ diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h index c1ec85d5e2..50d92517f2 100644 --- a/include/hw/ppc/pnv_lpc.h +++ b/include/hw/ppc/pnv_lpc.h @@ -21,8 +21,11 @@ #define PPC_PNV_LPC_H #include "hw/ppc/pnv_psi.h" +#include "qom/object.h" #define TYPE_PNV_LPC "pnv-lpc" +typedef struct PnvLpcClass PnvLpcClass; +typedef struct PnvLpcController PnvLpcController; #define PNV_LPC(obj) \ OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV_LPC) #define TYPE_PNV8_LPC TYPE_PNV_LPC "-POWER8" @@ -34,7 +37,7 @@ #define TYPE_PNV10_LPC TYPE_PNV_LPC "-POWER10" #define PNV10_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV10_LPC) -typedef struct PnvLpcController { +struct PnvLpcController { DeviceState parent; uint64_t eccb_stat_reg; @@ -79,20 +82,20 @@ typedef struct PnvLpcController { /* PSI to generate interrupts */ PnvPsi *psi; -} PnvLpcController; +}; #define PNV_LPC_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvLpcClass, (klass), TYPE_PNV_LPC) #define PNV_LPC_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvLpcClass, (obj), TYPE_PNV_LPC) -typedef struct PnvLpcClass { +struct PnvLpcClass { DeviceClass parent_class; int psi_irq; DeviceRealize parent_realize; -} PnvLpcClass; +}; /* * Old compilers error on typdef forward declarations. Keep them happy. diff --git a/include/hw/ppc/pnv_occ.h b/include/hw/ppc/pnv_occ.h index f8d3061419..30a9faea78 100644 --- a/include/hw/ppc/pnv_occ.h +++ b/include/hw/ppc/pnv_occ.h @@ -21,8 +21,11 @@ #define PPC_PNV_OCC_H #include "hw/ppc/pnv_psi.h" +#include "qom/object.h" #define TYPE_PNV_OCC "pnv-occ" +typedef struct PnvOCC PnvOCC; +typedef struct PnvOCCClass PnvOCCClass; #define PNV_OCC(obj) OBJECT_CHECK(PnvOCC, (obj), TYPE_PNV_OCC) #define TYPE_PNV8_OCC TYPE_PNV_OCC "-POWER8" #define PNV8_OCC(obj) OBJECT_CHECK(PnvOCC, (obj), TYPE_PNV8_OCC) @@ -32,7 +35,7 @@ #define PNV_OCC_SENSOR_DATA_BLOCK_OFFSET 0x00580000 #define PNV_OCC_SENSOR_DATA_BLOCK_SIZE 0x00025800 -typedef struct PnvOCC { +struct PnvOCC { DeviceState xd; /* OCC Misc interrupt */ @@ -42,20 +45,20 @@ typedef struct PnvOCC { MemoryRegion xscom_regs; MemoryRegion sram_regs; -} PnvOCC; +}; #define PNV_OCC_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvOCCClass, (klass), TYPE_PNV_OCC) #define PNV_OCC_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvOCCClass, (obj), TYPE_PNV_OCC) -typedef struct PnvOCCClass { +struct PnvOCCClass { DeviceClass parent_class; int xscom_size; const MemoryRegionOps *xscom_ops; int psi_irq; -} PnvOCCClass; +}; #define PNV_OCC_SENSOR_DATA_BLOCK_BASE(i) \ (PNV_OCC_SENSOR_DATA_BLOCK_OFFSET + (i) * PNV_OCC_SENSOR_DATA_BLOCK_SIZE) diff --git a/include/hw/ppc/pnv_pnor.h b/include/hw/ppc/pnv_pnor.h index 4f96abdfb4..8b27bf111c 100644 --- a/include/hw/ppc/pnv_pnor.h +++ b/include/hw/ppc/pnv_pnor.h @@ -8,6 +8,7 @@ */ #ifndef _PPC_PNV_PNOR_H #define _PPC_PNV_PNOR_H +#include "qom/object.h" /* * PNOR offset on the LPC FW address space @@ -15,9 +16,10 @@ #define PNOR_SPI_OFFSET 0x0c000000UL #define TYPE_PNV_PNOR "pnv-pnor" +typedef struct PnvPnor PnvPnor; #define PNV_PNOR(obj) OBJECT_CHECK(PnvPnor, (obj), TYPE_PNV_PNOR) -typedef struct PnvPnor { +struct PnvPnor { SysBusDevice parent_obj; BlockBackend *blk; @@ -25,6 +27,6 @@ typedef struct PnvPnor { uint8_t *storage; int64_t size; MemoryRegion mmio; -} PnvPnor; +}; #endif /* _PPC_PNV_PNOR_H */ diff --git a/include/hw/ppc/pnv_psi.h b/include/hw/ppc/pnv_psi.h index 979fc59f33..060a7a110c 100644 --- a/include/hw/ppc/pnv_psi.h +++ b/include/hw/ppc/pnv_psi.h @@ -23,14 +23,17 @@ #include "hw/sysbus.h" #include "hw/ppc/xics.h" #include "hw/ppc/xive.h" +#include "qom/object.h" #define TYPE_PNV_PSI "pnv-psi" +typedef struct PnvPsi PnvPsi; +typedef struct PnvPsiClass PnvPsiClass; #define PNV_PSI(obj) \ OBJECT_CHECK(PnvPsi, (obj), TYPE_PNV_PSI) #define PSIHB_XSCOM_MAX 0x20 -typedef struct PnvPsi { +struct PnvPsi { DeviceState parent; MemoryRegion regs_mr; @@ -47,27 +50,29 @@ typedef struct PnvPsi { uint64_t regs[PSIHB_XSCOM_MAX]; MemoryRegion xscom_regs; -} PnvPsi; +}; #define TYPE_PNV8_PSI TYPE_PNV_PSI "-POWER8" +typedef struct Pnv8Psi Pnv8Psi; #define PNV8_PSI(obj) \ OBJECT_CHECK(Pnv8Psi, (obj), TYPE_PNV8_PSI) -typedef struct Pnv8Psi { +struct Pnv8Psi { PnvPsi parent; ICSState ics; -} Pnv8Psi; +}; #define TYPE_PNV9_PSI TYPE_PNV_PSI "-POWER9" +typedef struct Pnv9Psi Pnv9Psi; #define PNV9_PSI(obj) \ OBJECT_CHECK(Pnv9Psi, (obj), TYPE_PNV9_PSI) -typedef struct Pnv9Psi { +struct Pnv9Psi { PnvPsi parent; XiveSource source; -} Pnv9Psi; +}; #define TYPE_PNV10_PSI TYPE_PNV_PSI "-POWER10" @@ -76,7 +81,7 @@ typedef struct Pnv9Psi { #define PNV_PSI_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvPsiClass, (obj), TYPE_PNV_PSI) -typedef struct PnvPsiClass { +struct PnvPsiClass { SysBusDeviceClass parent_class; uint32_t xscom_pcba; @@ -86,7 +91,7 @@ typedef struct PnvPsiClass { int compat_size; void (*irq_set)(PnvPsi *psi, int, bool state); -} PnvPsiClass; +}; /* The PSI and FSP interrupts are muxed on the same IRQ number */ typedef enum PnvPsiIrq { diff --git a/include/hw/ppc/pnv_xive.h b/include/hw/ppc/pnv_xive.h index 76cf16f644..24c37de184 100644 --- a/include/hw/ppc/pnv_xive.h +++ b/include/hw/ppc/pnv_xive.h @@ -11,10 +11,13 @@ #define PPC_PNV_XIVE_H #include "hw/ppc/xive.h" +#include "qom/object.h" struct PnvChip; #define TYPE_PNV_XIVE "pnv-xive" +typedef struct PnvXive PnvXive; +typedef struct PnvXiveClass PnvXiveClass; #define PNV_XIVE(obj) OBJECT_CHECK(PnvXive, (obj), TYPE_PNV_XIVE) #define PNV_XIVE_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvXiveClass, (klass), TYPE_PNV_XIVE) @@ -28,7 +31,7 @@ struct PnvChip; #define XIVE_TABLE_VDT_MAX 16 /* VDT Domain Table (0-15) */ #define XIVE_TABLE_EDT_MAX 64 /* EDT Domain Table (0-63) */ -typedef struct PnvXive { +struct PnvXive { XiveRouter parent_obj; /* Owning chip */ @@ -87,13 +90,13 @@ typedef struct PnvXive { uint64_t mig[XIVE_TABLE_MIG_MAX]; uint64_t vdt[XIVE_TABLE_VDT_MAX]; uint64_t edt[XIVE_TABLE_EDT_MAX]; -} PnvXive; +}; -typedef struct PnvXiveClass { +struct PnvXiveClass { XiveRouterClass parent_class; DeviceRealize parent_realize; -} PnvXiveClass; +}; void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon); diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 09156a5a7a..fb9b97f5be 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -27,16 +27,17 @@ typedef struct PnvXScomInterface PnvXScomInterface; #define TYPE_PNV_XSCOM_INTERFACE "pnv-xscom-interface" #define PNV_XSCOM_INTERFACE(obj) \ INTERFACE_CHECK(PnvXScomInterface, (obj), TYPE_PNV_XSCOM_INTERFACE) +typedef struct PnvXScomInterfaceClass PnvXScomInterfaceClass; #define PNV_XSCOM_INTERFACE_CLASS(klass) \ OBJECT_CLASS_CHECK(PnvXScomInterfaceClass, (klass), \ TYPE_PNV_XSCOM_INTERFACE) #define PNV_XSCOM_INTERFACE_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvXScomInterfaceClass, (obj), TYPE_PNV_XSCOM_INTERFACE) -typedef struct PnvXScomInterfaceClass { +struct PnvXScomInterfaceClass { InterfaceClass parent; int (*dt_xscom)(PnvXScomInterface *dev, void *fdt, int offset); -} PnvXScomInterfaceClass; +}; /* * Layout of the XSCOM PCB addresses of EX core 1 (POWER 8) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index e50a2672e3..c0be8980c7 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -8,6 +8,7 @@ #include "hw/mem/pc-dimm.h" #include "hw/ppc/spapr_ovec.h" #include "hw/ppc/spapr_irq.h" +#include "qom/object.h" #include "hw/ppc/spapr_xive.h" /* For SpaprXive */ #include "hw/ppc/xics.h" /* For ICSState */ #include "hw/ppc/spapr_tpm_proxy.h" @@ -27,10 +28,10 @@ typedef struct SpaprPendingHpt SpaprPendingHpt; #define TYPE_SPAPR_RTC "spapr-rtc" +typedef struct SpaprRtcState SpaprRtcState; #define SPAPR_RTC(obj) \ OBJECT_CHECK(SpaprRtcState, (obj), TYPE_SPAPR_RTC) -typedef struct SpaprRtcState SpaprRtcState; struct SpaprRtcState { /*< private >*/ DeviceState parent_obj; diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h index 7aed8f555b..adcf74dbc3 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -13,8 +13,11 @@ #include "hw/qdev-core.h" #include "target/ppc/cpu-qom.h" #include "target/ppc/cpu.h" +#include "qom/object.h" #define TYPE_SPAPR_CPU_CORE "spapr-cpu-core" +typedef struct SpaprCpuCore SpaprCpuCore; +typedef struct SpaprCpuCoreClass SpaprCpuCoreClass; #define SPAPR_CPU_CORE(obj) \ OBJECT_CHECK(SpaprCpuCore, (obj), TYPE_SPAPR_CPU_CORE) #define SPAPR_CPU_CORE_CLASS(klass) \ @@ -24,7 +27,7 @@ #define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE -typedef struct SpaprCpuCore { +struct SpaprCpuCore { /*< private >*/ CPUCore parent_obj; @@ -32,12 +35,12 @@ typedef struct SpaprCpuCore { PowerPCCPU **threads; int node_id; bool pre_3_0_migration; /* older machine don't know about SpaprCpuState */ -} SpaprCpuCore; +}; -typedef struct SpaprCpuCoreClass { +struct SpaprCpuCoreClass { DeviceClass parent_class; const char *cpu_type; -} SpaprCpuCoreClass; +}; const char *spapr_get_cpu_core_type(const char *cpu_type); void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index b161ccebc2..83addd0a0b 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -11,6 +11,7 @@ #define HW_SPAPR_IRQ_H #include "target/ppc/cpu-qom.h" +#include "qom/object.h" /* * IRQ range offsets per device type @@ -35,12 +36,13 @@ typedef struct SpaprInterruptController SpaprInterruptController; #define TYPE_SPAPR_INTC "spapr-interrupt-controller" #define SPAPR_INTC(obj) \ INTERFACE_CHECK(SpaprInterruptController, (obj), TYPE_SPAPR_INTC) +typedef struct SpaprInterruptControllerClass SpaprInterruptControllerClass; #define SPAPR_INTC_CLASS(klass) \ OBJECT_CLASS_CHECK(SpaprInterruptControllerClass, (klass), TYPE_SPAPR_INTC) #define SPAPR_INTC_GET_CLASS(obj) \ OBJECT_GET_CLASS(SpaprInterruptControllerClass, (obj), TYPE_SPAPR_INTC) -typedef struct SpaprInterruptControllerClass { +struct SpaprInterruptControllerClass { InterfaceClass parent; int (*activate)(SpaprInterruptController *intc, uint32_t nr_servers, @@ -65,7 +67,7 @@ typedef struct SpaprInterruptControllerClass { void (*dt)(SpaprInterruptController *intc, uint32_t nr_servers, void *fdt, uint32_t phandle); int (*post_load)(SpaprInterruptController *intc, int version_id); -} SpaprInterruptControllerClass; +}; void spapr_irq_update_active_intc(struct SpaprMachineState *spapr); diff --git a/include/hw/ppc/spapr_tpm_proxy.h b/include/hw/ppc/spapr_tpm_proxy.h index c574e22ba4..1e9890d978 100644 --- a/include/hw/ppc/spapr_tpm_proxy.h +++ b/include/hw/ppc/spapr_tpm_proxy.h @@ -17,15 +17,16 @@ #include "hw/qdev-core.h" #define TYPE_SPAPR_TPM_PROXY "spapr-tpm-proxy" +typedef struct SpaprTpmProxy SpaprTpmProxy; #define SPAPR_TPM_PROXY(obj) OBJECT_CHECK(SpaprTpmProxy, (obj), \ TYPE_SPAPR_TPM_PROXY) -typedef struct SpaprTpmProxy { +struct SpaprTpmProxy { /*< private >*/ DeviceState parent; char *host_path; int host_fd; -} SpaprTpmProxy; +}; #endif /* HW_SPAPR_TPM_PROXY_H */ diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h index bed7df60e3..9c9d14e63b 100644 --- a/include/hw/ppc/spapr_vio.h +++ b/include/hw/ppc/spapr_vio.h @@ -25,8 +25,11 @@ #include "hw/ppc/spapr.h" #include "sysemu/dma.h" #include "hw/irq.h" +#include "qom/object.h" #define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device" +typedef struct SpaprVioDevice SpaprVioDevice; +typedef struct SpaprVioDeviceClass SpaprVioDeviceClass; #define VIO_SPAPR_DEVICE(obj) \ OBJECT_CHECK(SpaprVioDevice, (obj), TYPE_VIO_SPAPR_DEVICE) #define VIO_SPAPR_DEVICE_CLASS(klass) \ @@ -35,6 +38,7 @@ OBJECT_GET_CLASS(SpaprVioDeviceClass, (obj), TYPE_VIO_SPAPR_DEVICE) #define TYPE_SPAPR_VIO_BUS "spapr-vio-bus" +typedef struct SpaprVioBus SpaprVioBus; #define SPAPR_VIO_BUS(obj) OBJECT_CHECK(SpaprVioBus, (obj), TYPE_SPAPR_VIO_BUS) #define TYPE_SPAPR_VIO_BRIDGE "spapr-vio-bridge" @@ -46,10 +50,8 @@ typedef struct SpaprVioCrq { int(*SendFunc)(struct SpaprVioDevice *vdev, uint8_t *crq); } SpaprVioCrq; -typedef struct SpaprVioDevice SpaprVioDevice; -typedef struct SpaprVioBus SpaprVioBus; -typedef struct SpaprVioDeviceClass { +struct SpaprVioDeviceClass { DeviceClass parent_class; const char *dt_name, *dt_type, *dt_compatible; @@ -59,7 +61,7 @@ typedef struct SpaprVioDeviceClass { void (*reset)(SpaprVioDevice *dev); int (*devnode)(SpaprVioDevice *dev, void *fdt, int node_off); const char *(*get_dt_compatible)(SpaprVioDevice *dev); -} SpaprVioDeviceClass; +}; struct SpaprVioDevice { DeviceState qdev; diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 9ed58ec7e9..e5f48faba0 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -30,6 +30,7 @@ #include "exec/memory.h" #include "hw/qdev-core.h" +#include "qom/object.h" #define XICS_IPI 0x2 #define XICS_BUID 0x1 @@ -145,17 +146,18 @@ struct ICSIRQState { #define TYPE_XICS_FABRIC "xics-fabric" #define XICS_FABRIC(obj) \ INTERFACE_CHECK(XICSFabric, (obj), TYPE_XICS_FABRIC) +typedef struct XICSFabricClass XICSFabricClass; #define XICS_FABRIC_CLASS(klass) \ OBJECT_CLASS_CHECK(XICSFabricClass, (klass), TYPE_XICS_FABRIC) #define XICS_FABRIC_GET_CLASS(obj) \ OBJECT_GET_CLASS(XICSFabricClass, (obj), TYPE_XICS_FABRIC) -typedef struct XICSFabricClass { +struct XICSFabricClass { InterfaceClass parent; ICSState *(*ics_get)(XICSFabric *xi, int irq); void (*ics_resend)(XICSFabric *xi); ICPState *(*icp_get)(XICSFabric *xi, int server); -} XICSFabricClass; +}; ICPState *xics_icp_get(XICSFabric *xi, int server); diff --git a/include/hw/ppc/xics_spapr.h b/include/hw/ppc/xics_spapr.h index 1c65c96e3c..09e428de4e 100644 --- a/include/hw/ppc/xics_spapr.h +++ b/include/hw/ppc/xics_spapr.h @@ -28,6 +28,7 @@ #define XICS_SPAPR_H #include "hw/ppc/spapr.h" +#include "qom/object.h" #define TYPE_ICS_SPAPR "ics-spapr" #define ICS_SPAPR(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_SPAPR) diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index 2c42ae92d2..8ef9af1969 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -143,6 +143,7 @@ #include "sysemu/kvm.h" #include "hw/sysbus.h" #include "hw/ppc/xive_regs.h" +#include "qom/object.h" /* * XIVE Notifier (Interface between Source and Router) @@ -153,21 +154,23 @@ typedef struct XiveNotifier XiveNotifier; #define TYPE_XIVE_NOTIFIER "xive-notifier" #define XIVE_NOTIFIER(obj) \ INTERFACE_CHECK(XiveNotifier, (obj), TYPE_XIVE_NOTIFIER) +typedef struct XiveNotifierClass XiveNotifierClass; #define XIVE_NOTIFIER_CLASS(klass) \ OBJECT_CLASS_CHECK(XiveNotifierClass, (klass), TYPE_XIVE_NOTIFIER) #define XIVE_NOTIFIER_GET_CLASS(obj) \ OBJECT_GET_CLASS(XiveNotifierClass, (obj), TYPE_XIVE_NOTIFIER) -typedef struct XiveNotifierClass { +struct XiveNotifierClass { InterfaceClass parent; void (*notify)(XiveNotifier *xn, uint32_t lisn); -} XiveNotifierClass; +}; /* * XIVE Interrupt Source */ #define TYPE_XIVE_SOURCE "xive-source" +typedef struct XiveSource XiveSource; #define XIVE_SOURCE(obj) OBJECT_CHECK(XiveSource, (obj), TYPE_XIVE_SOURCE) /* @@ -177,7 +180,7 @@ typedef struct XiveNotifierClass { #define XIVE_SRC_H_INT_ESB 0x1 /* ESB managed with hcall H_INT_ESB */ #define XIVE_SRC_STORE_EOI 0x2 /* Store EOI supported */ -typedef struct XiveSource { +struct XiveSource { DeviceState parent; /* IRQs */ @@ -198,7 +201,7 @@ typedef struct XiveSource { MemoryRegion esb_mmio_kvm; XiveNotifier *xive; -} XiveSource; +}; /* * ESB MMIO setting. Can be one page, for both source triggering and @@ -304,6 +307,7 @@ void xive_source_set_irq(void *opaque, int srcno, int val); */ #define TYPE_XIVE_TCTX "xive-tctx" +typedef struct XiveTCTX XiveTCTX; #define XIVE_TCTX(obj) OBJECT_CHECK(XiveTCTX, (obj), TYPE_XIVE_TCTX) /* @@ -319,7 +323,7 @@ void xive_source_set_irq(void *opaque, int srcno, int val); typedef struct XivePresenter XivePresenter; -typedef struct XiveTCTX { +struct XiveTCTX { DeviceState parent_obj; CPUState *cs; @@ -329,20 +333,22 @@ typedef struct XiveTCTX { uint8_t regs[XIVE_TM_RING_COUNT * XIVE_TM_RING_SIZE]; XivePresenter *xptr; -} XiveTCTX; +}; /* * XIVE Router */ typedef struct XiveFabric XiveFabric; -typedef struct XiveRouter { +struct XiveRouter { SysBusDevice parent; XiveFabric *xfb; -} XiveRouter; +}; +typedef struct XiveRouter XiveRouter; #define TYPE_XIVE_ROUTER "xive-router" +typedef struct XiveRouterClass XiveRouterClass; #define XIVE_ROUTER(obj) \ OBJECT_CHECK(XiveRouter, (obj), TYPE_XIVE_ROUTER) #define XIVE_ROUTER_CLASS(klass) \ @@ -350,7 +356,7 @@ typedef struct XiveRouter { #define XIVE_ROUTER_GET_CLASS(obj) \ OBJECT_GET_CLASS(XiveRouterClass, (obj), TYPE_XIVE_ROUTER) -typedef struct XiveRouterClass { +struct XiveRouterClass { SysBusDeviceClass parent; /* XIVE table accessors */ @@ -365,7 +371,7 @@ typedef struct XiveRouterClass { int (*write_nvt)(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx, XiveNVT *nvt, uint8_t word_number); uint8_t (*get_block_id)(XiveRouter *xrtr); -} XiveRouterClass; +}; int xive_router_get_eas(XiveRouter *xrtr, uint8_t eas_blk, uint32_t eas_idx, XiveEAS *eas); @@ -391,19 +397,20 @@ typedef struct XiveTCTXMatch { #define TYPE_XIVE_PRESENTER "xive-presenter" #define XIVE_PRESENTER(obj) \ INTERFACE_CHECK(XivePresenter, (obj), TYPE_XIVE_PRESENTER) +typedef struct XivePresenterClass XivePresenterClass; #define XIVE_PRESENTER_CLASS(klass) \ OBJECT_CLASS_CHECK(XivePresenterClass, (klass), TYPE_XIVE_PRESENTER) #define XIVE_PRESENTER_GET_CLASS(obj) \ OBJECT_GET_CLASS(XivePresenterClass, (obj), TYPE_XIVE_PRESENTER) -typedef struct XivePresenterClass { +struct XivePresenterClass { InterfaceClass parent; int (*match_nvt)(XivePresenter *xptr, uint8_t format, uint8_t nvt_blk, uint32_t nvt_idx, bool cam_ignore, uint8_t priority, uint32_t logic_serv, XiveTCTXMatch *match); bool (*in_kernel)(const XivePresenter *xptr); -} XivePresenterClass; +}; int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx, uint8_t format, @@ -417,28 +424,30 @@ int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx, #define TYPE_XIVE_FABRIC "xive-fabric" #define XIVE_FABRIC(obj) \ INTERFACE_CHECK(XiveFabric, (obj), TYPE_XIVE_FABRIC) +typedef struct XiveFabricClass XiveFabricClass; #define XIVE_FABRIC_CLASS(klass) \ OBJECT_CLASS_CHECK(XiveFabricClass, (klass), TYPE_XIVE_FABRIC) #define XIVE_FABRIC_GET_CLASS(obj) \ OBJECT_GET_CLASS(XiveFabricClass, (obj), TYPE_XIVE_FABRIC) -typedef struct XiveFabricClass { +struct XiveFabricClass { InterfaceClass parent; int (*match_nvt)(XiveFabric *xfb, uint8_t format, uint8_t nvt_blk, uint32_t nvt_idx, bool cam_ignore, uint8_t priority, uint32_t logic_serv, XiveTCTXMatch *match); -} XiveFabricClass; +}; /* * XIVE END ESBs */ #define TYPE_XIVE_END_SOURCE "xive-end-source" +typedef struct XiveENDSource XiveENDSource; #define XIVE_END_SOURCE(obj) \ OBJECT_CHECK(XiveENDSource, (obj), TYPE_XIVE_END_SOURCE) -typedef struct XiveENDSource { +struct XiveENDSource { DeviceState parent; uint32_t nr_ends; @@ -448,7 +457,7 @@ typedef struct XiveENDSource { MemoryRegion esb_mmio; XiveRouter *xrtr; -} XiveENDSource; +}; /* * For legacy compatibility, the exceptions define up to 256 different diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index ea3f73a282..479377f37b 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -12,6 +12,7 @@ enum { }; #define TYPE_DEVICE "device" +typedef struct DeviceClass DeviceClass; #define DEVICE(obj) OBJECT_CHECK(DeviceState, (obj), TYPE_DEVICE) #define DEVICE_CLASS(klass) OBJECT_CLASS_CHECK(DeviceClass, (klass), TYPE_DEVICE) #define DEVICE_GET_CLASS(obj) OBJECT_GET_CLASS(DeviceClass, (obj), TYPE_DEVICE) @@ -93,7 +94,7 @@ typedef void (*BusUnrealize)(BusState *bus); * until it was marked don't hide and qdev_device_add called again. * */ -typedef struct DeviceClass { +struct DeviceClass { /*< private >*/ ObjectClass parent_class; /*< public >*/ @@ -137,7 +138,7 @@ typedef struct DeviceClass { /* Private to qdev / bus. */ const char *bus_type; -} DeviceClass; +}; typedef struct NamedGPIOList NamedGPIOList; diff --git a/include/hw/rdma/rdma.h b/include/hw/rdma/rdma.h index fd3d70103d..aef82e58db 100644 --- a/include/hw/rdma/rdma.h +++ b/include/hw/rdma/rdma.h @@ -19,6 +19,7 @@ #define INTERFACE_RDMA_PROVIDER "rdma" +typedef struct RdmaProviderClass RdmaProviderClass; #define RDMA_PROVIDER_CLASS(klass) \ OBJECT_CLASS_CHECK(RdmaProviderClass, (klass), \ INTERFACE_RDMA_PROVIDER) @@ -31,10 +32,10 @@ typedef struct RdmaProvider RdmaProvider; -typedef struct RdmaProviderClass { +struct RdmaProviderClass { InterfaceClass parent; void (*print_statistics)(Monitor *mon, RdmaProvider *obj); -} RdmaProviderClass; +}; #endif diff --git a/include/hw/register.h b/include/hw/register.h index fdac5e69b5..29c669e901 100644 --- a/include/hw/register.h +++ b/include/hw/register.h @@ -14,6 +14,7 @@ #include "hw/qdev-core.h" #include "exec/memory.h" #include "hw/registerfields.h" +#include "qom/object.h" typedef struct RegisterInfo RegisterInfo; typedef struct RegisterAccessInfo RegisterAccessInfo; diff --git a/include/hw/resettable.h b/include/hw/resettable.h index f4c4bab0ef..bcd36bce06 100644 --- a/include/hw/resettable.h +++ b/include/hw/resettable.h @@ -17,6 +17,7 @@ #define TYPE_RESETTABLE_INTERFACE "resettable" +typedef struct ResettableClass ResettableClass; #define RESETTABLE_CLASS(class) \ OBJECT_CLASS_CHECK(ResettableClass, (class), TYPE_RESETTABLE_INTERFACE) @@ -119,7 +120,7 @@ typedef struct ResettablePhases { ResettableHoldPhase hold; ResettableExitPhase exit; } ResettablePhases; -typedef struct ResettableClass { +struct ResettableClass { InterfaceClass parent_class; /* Phase methods */ @@ -133,7 +134,7 @@ typedef struct ResettableClass { /* Hierarchy handling method */ ResettableChildForeach child_foreach; -} ResettableClass; +}; /** * ResettableState: diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index 835a80f896..b42599ff54 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -22,12 +22,14 @@ #include "hw/riscv/riscv_hart.h" #include "hw/intc/ibex_plic.h" #include "hw/char/ibex_uart.h" +#include "qom/object.h" #define TYPE_RISCV_IBEX_SOC "riscv.lowrisc.ibex.soc" +typedef struct LowRISCIbexSoCState LowRISCIbexSoCState; #define RISCV_IBEX_SOC(obj) \ OBJECT_CHECK(LowRISCIbexSoCState, (obj), TYPE_RISCV_IBEX_SOC) -typedef struct LowRISCIbexSoCState { +struct LowRISCIbexSoCState { /*< private >*/ SysBusDevice parent_obj; @@ -38,7 +40,7 @@ typedef struct LowRISCIbexSoCState { MemoryRegion flash_mem; MemoryRegion rom; -} LowRISCIbexSoCState; +}; typedef struct OpenTitanState { /*< private >*/ diff --git a/include/hw/riscv/riscv_hart.h b/include/hw/riscv/riscv_hart.h index c75856fa73..617b977214 100644 --- a/include/hw/riscv/riscv_hart.h +++ b/include/hw/riscv/riscv_hart.h @@ -23,13 +23,15 @@ #include "hw/sysbus.h" #include "target/riscv/cpu.h" +#include "qom/object.h" #define TYPE_RISCV_HART_ARRAY "riscv.hart_array" +typedef struct RISCVHartArrayState RISCVHartArrayState; #define RISCV_HART_ARRAY(obj) \ OBJECT_CHECK(RISCVHartArrayState, (obj), TYPE_RISCV_HART_ARRAY) -typedef struct RISCVHartArrayState { +struct RISCVHartArrayState { /*< private >*/ SysBusDevice parent_obj; @@ -38,6 +40,6 @@ typedef struct RISCVHartArrayState { uint32_t hartid_base; char *cpu_type; RISCVCPU *harts; -} RISCVHartArrayState; +}; #endif diff --git a/include/hw/riscv/spike.h b/include/hw/riscv/spike.h index b0a18a9c94..121396d07a 100644 --- a/include/hw/riscv/spike.h +++ b/include/hw/riscv/spike.h @@ -21,15 +21,17 @@ #include "hw/riscv/riscv_hart.h" #include "hw/sysbus.h" +#include "qom/object.h" #define SPIKE_CPUS_MAX 8 #define SPIKE_SOCKETS_MAX 8 #define TYPE_SPIKE_MACHINE MACHINE_TYPE_NAME("spike") +typedef struct SpikeState SpikeState; #define SPIKE_MACHINE(obj) \ OBJECT_CHECK(SpikeState, (obj), TYPE_SPIKE_MACHINE) -typedef struct { +struct SpikeState { /*< private >*/ MachineState parent; @@ -37,7 +39,7 @@ typedef struct { RISCVHartArrayState soc[SPIKE_SOCKETS_MAX]; void *fdt; int fdt_size; -} SpikeState; +}; enum { SPIKE_MROM, diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 1beacd7666..3069379c84 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -22,15 +22,17 @@ #include "hw/riscv/riscv_hart.h" #include "hw/sysbus.h" #include "hw/block/flash.h" +#include "qom/object.h" #define VIRT_CPUS_MAX 8 #define VIRT_SOCKETS_MAX 8 #define TYPE_RISCV_VIRT_MACHINE MACHINE_TYPE_NAME("virt") +typedef struct RISCVVirtState RISCVVirtState; #define RISCV_VIRT_MACHINE(obj) \ OBJECT_CHECK(RISCVVirtState, (obj), TYPE_RISCV_VIRT_MACHINE) -typedef struct { +struct RISCVVirtState { /*< private >*/ MachineState parent; @@ -41,7 +43,7 @@ typedef struct { void *fdt; int fdt_size; -} RISCVVirtState; +}; enum { VIRT_DEBUG, diff --git a/include/hw/rtc/allwinner-rtc.h b/include/hw/rtc/allwinner-rtc.h index 7893f74795..1126e05f23 100644 --- a/include/hw/rtc/allwinner-rtc.h +++ b/include/hw/rtc/allwinner-rtc.h @@ -60,6 +60,8 @@ * @{ */ +typedef struct AwRtcClass AwRtcClass; +typedef struct AwRtcState AwRtcState; #define AW_RTC(obj) \ OBJECT_CHECK(AwRtcState, (obj), TYPE_AW_RTC) #define AW_RTC_CLASS(klass) \ @@ -72,7 +74,7 @@ /** * Allwinner RTC per-object instance state. */ -typedef struct AwRtcState { +struct AwRtcState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -92,7 +94,7 @@ typedef struct AwRtcState { /** Array of hardware registers */ uint32_t regs[AW_RTC_REGS_NUM]; -} AwRtcState; +}; /** * Allwinner RTC class-level struct. @@ -101,7 +103,7 @@ typedef struct AwRtcState { * such that the generic code can use this struct to support * all devices. */ -typedef struct AwRtcClass { +struct AwRtcClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ @@ -129,6 +131,6 @@ typedef struct AwRtcClass { */ bool (*write)(AwRtcState *s, uint32_t offset, uint32_t data); -} AwRtcClass; +}; #endif /* HW_MISC_ALLWINNER_RTC_H */ diff --git a/include/hw/rtc/aspeed_rtc.h b/include/hw/rtc/aspeed_rtc.h index b94a710268..295f4a7d30 100644 --- a/include/hw/rtc/aspeed_rtc.h +++ b/include/hw/rtc/aspeed_rtc.h @@ -9,8 +9,9 @@ #define HW_RTC_ASPEED_RTC_H #include "hw/sysbus.h" +#include "qom/object.h" -typedef struct AspeedRtcState { +struct AspeedRtcState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -19,7 +20,8 @@ typedef struct AspeedRtcState { uint32_t reg[0x18]; int offset; -} AspeedRtcState; +}; +typedef struct AspeedRtcState AspeedRtcState; #define TYPE_ASPEED_RTC "aspeed.rtc" #define ASPEED_RTC(obj) OBJECT_CHECK(AspeedRtcState, (obj), TYPE_ASPEED_RTC) diff --git a/include/hw/rtc/goldfish_rtc.h b/include/hw/rtc/goldfish_rtc.h index 9bd8924f5f..f31b0cbb89 100644 --- a/include/hw/rtc/goldfish_rtc.h +++ b/include/hw/rtc/goldfish_rtc.h @@ -23,12 +23,14 @@ #define HW_RTC_GOLDFISH_RTC_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_GOLDFISH_RTC "goldfish_rtc" +typedef struct GoldfishRTCState GoldfishRTCState; #define GOLDFISH_RTC(obj) \ OBJECT_CHECK(GoldfishRTCState, (obj), TYPE_GOLDFISH_RTC) -typedef struct GoldfishRTCState { +struct GoldfishRTCState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -42,6 +44,6 @@ typedef struct GoldfishRTCState { uint32_t irq_pending; uint32_t irq_enabled; uint32_t time_high; -} GoldfishRTCState; +}; #endif diff --git a/include/hw/rtc/m48t59.h b/include/hw/rtc/m48t59.h index e7ea4e8761..78aae2c072 100644 --- a/include/hw/rtc/m48t59.h +++ b/include/hw/rtc/m48t59.h @@ -31,6 +31,7 @@ #define TYPE_NVRAM "nvram" +typedef struct NvramClass NvramClass; #define NVRAM_CLASS(klass) \ OBJECT_CLASS_CHECK(NvramClass, (klass), TYPE_NVRAM) #define NVRAM_GET_CLASS(obj) \ @@ -40,13 +41,13 @@ typedef struct Nvram Nvram; -typedef struct NvramClass { +struct NvramClass { InterfaceClass parent; uint32_t (*read)(Nvram *obj, uint32_t addr); void (*write)(Nvram *obj, uint32_t addr, uint32_t val); void (*toggle_lock)(Nvram *obj, int lock); -} NvramClass; +}; Nvram *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size, int base_year, int type); diff --git a/include/hw/rtc/mc146818rtc.h b/include/hw/rtc/mc146818rtc.h index 3713181b56..7b42d9c534 100644 --- a/include/hw/rtc/mc146818rtc.h +++ b/include/hw/rtc/mc146818rtc.h @@ -13,11 +13,13 @@ #include "qemu/queue.h" #include "qemu/timer.h" #include "hw/isa/isa.h" +#include "qom/object.h" #define TYPE_MC146818_RTC "mc146818rtc" +typedef struct RTCState RTCState; #define MC146818_RTC(obj) OBJECT_CHECK(RTCState, (obj), TYPE_MC146818_RTC) -typedef struct RTCState { +struct RTCState { ISADevice parent_obj; MemoryRegion io; @@ -44,7 +46,7 @@ typedef struct RTCState { LostTickPolicy lost_tick_policy; Notifier suspend_notifier; QLIST_ENTRY(RTCState) link; -} RTCState; +}; #define RTC_ISA_IRQ 8 #define RTC_ISA_BASE 0x70 diff --git a/include/hw/rtc/pl031.h b/include/hw/rtc/pl031.h index e3cb1d646f..3ddf48cc76 100644 --- a/include/hw/rtc/pl031.h +++ b/include/hw/rtc/pl031.h @@ -16,11 +16,13 @@ #include "hw/sysbus.h" #include "qemu/timer.h" +#include "qom/object.h" #define TYPE_PL031 "pl031" +typedef struct PL031State PL031State; #define PL031(obj) OBJECT_CHECK(PL031State, (obj), TYPE_PL031) -typedef struct PL031State { +struct PL031State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -42,6 +44,6 @@ typedef struct PL031State { uint32_t cr; uint32_t im; uint32_t is; -} PL031State; +}; #endif diff --git a/include/hw/rtc/xlnx-zynqmp-rtc.h b/include/hw/rtc/xlnx-zynqmp-rtc.h index 6fa1cb2f43..95c85d3bf1 100644 --- a/include/hw/rtc/xlnx-zynqmp-rtc.h +++ b/include/hw/rtc/xlnx-zynqmp-rtc.h @@ -29,9 +29,11 @@ #include "hw/register.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_XLNX_ZYNQMP_RTC "xlnx-zynmp.rtc" +typedef struct XlnxZynqMPRTC XlnxZynqMPRTC; #define XLNX_ZYNQMP_RTC(obj) \ OBJECT_CHECK(XlnxZynqMPRTC, (obj), TYPE_XLNX_ZYNQMP_RTC) @@ -77,7 +79,7 @@ REG32(SAFETY_CHK, 0x50) #define XLNX_ZYNQMP_RTC_R_MAX (R_SAFETY_CHK + 1) -typedef struct XlnxZynqMPRTC { +struct XlnxZynqMPRTC { SysBusDevice parent_obj; MemoryRegion iomem; qemu_irq irq_rtc_int; @@ -87,6 +89,6 @@ typedef struct XlnxZynqMPRTC { uint32_t regs[XLNX_ZYNQMP_RTC_R_MAX]; RegisterInfo regs_info[XLNX_ZYNQMP_RTC_R_MAX]; -} XlnxZynqMPRTC; +}; #endif diff --git a/include/hw/rx/rx62n.h b/include/hw/rx/rx62n.h index aa94758c27..4451a9e006 100644 --- a/include/hw/rx/rx62n.h +++ b/include/hw/rx/rx62n.h @@ -30,8 +30,10 @@ #include "hw/timer/renesas_cmt.h" #include "hw/char/renesas_sci.h" #include "qemu/units.h" +#include "qom/object.h" #define TYPE_RX62N_MCU "rx62n-mcu" +typedef struct RX62NState RX62NState; #define RX62N_MCU(obj) OBJECT_CHECK(RX62NState, (obj), TYPE_RX62N_MCU) #define TYPE_R5F562N7_MCU "r5f562n7-mcu" @@ -45,7 +47,7 @@ #define RX62N_NR_CMT 2 #define RX62N_NR_SCI 6 -typedef struct RX62NState { +struct RX62NState { /*< private >*/ DeviceState parent_obj; /*< public >*/ @@ -71,6 +73,6 @@ typedef struct RX62NState { uint32_t xtal_freq_hz; /* Peripheral Module Clock frequency */ uint32_t pclk_freq_hz; -} RX62NState; +}; #endif diff --git a/include/hw/s390x/3270-ccw.h b/include/hw/s390x/3270-ccw.h index 9d1d18e2bd..ac254f95ed 100644 --- a/include/hw/s390x/3270-ccw.h +++ b/include/hw/s390x/3270-ccw.h @@ -16,6 +16,7 @@ #include "hw/sysbus.h" #include "hw/s390x/css.h" #include "hw/s390x/ccw-device.h" +#include "qom/object.h" #define EMULATED_CCW_3270_CU_TYPE 0x3270 #define EMULATED_CCW_3270_CHPID_TYPE 0x1a @@ -30,6 +31,8 @@ #define TC_EWRITEA 0x0d /* Erase write alternate */ #define TC_WRITESF 0x11 /* Write structured field */ +typedef struct EmulatedCcw3270Class EmulatedCcw3270Class; +typedef struct EmulatedCcw3270Device EmulatedCcw3270Device; #define EMULATED_CCW_3270(obj) \ OBJECT_CHECK(EmulatedCcw3270Device, (obj), TYPE_EMULATED_CCW_3270) #define EMULATED_CCW_3270_CLASS(klass) \ @@ -37,16 +40,16 @@ #define EMULATED_CCW_3270_GET_CLASS(obj) \ OBJECT_GET_CLASS(EmulatedCcw3270Class, (obj), TYPE_EMULATED_CCW_3270) -typedef struct EmulatedCcw3270Device { +struct EmulatedCcw3270Device { CcwDevice parent_obj; -} EmulatedCcw3270Device; +}; -typedef struct EmulatedCcw3270Class { +struct EmulatedCcw3270Class { CCWDeviceClass parent_class; void (*init)(EmulatedCcw3270Device *, Error **); int (*read_payload_3270)(EmulatedCcw3270Device *); int (*write_payload_3270)(EmulatedCcw3270Device *, uint8_t); -} EmulatedCcw3270Class; +}; #endif diff --git a/include/hw/s390x/ap-device.h b/include/hw/s390x/ap-device.h index 8df9cd2954..b3b3e98a67 100644 --- a/include/hw/s390x/ap-device.h +++ b/include/hw/s390x/ap-device.h @@ -12,12 +12,14 @@ #define HW_S390X_AP_DEVICE_H #include "hw/qdev-core.h" +#include "qom/object.h" #define AP_DEVICE_TYPE "ap-device" -typedef struct APDevice { +struct APDevice { DeviceState parent_obj; -} APDevice; +}; +typedef struct APDevice APDevice; #define AP_DEVICE(obj) \ OBJECT_CHECK(APDevice, (obj), AP_DEVICE_TYPE) diff --git a/include/hw/s390x/css-bridge.h b/include/hw/s390x/css-bridge.h index f7ed2d9a03..05786b38de 100644 --- a/include/hw/s390x/css-bridge.h +++ b/include/hw/s390x/css-bridge.h @@ -17,19 +17,21 @@ #include "hw/sysbus.h" /* virtual css bridge */ -typedef struct VirtualCssBridge { +struct VirtualCssBridge { SysBusDevice sysbus_dev; bool css_dev_path; -} VirtualCssBridge; +}; +typedef struct VirtualCssBridge VirtualCssBridge; #define TYPE_VIRTUAL_CSS_BRIDGE "virtual-css-bridge" #define VIRTUAL_CSS_BRIDGE(obj) \ OBJECT_CHECK(VirtualCssBridge, (obj), TYPE_VIRTUAL_CSS_BRIDGE) /* virtual css bus type */ -typedef struct VirtualCssBus { +struct VirtualCssBus { BusState parent_obj; -} VirtualCssBus; +}; +typedef struct VirtualCssBus VirtualCssBus; #define TYPE_VIRTUAL_CSS_BUS "virtual-css-bus" #define VIRTUAL_CSS_BUS(obj) \ diff --git a/include/hw/s390x/event-facility.h b/include/hw/s390x/event-facility.h index e61c4651d7..dd1a6a44c0 100644 --- a/include/hw/s390x/event-facility.h +++ b/include/hw/s390x/event-facility.h @@ -18,6 +18,7 @@ #include "qemu/thread.h" #include "hw/qdev-core.h" #include "hw/s390x/sclp.h" +#include "qom/object.h" /* SCLP event types */ #define SCLP_EVENT_OPRTNS_COMMAND 0x01 @@ -41,6 +42,8 @@ #define SCLP_SELECTIVE_READ 0x01 #define TYPE_SCLP_EVENT "s390-sclp-event-type" +typedef struct SCLPEvent SCLPEvent; +typedef struct SCLPEventClass SCLPEventClass; #define SCLP_EVENT(obj) \ OBJECT_CHECK(SCLPEvent, (obj), TYPE_SCLP_EVENT) #define SCLP_EVENT_CLASS(klass) \ @@ -169,13 +172,13 @@ typedef struct ReadEventData { }; } QEMU_PACKED ReadEventData; -typedef struct SCLPEvent { +struct SCLPEvent { DeviceState qdev; bool event_pending; char *name; -} SCLPEvent; +}; -typedef struct SCLPEventClass { +struct SCLPEventClass { DeviceClass parent_class; int (*init)(SCLPEvent *event); @@ -192,10 +195,11 @@ typedef struct SCLPEventClass { /* can we handle this event type? */ bool (*can_handle_event)(uint8_t type); -} SCLPEventClass; +}; #define TYPE_SCLP_EVENT_FACILITY "s390-sclp-event-facility" typedef struct SCLPEventFacility SCLPEventFacility; +typedef struct SCLPEventFacilityClass SCLPEventFacilityClass; #define EVENT_FACILITY(obj) \ OBJECT_CHECK(SCLPEventFacility, (obj), TYPE_SCLP_EVENT_FACILITY) #define EVENT_FACILITY_CLASS(klass) \ @@ -205,11 +209,11 @@ typedef struct SCLPEventFacility SCLPEventFacility; OBJECT_GET_CLASS(SCLPEventFacilityClass, (obj), \ TYPE_SCLP_EVENT_FACILITY) -typedef struct SCLPEventFacilityClass { +struct SCLPEventFacilityClass { SysBusDeviceClass parent_class; void (*command_handler)(SCLPEventFacility *ef, SCCB *sccb, uint64_t code); bool (*event_pending)(SCLPEventFacility *ef); -} SCLPEventFacilityClass; +}; BusState *sclp_get_event_facility_bus(void); diff --git a/include/hw/s390x/s390-ccw.h b/include/hw/s390x/s390-ccw.h index d8e08b5f4c..f0f96952f1 100644 --- a/include/hw/s390x/s390-ccw.h +++ b/include/hw/s390x/s390-ccw.h @@ -14,8 +14,11 @@ #define HW_S390_CCW_H #include "hw/s390x/ccw-device.h" +#include "qom/object.h" #define TYPE_S390_CCW "s390-ccw" +typedef struct S390CCWDevice S390CCWDevice; +typedef struct S390CCWDeviceClass S390CCWDeviceClass; #define S390_CCW_DEVICE(obj) \ OBJECT_CHECK(S390CCWDevice, (obj), TYPE_S390_CCW) #define S390_CCW_DEVICE_CLASS(klass) \ @@ -23,14 +26,14 @@ #define S390_CCW_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(S390CCWDeviceClass, (obj), TYPE_S390_CCW) -typedef struct S390CCWDevice { +struct S390CCWDevice { CcwDevice parent_obj; CssDevId hostid; char *mdevid; int32_t bootindex; -} S390CCWDevice; +}; -typedef struct S390CCWDeviceClass { +struct S390CCWDeviceClass { CCWDeviceClass parent_class; void (*realize)(S390CCWDevice *dev, char *sysfsdev, Error **errp); void (*unrealize)(S390CCWDevice *dev); @@ -38,6 +41,6 @@ typedef struct S390CCWDeviceClass { int (*handle_halt) (SubchDev *sch); int (*handle_clear) (SubchDev *sch); IOInstEnding (*handle_store) (SubchDev *sch); -} S390CCWDeviceClass; +}; #endif diff --git a/include/hw/s390x/s390-virtio-ccw.h b/include/hw/s390x/s390-virtio-ccw.h index caf4962d29..f20c503b19 100644 --- a/include/hw/s390x/s390-virtio-ccw.h +++ b/include/hw/s390x/s390-virtio-ccw.h @@ -12,16 +12,19 @@ #define HW_S390X_S390_VIRTIO_CCW_H #include "hw/boards.h" +#include "qom/object.h" #define TYPE_S390_CCW_MACHINE "s390-ccw-machine" +typedef struct S390CcwMachineClass S390CcwMachineClass; +typedef struct S390CcwMachineState S390CcwMachineState; #define S390_CCW_MACHINE(obj) \ OBJECT_CHECK(S390CcwMachineState, (obj), TYPE_S390_CCW_MACHINE) #define S390_CCW_MACHINE_CLASS(klass) \ OBJECT_CLASS_CHECK(S390CcwMachineClass, (klass), TYPE_S390_CCW_MACHINE) -typedef struct S390CcwMachineState { +struct S390CcwMachineState { /*< private >*/ MachineState parent_obj; @@ -30,9 +33,9 @@ typedef struct S390CcwMachineState { bool dea_key_wrap; bool pv; uint8_t loadparm[8]; -} S390CcwMachineState; +}; -typedef struct S390CcwMachineClass { +struct S390CcwMachineClass { /*< private >*/ MachineClass parent_class; @@ -41,7 +44,7 @@ typedef struct S390CcwMachineClass { bool cpu_model_allowed; bool css_migration_enabled; bool hpage_1m_allowed; -} S390CcwMachineClass; +}; /* runtime-instrumentation allowed by the machine */ bool ri_allowed(void); diff --git a/include/hw/s390x/s390_flic.h b/include/hw/s390x/s390_flic.h index df11de9b20..2ae7cca85b 100644 --- a/include/hw/s390x/s390_flic.h +++ b/include/hw/s390x/s390_flic.h @@ -17,6 +17,7 @@ #include "hw/s390x/adapter.h" #include "hw/virtio/virtio.h" #include "qemu/queue.h" +#include "qom/object.h" /* * Reserve enough gsis to accommodate all virtio devices. @@ -38,22 +39,24 @@ extern const VMStateDescription vmstate_adapter_routes; VMSTATE_STRUCT(_f, _s, 1, vmstate_adapter_routes, AdapterRoutes) #define TYPE_S390_FLIC_COMMON "s390-flic" +typedef struct S390FLICState S390FLICState; +typedef struct S390FLICStateClass S390FLICStateClass; #define S390_FLIC_COMMON(obj) \ OBJECT_CHECK(S390FLICState, (obj), TYPE_S390_FLIC_COMMON) -typedef struct S390FLICState { +struct S390FLICState { SysBusDevice parent_obj; /* to limit AdapterRoutes.num_routes for compat */ uint32_t adapter_routes_max_batch; bool ais_supported; -} S390FLICState; +}; #define S390_FLIC_COMMON_CLASS(klass) \ OBJECT_CLASS_CHECK(S390FLICStateClass, (klass), TYPE_S390_FLIC_COMMON) #define S390_FLIC_COMMON_GET_CLASS(obj) \ OBJECT_GET_CLASS(S390FLICStateClass, (obj), TYPE_S390_FLIC_COMMON) -typedef struct S390FLICStateClass { +struct S390FLICStateClass { DeviceClass parent_class; int (*register_io_adapter)(S390FLICState *fs, uint32_t id, uint8_t isc, @@ -72,7 +75,7 @@ typedef struct S390FLICStateClass { uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); void (*inject_crw_mchk)(S390FLICState *fs); -} S390FLICStateClass; +}; #define TYPE_KVM_S390_FLIC "s390-flic-kvm" typedef struct KVMS390FLICState KVMS390FLICState; @@ -80,6 +83,7 @@ typedef struct KVMS390FLICState KVMS390FLICState; OBJECT_CHECK(KVMS390FLICState, (obj), TYPE_KVM_S390_FLIC) #define TYPE_QEMU_S390_FLIC "s390-flic-qemu" +typedef struct QEMUS390FLICState QEMUS390FLICState; #define QEMU_S390_FLIC(obj) \ OBJECT_CHECK(QEMUS390FLICState, (obj), TYPE_QEMU_S390_FLIC) @@ -115,14 +119,14 @@ typedef struct QEMUS390FlicIO { QLIST_ENTRY(QEMUS390FlicIO) next; } QEMUS390FlicIO; -typedef struct QEMUS390FLICState { +struct QEMUS390FLICState { S390FLICState parent_obj; uint32_t pending; uint32_t service_param; uint8_t simm; uint8_t nimm; QLIST_HEAD(, QEMUS390FlicIO) io[8]; -} QEMUS390FLICState; +}; uint32_t qemu_s390_flic_dequeue_service(QEMUS390FLICState *flic); QEMUS390FlicIO *qemu_s390_flic_dequeue_io(QEMUS390FLICState *flic, diff --git a/include/hw/s390x/sclp.h b/include/hw/s390x/sclp.h index a87ed2a0ab..2a5bdc6dfe 100644 --- a/include/hw/s390x/sclp.h +++ b/include/hw/s390x/sclp.h @@ -16,6 +16,7 @@ #include "hw/sysbus.h" #include "target/s390x/cpu-qom.h" +#include "qom/object.h" #define SCLP_CMD_CODE_MASK 0xffff00ff @@ -181,22 +182,24 @@ typedef struct SCCB { } QEMU_PACKED SCCB; #define TYPE_SCLP "sclp" +typedef struct SCLPDevice SCLPDevice; +typedef struct SCLPDeviceClass SCLPDeviceClass; #define SCLP(obj) OBJECT_CHECK(SCLPDevice, (obj), TYPE_SCLP) #define SCLP_CLASS(oc) OBJECT_CLASS_CHECK(SCLPDeviceClass, (oc), TYPE_SCLP) #define SCLP_GET_CLASS(obj) OBJECT_GET_CLASS(SCLPDeviceClass, (obj), TYPE_SCLP) struct SCLPEventFacility; -typedef struct SCLPDevice { +struct SCLPDevice { /* private */ DeviceState parent_obj; struct SCLPEventFacility *event_facility; int increment_size; /* public */ -} SCLPDevice; +}; -typedef struct SCLPDeviceClass { +struct SCLPDeviceClass { /* private */ DeviceClass parent_class; void (*read_SCP_info)(SCLPDevice *sclp, SCCB *sccb); @@ -205,7 +208,7 @@ typedef struct SCLPDeviceClass { /* public */ void (*execute)(SCLPDevice *sclp, SCCB *sccb, uint32_t code); void (*service_interrupt)(SCLPDevice *sclp, uint32_t sccb); -} SCLPDeviceClass; +}; static inline int sccb_data_len(SCCB *sccb) { diff --git a/include/hw/s390x/storage-attributes.h b/include/hw/s390x/storage-attributes.h index 4f7c6c0877..b5d9663f7c 100644 --- a/include/hw/s390x/storage-attributes.h +++ b/include/hw/s390x/storage-attributes.h @@ -14,26 +14,29 @@ #include "hw/qdev-core.h" #include "monitor/monitor.h" +#include "qom/object.h" #define TYPE_S390_STATTRIB "s390-storage_attributes" #define TYPE_QEMU_S390_STATTRIB "s390-storage_attributes-qemu" #define TYPE_KVM_S390_STATTRIB "s390-storage_attributes-kvm" +typedef struct S390StAttribClass S390StAttribClass; +typedef struct S390StAttribState S390StAttribState; #define S390_STATTRIB(obj) \ OBJECT_CHECK(S390StAttribState, (obj), TYPE_S390_STATTRIB) -typedef struct S390StAttribState { +struct S390StAttribState { DeviceState parent_obj; uint64_t migration_cur_gfn; bool migration_enabled; -} S390StAttribState; +}; #define S390_STATTRIB_CLASS(klass) \ OBJECT_CLASS_CHECK(S390StAttribClass, (klass), TYPE_S390_STATTRIB) #define S390_STATTRIB_GET_CLASS(obj) \ OBJECT_GET_CLASS(S390StAttribClass, (obj), TYPE_S390_STATTRIB) -typedef struct S390StAttribClass { +struct S390StAttribClass { DeviceClass parent_class; /* Return value: < 0 on error, or new count */ int (*get_stattr)(S390StAttribState *sa, uint64_t *start_gfn, @@ -46,23 +49,25 @@ typedef struct S390StAttribClass { int (*set_migrationmode)(S390StAttribState *sa, bool value); int (*get_active)(S390StAttribState *sa); long long (*get_dirtycount)(S390StAttribState *sa); -} S390StAttribClass; +}; +typedef struct QEMUS390StAttribState QEMUS390StAttribState; #define QEMU_S390_STATTRIB(obj) \ OBJECT_CHECK(QEMUS390StAttribState, (obj), TYPE_QEMU_S390_STATTRIB) -typedef struct QEMUS390StAttribState { +struct QEMUS390StAttribState { S390StAttribState parent_obj; -} QEMUS390StAttribState; +}; +typedef struct KVMS390StAttribState KVMS390StAttribState; #define KVM_S390_STATTRIB(obj) \ OBJECT_CHECK(KVMS390StAttribState, (obj), TYPE_KVM_S390_STATTRIB) -typedef struct KVMS390StAttribState { +struct KVMS390StAttribState { S390StAttribState parent_obj; uint64_t still_dirty; uint8_t *incoming_buffer; -} KVMS390StAttribState; +}; void s390_stattrib_init(void); diff --git a/include/hw/s390x/storage-keys.h b/include/hw/s390x/storage-keys.h index 3f1ae7e778..e94a201f71 100644 --- a/include/hw/s390x/storage-keys.h +++ b/include/hw/s390x/storage-keys.h @@ -14,41 +14,45 @@ #include "hw/qdev-core.h" #include "monitor/monitor.h" +#include "qom/object.h" #define TYPE_S390_SKEYS "s390-skeys" +typedef struct S390SKeysClass S390SKeysClass; +typedef struct S390SKeysState S390SKeysState; #define S390_SKEYS(obj) \ OBJECT_CHECK(S390SKeysState, (obj), TYPE_S390_SKEYS) -typedef struct S390SKeysState { +struct S390SKeysState { DeviceState parent_obj; bool migration_enabled; -} S390SKeysState; +}; #define S390_SKEYS_CLASS(klass) \ OBJECT_CLASS_CHECK(S390SKeysClass, (klass), TYPE_S390_SKEYS) #define S390_SKEYS_GET_CLASS(obj) \ OBJECT_GET_CLASS(S390SKeysClass, (obj), TYPE_S390_SKEYS) -typedef struct S390SKeysClass { +struct S390SKeysClass { DeviceClass parent_class; int (*skeys_enabled)(S390SKeysState *ks); int (*get_skeys)(S390SKeysState *ks, uint64_t start_gfn, uint64_t count, uint8_t *keys); int (*set_skeys)(S390SKeysState *ks, uint64_t start_gfn, uint64_t count, uint8_t *keys); -} S390SKeysClass; +}; #define TYPE_KVM_S390_SKEYS "s390-skeys-kvm" #define TYPE_QEMU_S390_SKEYS "s390-skeys-qemu" +typedef struct QEMUS390SKeysState QEMUS390SKeysState; #define QEMU_S390_SKEYS(obj) \ OBJECT_CHECK(QEMUS390SKeysState, (obj), TYPE_QEMU_S390_SKEYS) -typedef struct QEMUS390SKeysState { +struct QEMUS390SKeysState { S390SKeysState parent_obj; uint8_t *keydata; uint32_t key_count; -} QEMUS390SKeysState; +}; void s390_skeys_init(void); diff --git a/include/hw/s390x/tod.h b/include/hw/s390x/tod.h index 4251623f7f..e240faf11c 100644 --- a/include/hw/s390x/tod.h +++ b/include/hw/s390x/tod.h @@ -13,6 +13,7 @@ #include "hw/qdev-core.h" #include "target/s390x/s390-tod.h" +#include "qom/object.h" typedef struct S390TOD { uint8_t high; @@ -20,6 +21,8 @@ typedef struct S390TOD { } S390TOD; #define TYPE_S390_TOD "s390-tod" +typedef struct S390TODClass S390TODClass; +typedef struct S390TODState S390TODState; #define S390_TOD(obj) OBJECT_CHECK(S390TODState, (obj), TYPE_S390_TOD) #define S390_TOD_CLASS(oc) OBJECT_CLASS_CHECK(S390TODClass, (oc), \ TYPE_S390_TOD) @@ -28,7 +31,7 @@ typedef struct S390TOD { #define TYPE_KVM_S390_TOD TYPE_S390_TOD "-kvm" #define TYPE_QEMU_S390_TOD TYPE_S390_TOD "-qemu" -typedef struct S390TODState { +struct S390TODState { /* private */ DeviceState parent_obj; @@ -39,9 +42,9 @@ typedef struct S390TODState { S390TOD base; /* Used by KVM to remember if the TOD is stopped and base is valid. */ bool stopped; -} S390TODState; +}; -typedef struct S390TODClass { +struct S390TODClass { /* private */ DeviceClass parent_class; void (*parent_realize)(DeviceState *dev, Error **errp); @@ -49,7 +52,7 @@ typedef struct S390TODClass { /* public */ void (*get)(const S390TODState *td, S390TOD *tod, Error **errp); void (*set)(S390TODState *td, const S390TOD *tod, Error **errp); -} S390TODClass; +}; void s390_init_tod(void); S390TODState *s390_get_todstate(void); diff --git a/include/hw/s390x/vfio-ccw.h b/include/hw/s390x/vfio-ccw.h index ee5250d0d7..7bd4640ac3 100644 --- a/include/hw/s390x/vfio-ccw.h +++ b/include/hw/s390x/vfio-ccw.h @@ -17,12 +17,13 @@ #include "hw/vfio/vfio-common.h" #include "hw/s390x/s390-ccw.h" #include "hw/s390x/ccw-device.h" +#include "qom/object.h" #define TYPE_VFIO_CCW "vfio-ccw" +typedef struct VFIOCCWDevice VFIOCCWDevice; #define VFIO_CCW(obj) \ OBJECT_CHECK(VFIOCCWDevice, (obj), TYPE_VFIO_CCW) #define TYPE_VFIO_CCW "vfio-ccw" -typedef struct VFIOCCWDevice VFIOCCWDevice; #endif diff --git a/include/hw/scsi/esp.h b/include/hw/scsi/esp.h index 6ba47dac41..d4a4e2930c 100644 --- a/include/hw/scsi/esp.h +++ b/include/hw/scsi/esp.h @@ -3,6 +3,7 @@ #include "hw/scsi/scsi.h" #include "hw/sysbus.h" +#include "qom/object.h" /* esp.c */ #define ESP_MAX_DEVS 7 @@ -65,9 +66,10 @@ struct ESPState { }; #define TYPE_ESP "esp" +typedef struct SysBusESPState SysBusESPState; #define ESP_STATE(obj) OBJECT_CHECK(SysBusESPState, (obj), TYPE_ESP) -typedef struct { +struct SysBusESPState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -76,7 +78,7 @@ typedef struct { MemoryRegion pdma; uint32_t it_shift; ESPState esp; -} SysBusESPState; +}; #define ESP_TCLO 0x0 #define ESP_TCMID 0x1 diff --git a/include/hw/scsi/scsi.h b/include/hw/scsi/scsi.h index 2fc23e44ba..bad4dfb223 100644 --- a/include/hw/scsi/scsi.h +++ b/include/hw/scsi/scsi.h @@ -6,6 +6,7 @@ #include "hw/qdev-core.h" #include "scsi/utils.h" #include "qemu/notify.h" +#include "qom/object.h" #define MAX_SCSI_DEVS 255 @@ -49,6 +50,7 @@ struct SCSIRequest { }; #define TYPE_SCSI_DEVICE "scsi-device" +typedef struct SCSIDeviceClass SCSIDeviceClass; #define SCSI_DEVICE(obj) \ OBJECT_CHECK(SCSIDevice, (obj), TYPE_SCSI_DEVICE) #define SCSI_DEVICE_CLASS(klass) \ @@ -56,7 +58,7 @@ struct SCSIRequest { #define SCSI_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(SCSIDeviceClass, (obj), TYPE_SCSI_DEVICE) -typedef struct SCSIDeviceClass { +struct SCSIDeviceClass { DeviceClass parent_class; void (*realize)(SCSIDevice *dev, Error **errp); void (*unrealize)(SCSIDevice *dev); @@ -65,7 +67,7 @@ typedef struct SCSIDeviceClass { SCSIRequest *(*alloc_req)(SCSIDevice *s, uint32_t tag, uint32_t lun, uint8_t *buf, void *hba_private); void (*unit_attention_reported)(SCSIDevice *s); -} SCSIDeviceClass; +}; struct SCSIDevice { diff --git a/include/hw/sd/allwinner-sdhost.h b/include/hw/sd/allwinner-sdhost.h index 839732ebf3..b23de2c548 100644 --- a/include/hw/sd/allwinner-sdhost.h +++ b/include/hw/sd/allwinner-sdhost.h @@ -45,6 +45,8 @@ * @{ */ +typedef struct AwSdHostClass AwSdHostClass; +typedef struct AwSdHostState AwSdHostState; #define AW_SDHOST(obj) \ OBJECT_CHECK(AwSdHostState, (obj), TYPE_AW_SDHOST) #define AW_SDHOST_CLASS(klass) \ @@ -57,7 +59,7 @@ /** * Allwinner SD Host Controller object instance state. */ -typedef struct AwSdHostState { +struct AwSdHostState { /*< private >*/ SysBusDevice busdev; /*< public >*/ @@ -119,7 +121,7 @@ typedef struct AwSdHostState { /** @} */ -} AwSdHostState; +}; /** * Allwinner SD Host Controller class-level struct. @@ -128,7 +130,7 @@ typedef struct AwSdHostState { * such that the generic code can use this struct to support * all devices. */ -typedef struct AwSdHostClass { +struct AwSdHostClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ @@ -136,6 +138,6 @@ typedef struct AwSdHostClass { /** Maximum buffer size in bytes per DMA descriptor */ size_t max_desc_size; -} AwSdHostClass; +}; #endif /* HW_SD_ALLWINNER_SDHOST_H */ diff --git a/include/hw/sd/aspeed_sdhci.h b/include/hw/sd/aspeed_sdhci.h index dffbb46946..527075476b 100644 --- a/include/hw/sd/aspeed_sdhci.h +++ b/include/hw/sd/aspeed_sdhci.h @@ -10,8 +10,10 @@ #define ASPEED_SDHCI_H #include "hw/sd/sdhci.h" +#include "qom/object.h" #define TYPE_ASPEED_SDHCI "aspeed.sdhci" +typedef struct AspeedSDHCIState AspeedSDHCIState; #define ASPEED_SDHCI(obj) OBJECT_CHECK(AspeedSDHCIState, (obj), \ TYPE_ASPEED_SDHCI) @@ -20,7 +22,7 @@ #define ASPEED_SDHCI_NUM_REGS (ASPEED_SDHCI_REG_SIZE / sizeof(uint32_t)) #define ASPEED_SDHCI_REG_SIZE 0x100 -typedef struct AspeedSDHCIState { +struct AspeedSDHCIState { SysBusDevice parent; SDHCIState slots[ASPEED_SDHCI_NUM_SLOTS]; @@ -30,6 +32,6 @@ typedef struct AspeedSDHCIState { qemu_irq irq; uint32_t regs[ASPEED_SDHCI_NUM_REGS]; -} AspeedSDHCIState; +}; #endif /* ASPEED_SDHCI_H */ diff --git a/include/hw/sd/bcm2835_sdhost.h b/include/hw/sd/bcm2835_sdhost.h index 7520dd6507..233e74b002 100644 --- a/include/hw/sd/bcm2835_sdhost.h +++ b/include/hw/sd/bcm2835_sdhost.h @@ -16,14 +16,16 @@ #include "hw/sysbus.h" #include "hw/sd/sd.h" +#include "qom/object.h" #define TYPE_BCM2835_SDHOST "bcm2835-sdhost" +typedef struct BCM2835SDHostState BCM2835SDHostState; #define BCM2835_SDHOST(obj) \ OBJECT_CHECK(BCM2835SDHostState, (obj), TYPE_BCM2835_SDHOST) #define BCM2835_SDHOST_FIFO_LEN 16 -typedef struct { +struct BCM2835SDHostState { SysBusDevice busdev; SDBus sdbus; MemoryRegion iomem; @@ -43,6 +45,6 @@ typedef struct { uint32_t datacnt; qemu_irq irq; -} BCM2835SDHostState; +}; #endif diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h index ac02d61a7a..850740ea92 100644 --- a/include/hw/sd/sd.h +++ b/include/hw/sd/sd.h @@ -31,6 +31,7 @@ #define HW_SD_H #include "hw/qdev-core.h" +#include "qom/object.h" #define OUT_OF_RANGE (1 << 31) #define ADDRESS_ERROR (1 << 30) @@ -92,13 +93,14 @@ typedef struct SDState SDState; typedef struct SDBus SDBus; #define TYPE_SD_CARD "sd-card" +typedef struct SDCardClass SDCardClass; #define SD_CARD(obj) OBJECT_CHECK(SDState, (obj), TYPE_SD_CARD) #define SD_CARD_CLASS(klass) \ OBJECT_CLASS_CHECK(SDCardClass, (klass), TYPE_SD_CARD) #define SD_CARD_GET_CLASS(obj) \ OBJECT_GET_CLASS(SDCardClass, (obj), TYPE_SD_CARD) -typedef struct { +struct SDCardClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ @@ -128,9 +130,10 @@ typedef struct { void (*enable)(SDState *sd, bool enable); bool (*get_inserted)(SDState *sd); bool (*get_readonly)(SDState *sd); -} SDCardClass; +}; #define TYPE_SD_BUS "sd-bus" +typedef struct SDBusClass SDBusClass; #define SD_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_SD_BUS) #define SD_BUS_CLASS(klass) OBJECT_CLASS_CHECK(SDBusClass, (klass), TYPE_SD_BUS) #define SD_BUS_GET_CLASS(obj) OBJECT_GET_CLASS(SDBusClass, (obj), TYPE_SD_BUS) @@ -139,7 +142,7 @@ struct SDBus { BusState qbus; }; -typedef struct { +struct SDBusClass { /*< private >*/ BusClass parent_class; /*< public >*/ @@ -149,7 +152,7 @@ typedef struct { */ void (*set_inserted)(DeviceState *dev, bool inserted); void (*set_readonly)(DeviceState *dev, bool readonly); -} SDBusClass; +}; /* Functions to be used by qdevified callers (working via * an SDBus rather than directly with SDState) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 5d9275f3d6..67b01fcb28 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -28,9 +28,10 @@ #include "hw/pci/pci.h" #include "hw/sysbus.h" #include "hw/sd/sd.h" +#include "qom/object.h" /* SD/MMC host controller state */ -typedef struct SDHCIState { +struct SDHCIState { /*< private >*/ union { PCIDevice pcidev; @@ -98,7 +99,8 @@ typedef struct SDHCIState { uint8_t sd_spec_version; uint8_t uhs_mode; uint8_t vendor; /* For vendor specific functionality */ -} SDHCIState; +}; +typedef struct SDHCIState SDHCIState; #define SDHCI_VENDOR_NONE 0 #define SDHCI_VENDOR_IMX 1 diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index ac1d04ddc2..21ad6327d2 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -13,6 +13,7 @@ #define HW_SOUTHBRIDGE_PIIX_H #include "hw/pci/pci.h" +#include "qom/object.h" #define TYPE_PIIX4_PM "PIIX4_PM" @@ -35,7 +36,7 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, #define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ #define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */ -typedef struct PIIXState { +struct PIIXState { PCIDevice dev; /* @@ -62,7 +63,8 @@ typedef struct PIIXState { /* IO memory region for Reset Control Register (PIIX_RCR_IOPORT) */ MemoryRegion rcr_mem; -} PIIX3State; +}; +typedef struct PIIXState PIIX3State; #define TYPE_PIIX3_PCI_DEVICE "pci-piix3" #define PIIX3_PCI_DEVICE(obj) \ diff --git a/include/hw/sparc/sparc32_dma.h b/include/hw/sparc/sparc32_dma.h index ab42c5421b..9c80ef54ff 100644 --- a/include/hw/sparc/sparc32_dma.h +++ b/include/hw/sparc/sparc32_dma.h @@ -4,14 +4,15 @@ #include "hw/sysbus.h" #include "hw/scsi/esp.h" #include "hw/net/lance.h" +#include "qom/object.h" #define DMA_REGS 4 #define TYPE_SPARC32_DMA_DEVICE "sparc32-dma-device" +typedef struct DMADeviceState DMADeviceState; #define SPARC32_DMA_DEVICE(obj) OBJECT_CHECK(DMADeviceState, (obj), \ TYPE_SPARC32_DMA_DEVICE) -typedef struct DMADeviceState DMADeviceState; struct DMADeviceState { SysBusDevice parent_obj; @@ -24,37 +25,40 @@ struct DMADeviceState { }; #define TYPE_SPARC32_ESPDMA_DEVICE "sparc32-espdma" +typedef struct ESPDMADeviceState ESPDMADeviceState; #define SPARC32_ESPDMA_DEVICE(obj) OBJECT_CHECK(ESPDMADeviceState, (obj), \ TYPE_SPARC32_ESPDMA_DEVICE) -typedef struct ESPDMADeviceState { +struct ESPDMADeviceState { DMADeviceState parent_obj; SysBusESPState *esp; -} ESPDMADeviceState; +}; #define TYPE_SPARC32_LEDMA_DEVICE "sparc32-ledma" +typedef struct LEDMADeviceState LEDMADeviceState; #define SPARC32_LEDMA_DEVICE(obj) OBJECT_CHECK(LEDMADeviceState, (obj), \ TYPE_SPARC32_LEDMA_DEVICE) -typedef struct LEDMADeviceState { +struct LEDMADeviceState { DMADeviceState parent_obj; SysBusPCNetState *lance; -} LEDMADeviceState; +}; #define TYPE_SPARC32_DMA "sparc32-dma" +typedef struct SPARC32DMAState SPARC32DMAState; #define SPARC32_DMA(obj) OBJECT_CHECK(SPARC32DMAState, (obj), \ TYPE_SPARC32_DMA) -typedef struct SPARC32DMAState { +struct SPARC32DMAState { SysBusDevice parent_obj; MemoryRegion dmamem; MemoryRegion ledma_alias; ESPDMADeviceState *espdma; LEDMADeviceState *ledma; -} SPARC32DMAState; +}; /* sparc32_dma.c */ void ledma_memory_read(void *opaque, hwaddr addr, diff --git a/include/hw/sparc/sun4m_iommu.h b/include/hw/sparc/sun4m_iommu.h index 482266c6a7..6095eed0af 100644 --- a/include/hw/sparc/sun4m_iommu.h +++ b/include/hw/sparc/sun4m_iommu.h @@ -26,10 +26,11 @@ #define SUN4M_IOMMU_H #include "hw/sysbus.h" +#include "qom/object.h" #define IOMMU_NREGS (4 * 4096 / 4) -typedef struct IOMMUState { +struct IOMMUState { SysBusDevice parent_obj; AddressSpace iommu_as; @@ -40,7 +41,8 @@ typedef struct IOMMUState { hwaddr iostart; qemu_irq irq; uint32_t version; -} IOMMUState; +}; +typedef struct IOMMUState IOMMUState; #define TYPE_SUN4M_IOMMU "sun4m-iommu" #define SUN4M_IOMMU(obj) OBJECT_CHECK(IOMMUState, (obj), TYPE_SUN4M_IOMMU) diff --git a/include/hw/sparc/sun4u_iommu.h b/include/hw/sparc/sun4u_iommu.h index 5472d489cf..dfe10459e5 100644 --- a/include/hw/sparc/sun4u_iommu.h +++ b/include/hw/sparc/sun4u_iommu.h @@ -28,10 +28,11 @@ #define SUN4U_IOMMU_H #include "hw/sysbus.h" +#include "qom/object.h" #define IOMMU_NREGS 3 -typedef struct IOMMUState { +struct IOMMUState { SysBusDevice parent_obj; AddressSpace iommu_as; @@ -39,7 +40,8 @@ typedef struct IOMMUState { MemoryRegion iomem; uint64_t regs[IOMMU_NREGS]; -} IOMMUState; +}; +typedef struct IOMMUState IOMMUState; #define TYPE_SUN4U_IOMMU "sun4u-iommu" #define SUN4U_IOMMU(obj) OBJECT_CHECK(IOMMUState, (obj), TYPE_SUN4U_IOMMU) diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h index 6fbbb238f1..a2072ffeea 100644 --- a/include/hw/ssi/aspeed_smc.h +++ b/include/hw/ssi/aspeed_smc.h @@ -27,6 +27,7 @@ #include "hw/ssi/ssi.h" #include "hw/sysbus.h" +#include "qom/object.h" typedef struct AspeedSegments { hwaddr addr; @@ -67,20 +68,22 @@ typedef struct AspeedSMCFlash { } AspeedSMCFlash; #define TYPE_ASPEED_SMC "aspeed.smc" +typedef struct AspeedSMCClass AspeedSMCClass; +typedef struct AspeedSMCState AspeedSMCState; #define ASPEED_SMC(obj) OBJECT_CHECK(AspeedSMCState, (obj), TYPE_ASPEED_SMC) #define ASPEED_SMC_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedSMCClass, (klass), TYPE_ASPEED_SMC) #define ASPEED_SMC_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedSMCClass, (obj), TYPE_ASPEED_SMC) -typedef struct AspeedSMCClass { +struct AspeedSMCClass { SysBusDevice parent_obj; const AspeedSMCController *ctrl; -} AspeedSMCClass; +}; #define ASPEED_SMC_R_MAX (0x100 / 4) -typedef struct AspeedSMCState { +struct AspeedSMCState { SysBusDevice parent_obj; const AspeedSMCController *ctrl; @@ -117,6 +120,6 @@ typedef struct AspeedSMCState { uint8_t snoop_index; uint8_t snoop_dummies; -} AspeedSMCState; +}; #endif /* ASPEED_SMC_H */ diff --git a/include/hw/ssi/imx_spi.h b/include/hw/ssi/imx_spi.h index 7103953581..3a966af0ec 100644 --- a/include/hw/ssi/imx_spi.h +++ b/include/hw/ssi/imx_spi.h @@ -14,6 +14,7 @@ #include "hw/ssi/ssi.h" #include "qemu/bitops.h" #include "qemu/fifo32.h" +#include "qom/object.h" #define ECSPI_FIFO_SIZE 64 @@ -77,9 +78,10 @@ #define EXTRACT(value, name) extract32(value, name##_SHIFT, name##_LENGTH) #define TYPE_IMX_SPI "imx.spi" +typedef struct IMXSPIState IMXSPIState; #define IMX_SPI(obj) OBJECT_CHECK(IMXSPIState, (obj), TYPE_IMX_SPI) -typedef struct IMXSPIState { +struct IMXSPIState { /* <private> */ SysBusDevice parent_obj; @@ -98,6 +100,6 @@ typedef struct IMXSPIState { Fifo32 tx_fifo; int16_t burst_length; -} IMXSPIState; +}; #endif /* IMX_SPI_H */ diff --git a/include/hw/ssi/mss-spi.h b/include/hw/ssi/mss-spi.h index f0cf3243e0..40e1a5ac90 100644 --- a/include/hw/ssi/mss-spi.h +++ b/include/hw/ssi/mss-spi.h @@ -28,13 +28,15 @@ #include "hw/sysbus.h" #include "hw/ssi/ssi.h" #include "qemu/fifo32.h" +#include "qom/object.h" #define TYPE_MSS_SPI "mss-spi" +typedef struct MSSSpiState MSSSpiState; #define MSS_SPI(obj) OBJECT_CHECK(MSSSpiState, (obj), TYPE_MSS_SPI) #define R_SPI_MAX 16 -typedef struct MSSSpiState { +struct MSSSpiState { SysBusDevice parent_obj; MemoryRegion mmio; @@ -53,6 +55,6 @@ typedef struct MSSSpiState { bool enabled; uint32_t regs[R_SPI_MAX]; -} MSSSpiState; +}; #endif /* HW_MSS_SPI_H */ diff --git a/include/hw/ssi/pl022.h b/include/hw/ssi/pl022.h index a080519366..64aeb61eef 100644 --- a/include/hw/ssi/pl022.h +++ b/include/hw/ssi/pl022.h @@ -22,11 +22,13 @@ #define HW_SSI_PL022_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_PL022 "pl022" +typedef struct PL022State PL022State; #define PL022(obj) OBJECT_CHECK(PL022State, (obj), TYPE_PL022) -typedef struct PL022State { +struct PL022State { SysBusDevice parent_obj; MemoryRegion iomem; @@ -46,6 +48,6 @@ typedef struct PL022State { uint16_t rx_fifo[8]; qemu_irq irq; SSIBus *ssi; -} PL022State; +}; #endif diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h index eac168aa1d..b42765f415 100644 --- a/include/hw/ssi/ssi.h +++ b/include/hw/ssi/ssi.h @@ -12,6 +12,7 @@ #define QEMU_SSI_H #include "hw/qdev-core.h" +#include "qom/object.h" typedef struct SSISlave SSISlave; typedef struct SSISlaveClass SSISlaveClass; diff --git a/include/hw/ssi/stm32f2xx_spi.h b/include/hw/ssi/stm32f2xx_spi.h index e24b007abf..1c8ff7d724 100644 --- a/include/hw/ssi/stm32f2xx_spi.h +++ b/include/hw/ssi/stm32f2xx_spi.h @@ -27,6 +27,7 @@ #include "hw/sysbus.h" #include "hw/ssi/ssi.h" +#include "qom/object.h" #define STM_SPI_CR1 0x00 #define STM_SPI_CR2 0x04 @@ -44,10 +45,11 @@ #define STM_SPI_SR_RXNE 1 #define TYPE_STM32F2XX_SPI "stm32f2xx-spi" +typedef struct STM32F2XXSPIState STM32F2XXSPIState; #define STM32F2XX_SPI(obj) \ OBJECT_CHECK(STM32F2XXSPIState, (obj), TYPE_STM32F2XX_SPI) -typedef struct { +struct STM32F2XXSPIState { /* <private> */ SysBusDevice parent_obj; @@ -66,6 +68,6 @@ typedef struct { qemu_irq irq; SSIBus *ssi; -} STM32F2XXSPIState; +}; #endif /* HW_STM32F2XX_SPI_H */ diff --git a/include/hw/ssi/xilinx_spips.h b/include/hw/ssi/xilinx_spips.h index 6a39b55a7b..2171018601 100644 --- a/include/hw/ssi/xilinx_spips.h +++ b/include/hw/ssi/xilinx_spips.h @@ -29,6 +29,7 @@ #include "qemu/fifo32.h" #include "hw/stream.h" #include "hw/sysbus.h" +#include "qom/object.h" typedef struct XilinxSPIPS XilinxSPIPS; @@ -85,16 +86,17 @@ struct XilinxSPIPS { bool man_start_com; }; -typedef struct { +struct XilinxQSPIPS { XilinxSPIPS parent_obj; uint8_t lqspi_buf[LQSPI_CACHE_SIZE]; hwaddr lqspi_cached_addr; Error *migration_blocker; bool mmio_execution_enabled; -} XilinxQSPIPS; +}; +typedef struct XilinxQSPIPS XilinxQSPIPS; -typedef struct { +struct XlnxZynqMPQSPIPS { XilinxQSPIPS parent_obj; StreamSlave *dma; @@ -117,16 +119,18 @@ typedef struct { bool man_start_com_g; uint32_t dma_burst_size; uint8_t dma_buf[QSPI_DMA_MAX_BURST_SIZE]; -} XlnxZynqMPQSPIPS; +}; +typedef struct XlnxZynqMPQSPIPS XlnxZynqMPQSPIPS; -typedef struct XilinxSPIPSClass { +struct XilinxSPIPSClass { SysBusDeviceClass parent_class; const MemoryRegionOps *reg_ops; uint32_t rx_fifo_size; uint32_t tx_fifo_size; -} XilinxSPIPSClass; +}; +typedef struct XilinxSPIPSClass XilinxSPIPSClass; #define TYPE_XILINX_SPIPS "xlnx.ps7-spi" #define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi" diff --git a/include/hw/stream.h b/include/hw/stream.h index ed09e83683..bd41750e94 100644 --- a/include/hw/stream.h +++ b/include/hw/stream.h @@ -6,6 +6,7 @@ /* stream slave. Used until qdev provides a generic way. */ #define TYPE_STREAM_SLAVE "stream-slave" +typedef struct StreamSlaveClass StreamSlaveClass; #define STREAM_SLAVE_CLASS(klass) \ OBJECT_CLASS_CHECK(StreamSlaveClass, (klass), TYPE_STREAM_SLAVE) #define STREAM_SLAVE_GET_CLASS(obj) \ @@ -17,7 +18,7 @@ typedef struct StreamSlave StreamSlave; typedef void (*StreamCanPushNotifyFn)(void *opaque); -typedef struct StreamSlaveClass { +struct StreamSlaveClass { InterfaceClass parent; /** * can push - determine if a stream slave is capable of accepting at least @@ -42,7 +43,7 @@ typedef struct StreamSlaveClass { * @eop: End of packet flag */ size_t (*push)(StreamSlave *obj, unsigned char *buf, size_t len, bool eop); -} StreamSlaveClass; +}; size_t stream_push(StreamSlave *sink, uint8_t *buf, size_t len, bool eop); diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h index da9f85c58c..3537e43f23 100644 --- a/include/hw/sysbus.h +++ b/include/hw/sysbus.h @@ -5,6 +5,7 @@ #include "hw/qdev-core.h" #include "exec/memory.h" +#include "qom/object.h" #define QDEV_MAX_MMIO 32 #define QDEV_MAX_PIO 32 @@ -15,6 +16,7 @@ typedef struct SysBusDevice SysBusDevice; #define TYPE_SYS_BUS_DEVICE "sys-bus-device" +typedef struct SysBusDeviceClass SysBusDeviceClass; #define SYS_BUS_DEVICE(obj) \ OBJECT_CHECK(SysBusDevice, (obj), TYPE_SYS_BUS_DEVICE) #define SYS_BUS_DEVICE_CLASS(klass) \ @@ -31,7 +33,7 @@ typedef struct SysBusDevice SysBusDevice; #define SYSBUS_DEVICE_GPIO_IRQ "sysbus-irq" -typedef struct SysBusDeviceClass { +struct SysBusDeviceClass { /*< private >*/ DeviceClass parent_class; @@ -52,7 +54,7 @@ typedef struct SysBusDeviceClass { */ char *(*explicit_ofw_unit_address)(const SysBusDevice *dev); void (*connect_irq_notifier)(SysBusDevice *dev, qemu_irq irq); -} SysBusDeviceClass; +}; struct SysBusDevice { /*< private >*/ diff --git a/include/hw/timer/a9gtimer.h b/include/hw/timer/a9gtimer.h index 81c4388784..88811c6c8f 100644 --- a/include/hw/timer/a9gtimer.h +++ b/include/hw/timer/a9gtimer.h @@ -24,10 +24,12 @@ #define A9GTIMER_H #include "hw/sysbus.h" +#include "qom/object.h" #define A9_GTIMER_MAX_CPUS 4 #define TYPE_A9_GTIMER "arm.cortex-a9-global-timer" +typedef struct A9GTimerState A9GTimerState; #define A9_GTIMER(obj) OBJECT_CHECK(A9GTimerState, (obj), TYPE_A9_GTIMER) #define R_COUNTER_LO 0x00 @@ -55,7 +57,6 @@ #define R_AUTO_INCREMENT 0x18 typedef struct A9GTimerPerCPU A9GTimerPerCPU; -typedef struct A9GTimerState A9GTimerState; struct A9GTimerPerCPU { A9GTimerState *parent; diff --git a/include/hw/timer/allwinner-a10-pit.h b/include/hw/timer/allwinner-a10-pit.h index 871c95b512..fa060c684d 100644 --- a/include/hw/timer/allwinner-a10-pit.h +++ b/include/hw/timer/allwinner-a10-pit.h @@ -3,8 +3,10 @@ #include "hw/ptimer.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_AW_A10_PIT "allwinner-A10-timer" +typedef struct AwA10PITState AwA10PITState; #define AW_A10_PIT(obj) OBJECT_CHECK(AwA10PITState, (obj), TYPE_AW_A10_PIT) #define AW_A10_PIT_TIMER_NR 6 @@ -36,7 +38,6 @@ #define AW_A10_PIT_DEFAULT_CLOCK 0x4 -typedef struct AwA10PITState AwA10PITState; typedef struct AwA10TimerContext { AwA10PITState *container; diff --git a/include/hw/timer/arm_mptimer.h b/include/hw/timer/arm_mptimer.h index c46d8d2309..643a256ecf 100644 --- a/include/hw/timer/arm_mptimer.h +++ b/include/hw/timer/arm_mptimer.h @@ -22,6 +22,7 @@ #define HW_TIMER_ARM_MPTIMER_H #include "hw/sysbus.h" +#include "qom/object.h" #define ARM_MPTIMER_MAX_CPUS 4 @@ -35,10 +36,11 @@ typedef struct { } TimerBlock; #define TYPE_ARM_MPTIMER "arm_mptimer" +typedef struct ARMMPTimerState ARMMPTimerState; #define ARM_MPTIMER(obj) \ OBJECT_CHECK(ARMMPTimerState, (obj), TYPE_ARM_MPTIMER) -typedef struct { +struct ARMMPTimerState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -46,6 +48,6 @@ typedef struct { uint32_t num_cpu; TimerBlock timerblock[ARM_MPTIMER_MAX_CPUS]; MemoryRegion iomem; -} ARMMPTimerState; +}; #endif diff --git a/include/hw/timer/armv7m_systick.h b/include/hw/timer/armv7m_systick.h index 25e5ceacc8..33df057958 100644 --- a/include/hw/timer/armv7m_systick.h +++ b/include/hw/timer/armv7m_systick.h @@ -13,12 +13,14 @@ #define HW_TIMER_ARMV7M_SYSTICK_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_SYSTICK "armv7m_systick" +typedef struct SysTickState SysTickState; #define SYSTICK(obj) OBJECT_CHECK(SysTickState, (obj), TYPE_SYSTICK) -typedef struct SysTickState { +struct SysTickState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -29,7 +31,7 @@ typedef struct SysTickState { QEMUTimer *timer; MemoryRegion iomem; qemu_irq irq; -} SysTickState; +}; /* * Multiplication factor to convert from system clock ticks to qemu timer diff --git a/include/hw/timer/aspeed_timer.h b/include/hw/timer/aspeed_timer.h index d7c7d8ad28..c890aaa949 100644 --- a/include/hw/timer/aspeed_timer.h +++ b/include/hw/timer/aspeed_timer.h @@ -24,10 +24,13 @@ #include "qemu/timer.h" #include "hw/misc/aspeed_scu.h" +#include "qom/object.h" +#define TYPE_ASPEED_TIMER "aspeed.timer" +typedef struct AspeedTimerClass AspeedTimerClass; +typedef struct AspeedTimerCtrlState AspeedTimerCtrlState; #define ASPEED_TIMER(obj) \ OBJECT_CHECK(AspeedTimerCtrlState, (obj), TYPE_ASPEED_TIMER) -#define TYPE_ASPEED_TIMER "aspeed.timer" #define TYPE_ASPEED_2400_TIMER TYPE_ASPEED_TIMER "-ast2400" #define TYPE_ASPEED_2500_TIMER TYPE_ASPEED_TIMER "-ast2500" #define TYPE_ASPEED_2600_TIMER TYPE_ASPEED_TIMER "-ast2600" @@ -50,7 +53,7 @@ typedef struct AspeedTimer { uint64_t start; } AspeedTimer; -typedef struct AspeedTimerCtrlState { +struct AspeedTimerCtrlState { /*< private >*/ SysBusDevice parent; @@ -64,18 +67,18 @@ typedef struct AspeedTimerCtrlState { AspeedTimer timers[ASPEED_TIMER_NR_TIMERS]; AspeedSCUState *scu; -} AspeedTimerCtrlState; +}; #define ASPEED_TIMER_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedTimerClass, (klass), TYPE_ASPEED_TIMER) #define ASPEED_TIMER_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedTimerClass, (obj), TYPE_ASPEED_TIMER) -typedef struct AspeedTimerClass { +struct AspeedTimerClass { SysBusDeviceClass parent_class; uint64_t (*read)(AspeedTimerCtrlState *s, hwaddr offset); void (*write)(AspeedTimerCtrlState *s, hwaddr offset, uint64_t value); -} AspeedTimerClass; +}; #endif /* ASPEED_TIMER_H */ diff --git a/include/hw/timer/avr_timer16.h b/include/hw/timer/avr_timer16.h index 982019d242..9efe75ce5e 100644 --- a/include/hw/timer/avr_timer16.h +++ b/include/hw/timer/avr_timer16.h @@ -31,6 +31,7 @@ #include "hw/sysbus.h" #include "qemu/timer.h" #include "hw/hw.h" +#include "qom/object.h" enum NextInterrupt { OVERFLOW, @@ -41,10 +42,11 @@ enum NextInterrupt { }; #define TYPE_AVR_TIMER16 "avr-timer16" +typedef struct AVRTimer16State AVRTimer16State; #define AVR_TIMER16(obj) \ OBJECT_CHECK(AVRTimer16State, (obj), TYPE_AVR_TIMER16) -typedef struct AVRTimer16State { +struct AVRTimer16State { /* <private> */ SysBusDevice parent_obj; @@ -89,6 +91,6 @@ typedef struct AVRTimer16State { uint64_t period_ns; uint64_t reset_time_ns; enum NextInterrupt next_interrupt; -} AVRTimer16State; +}; #endif /* HW_TIMER_AVR_TIMER16_H */ diff --git a/include/hw/timer/bcm2835_systmr.h b/include/hw/timer/bcm2835_systmr.h index c0bc5c8127..796f62cf88 100644 --- a/include/hw/timer/bcm2835_systmr.h +++ b/include/hw/timer/bcm2835_systmr.h @@ -11,12 +11,14 @@ #include "hw/sysbus.h" #include "hw/irq.h" +#include "qom/object.h" #define TYPE_BCM2835_SYSTIMER "bcm2835-sys-timer" +typedef struct BCM2835SystemTimerState BCM2835SystemTimerState; #define BCM2835_SYSTIMER(obj) \ OBJECT_CHECK(BCM2835SystemTimerState, (obj), TYPE_BCM2835_SYSTIMER) -typedef struct { +struct BCM2835SystemTimerState { /*< private >*/ SysBusDevice parent_obj; @@ -28,6 +30,6 @@ typedef struct { uint32_t status; uint32_t compare[4]; } reg; -} BCM2835SystemTimerState; +}; #endif diff --git a/include/hw/timer/cmsdk-apb-dualtimer.h b/include/hw/timer/cmsdk-apb-dualtimer.h index 9843a9dbb1..8a1137aec7 100644 --- a/include/hw/timer/cmsdk-apb-dualtimer.h +++ b/include/hw/timer/cmsdk-apb-dualtimer.h @@ -28,12 +28,13 @@ #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "qom/object.h" #define TYPE_CMSDK_APB_DUALTIMER "cmsdk-apb-dualtimer" +typedef struct CMSDKAPBDualTimer CMSDKAPBDualTimer; #define CMSDK_APB_DUALTIMER(obj) OBJECT_CHECK(CMSDKAPBDualTimer, (obj), \ TYPE_CMSDK_APB_DUALTIMER) -typedef struct CMSDKAPBDualTimer CMSDKAPBDualTimer; /* One of the two identical timer modules in the dual-timer module */ typedef struct CMSDKAPBDualTimerModule { diff --git a/include/hw/timer/cmsdk-apb-timer.h b/include/hw/timer/cmsdk-apb-timer.h index f24bda6a46..a7ca523529 100644 --- a/include/hw/timer/cmsdk-apb-timer.h +++ b/include/hw/timer/cmsdk-apb-timer.h @@ -15,12 +15,14 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "qom/object.h" #define TYPE_CMSDK_APB_TIMER "cmsdk-apb-timer" +typedef struct CMSDKAPBTIMER CMSDKAPBTIMER; #define CMSDK_APB_TIMER(obj) OBJECT_CHECK(CMSDKAPBTIMER, (obj), \ TYPE_CMSDK_APB_TIMER) -typedef struct { +struct CMSDKAPBTIMER { /*< private >*/ SysBusDevice parent_obj; @@ -34,7 +36,7 @@ typedef struct { uint32_t value; uint32_t reload; uint32_t intstatus; -} CMSDKAPBTIMER; +}; /** * cmsdk_apb_timer_create - convenience function to create TYPE_CMSDK_APB_TIMER diff --git a/include/hw/timer/digic-timer.h b/include/hw/timer/digic-timer.h index d9e67fe291..543bf8c6be 100644 --- a/include/hw/timer/digic-timer.h +++ b/include/hw/timer/digic-timer.h @@ -20,8 +20,10 @@ #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "qom/object.h" #define TYPE_DIGIC_TIMER "digic-timer" +typedef struct DigicTimerState DigicTimerState; #define DIGIC_TIMER(obj) OBJECT_CHECK(DigicTimerState, (obj), TYPE_DIGIC_TIMER) #define DIGIC_TIMER_CONTROL 0x00 @@ -30,7 +32,7 @@ #define DIGIC_TIMER_RELVALUE 0x08 #define DIGIC_TIMER_VALUE 0x0c -typedef struct DigicTimerState { +struct DigicTimerState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -40,6 +42,6 @@ typedef struct DigicTimerState { uint32_t control; uint32_t relvalue; -} DigicTimerState; +}; #endif /* HW_TIMER_DIGIC_TIMER_H */ diff --git a/include/hw/timer/i8254.h b/include/hw/timer/i8254.h index 206b8f8464..6adbc31e7e 100644 --- a/include/hw/timer/i8254.h +++ b/include/hw/timer/i8254.h @@ -28,6 +28,7 @@ #include "hw/qdev-properties.h" #include "hw/isa/isa.h" #include "qapi/error.h" +#include "qom/object.h" #define PIT_FREQ 1193182 diff --git a/include/hw/timer/imx_epit.h b/include/hw/timer/imx_epit.h index 0730ac35e6..1ca110caf5 100644 --- a/include/hw/timer/imx_epit.h +++ b/include/hw/timer/imx_epit.h @@ -32,6 +32,7 @@ #include "hw/sysbus.h" #include "hw/ptimer.h" #include "hw/misc/imx_ccm.h" +#include "qom/object.h" /* * EPIT: Enhanced periodic interrupt timer @@ -55,9 +56,10 @@ #define EPIT_TIMER_MAX 0XFFFFFFFFUL #define TYPE_IMX_EPIT "imx.epit" +typedef struct IMXEPITState IMXEPITState; #define IMX_EPIT(obj) OBJECT_CHECK(IMXEPITState, (obj), TYPE_IMX_EPIT) -typedef struct IMXEPITState{ +struct IMXEPITState { /*< private >*/ SysBusDevice parent_obj; @@ -75,6 +77,6 @@ typedef struct IMXEPITState{ uint32_t freq; qemu_irq irq; -} IMXEPITState; +}; #endif /* IMX_EPIT_H */ diff --git a/include/hw/timer/imx_gpt.h b/include/hw/timer/imx_gpt.h index 20ccb327c4..b96633d8b2 100644 --- a/include/hw/timer/imx_gpt.h +++ b/include/hw/timer/imx_gpt.h @@ -32,6 +32,7 @@ #include "hw/sysbus.h" #include "hw/ptimer.h" #include "hw/misc/imx_ccm.h" +#include "qom/object.h" /* * GPT : General purpose timer @@ -81,9 +82,10 @@ #define TYPE_IMX_GPT TYPE_IMX25_GPT +typedef struct IMXGPTState IMXGPTState; #define IMX_GPT(obj) OBJECT_CHECK(IMXGPTState, (obj), TYPE_IMX_GPT) -typedef struct IMXGPTState{ +struct IMXGPTState { /*< private >*/ SysBusDevice parent_obj; @@ -111,6 +113,6 @@ typedef struct IMXGPTState{ qemu_irq irq; const IMXClk *clocks; -} IMXGPTState; +}; #endif /* IMX_GPT_H */ diff --git a/include/hw/timer/mss-timer.h b/include/hw/timer/mss-timer.h index e5a784b27e..011c5f1ba9 100644 --- a/include/hw/timer/mss-timer.h +++ b/include/hw/timer/mss-timer.h @@ -27,8 +27,10 @@ #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "qom/object.h" #define TYPE_MSS_TIMER "mss-timer" +typedef struct MSSTimerState MSSTimerState; #define MSS_TIMER(obj) OBJECT_CHECK(MSSTimerState, \ (obj), TYPE_MSS_TIMER) @@ -52,12 +54,12 @@ struct Msf2Timer { qemu_irq irq; }; -typedef struct MSSTimerState { +struct MSSTimerState { SysBusDevice parent_obj; MemoryRegion mmio; uint32_t freq_hz; struct Msf2Timer timers[NUM_TIMERS]; -} MSSTimerState; +}; #endif /* HW_MSS_TIMER_H */ diff --git a/include/hw/timer/nrf51_timer.h b/include/hw/timer/nrf51_timer.h index eb6815f21d..b4eb29bd76 100644 --- a/include/hw/timer/nrf51_timer.h +++ b/include/hw/timer/nrf51_timer.h @@ -15,7 +15,9 @@ #include "hw/sysbus.h" #include "qemu/timer.h" +#include "qom/object.h" #define TYPE_NRF51_TIMER "nrf51_soc.timer" +typedef struct NRF51TimerState NRF51TimerState; #define NRF51_TIMER(obj) OBJECT_CHECK(NRF51TimerState, (obj), TYPE_NRF51_TIMER) #define NRF51_TIMER_REG_COUNT 4 @@ -53,7 +55,7 @@ #define NRF51_TIMER_REG_CC0 0x540 #define NRF51_TIMER_REG_CC3 0x54C -typedef struct NRF51TimerState { +struct NRF51TimerState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -75,7 +77,7 @@ typedef struct NRF51TimerState { uint32_t bitmode; uint32_t prescaler; -} NRF51TimerState; +}; #endif diff --git a/include/hw/timer/renesas_cmt.h b/include/hw/timer/renesas_cmt.h index e28a15cb38..313f9e1965 100644 --- a/include/hw/timer/renesas_cmt.h +++ b/include/hw/timer/renesas_cmt.h @@ -11,8 +11,10 @@ #include "qemu/timer.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_RENESAS_CMT "renesas-cmt" +typedef struct RCMTState RCMTState; #define RCMT(obj) OBJECT_CHECK(RCMTState, (obj), TYPE_RENESAS_CMT) enum { @@ -20,7 +22,7 @@ enum { CMT_NR_IRQ = 1 * CMT_CH }; -typedef struct RCMTState { +struct RCMTState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -35,6 +37,6 @@ typedef struct RCMTState { int64_t tick[CMT_CH]; qemu_irq cmi[CMT_CH]; QEMUTimer timer[CMT_CH]; -} RCMTState; +}; #endif diff --git a/include/hw/timer/renesas_tmr.h b/include/hw/timer/renesas_tmr.h index cf3baa7a28..e2abcb13ad 100644 --- a/include/hw/timer/renesas_tmr.h +++ b/include/hw/timer/renesas_tmr.h @@ -11,8 +11,10 @@ #include "qemu/timer.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_RENESAS_TMR "renesas-tmr" +typedef struct RTMRState RTMRState; #define RTMR(obj) OBJECT_CHECK(RTMRState, (obj), TYPE_RENESAS_TMR) enum timer_event { @@ -28,7 +30,7 @@ enum { TMR_NR_IRQ = 3 * TMR_CH }; -typedef struct RTMRState { +struct RTMRState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -50,6 +52,6 @@ typedef struct RTMRState { qemu_irq cmib[TMR_CH]; qemu_irq ovi[TMR_CH]; QEMUTimer timer[TMR_CH]; -} RTMRState; +}; #endif diff --git a/include/hw/timer/stm32f2xx_timer.h b/include/hw/timer/stm32f2xx_timer.h index a96bc08b1b..9eb9201085 100644 --- a/include/hw/timer/stm32f2xx_timer.h +++ b/include/hw/timer/stm32f2xx_timer.h @@ -27,6 +27,7 @@ #include "hw/sysbus.h" #include "qemu/timer.h" +#include "qom/object.h" #define TIM_CR1 0x00 #define TIM_CR2 0x04 @@ -61,10 +62,11 @@ #define TIM_DIER_UIE 1 #define TYPE_STM32F2XX_TIMER "stm32f2xx-timer" +typedef struct STM32F2XXTimerState STM32F2XXTimerState; #define STM32F2XXTIMER(obj) OBJECT_CHECK(STM32F2XXTimerState, \ (obj), TYPE_STM32F2XX_TIMER) -typedef struct STM32F2XXTimerState { +struct STM32F2XXTimerState { /* <private> */ SysBusDevice parent_obj; @@ -95,6 +97,6 @@ typedef struct STM32F2XXTimerState { uint32_t tim_dcr; uint32_t tim_dmar; uint32_t tim_or; -} STM32F2XXTimerState; +}; #endif /* HW_STM32F2XX_TIMER_H */ diff --git a/include/hw/usb.h b/include/hw/usb.h index e29a37635b..e6ec0c891c 100644 --- a/include/hw/usb.h +++ b/include/hw/usb.h @@ -29,6 +29,7 @@ #include "hw/qdev-core.h" #include "qemu/iov.h" #include "qemu/queue.h" +#include "qom/object.h" /* Constants related to the USB / PCI interaction */ #define USB_SBRN 0x60 /* Serial Bus Release Number Register */ @@ -264,6 +265,7 @@ struct USBDevice { }; #define TYPE_USB_DEVICE "usb-device" +typedef struct USBDeviceClass USBDeviceClass; #define USB_DEVICE(obj) \ OBJECT_CHECK(USBDevice, (obj), TYPE_USB_DEVICE) #define USB_DEVICE_CLASS(klass) \ @@ -274,7 +276,7 @@ struct USBDevice { typedef void (*USBDeviceRealize)(USBDevice *dev, Error **errp); typedef void (*USBDeviceUnrealize)(USBDevice *dev); -typedef struct USBDeviceClass { +struct USBDeviceClass { DeviceClass parent_class; USBDeviceRealize realize; @@ -346,7 +348,7 @@ typedef struct USBDeviceClass { const char *product_desc; const USBDesc *usb_desc; bool attached_settable; -} USBDeviceClass; +}; typedef struct USBPortOps { void (*attach)(USBPort *port); diff --git a/include/hw/usb/chipidea.h b/include/hw/usb/chipidea.h index 1ec2e9dbda..1db449e1c4 100644 --- a/include/hw/usb/chipidea.h +++ b/include/hw/usb/chipidea.h @@ -2,13 +2,15 @@ #define CHIPIDEA_H #include "hw/usb/hcd-ehci.h" +#include "qom/object.h" -typedef struct ChipideaState { +struct ChipideaState { /*< private >*/ EHCISysBusState parent_obj; MemoryRegion iomem[3]; -} ChipideaState; +}; +typedef struct ChipideaState ChipideaState; #define TYPE_CHIPIDEA "usb-chipidea" #define CHIPIDEA(obj) OBJECT_CHECK(ChipideaState, (obj), TYPE_CHIPIDEA) diff --git a/include/hw/usb/imx-usb-phy.h b/include/hw/usb/imx-usb-phy.h index 07f0235d10..9861acb5ac 100644 --- a/include/hw/usb/imx-usb-phy.h +++ b/include/hw/usb/imx-usb-phy.h @@ -3,6 +3,7 @@ #include "hw/sysbus.h" #include "qemu/bitops.h" +#include "qom/object.h" enum IMXUsbPhyRegisters { USBPHY_PWD, @@ -38,9 +39,10 @@ enum IMXUsbPhyRegisters { #define USBPHY_CTRL_SFTRST BIT(31) #define TYPE_IMX_USBPHY "imx.usbphy" +typedef struct IMXUSBPHYState IMXUSBPHYState; #define IMX_USBPHY(obj) OBJECT_CHECK(IMXUSBPHYState, (obj), TYPE_IMX_USBPHY) -typedef struct IMXUSBPHYState { +struct IMXUSBPHYState { /* <private> */ SysBusDevice parent_obj; @@ -48,6 +50,6 @@ typedef struct IMXUSBPHYState { MemoryRegion iomem; uint32_t usbphy[USBPHY_MAX]; -} IMXUSBPHYState; +}; #endif /* IMX_USB_PHY_H */ diff --git a/include/hw/vfio/vfio-amd-xgbe.h b/include/hw/vfio/vfio-amd-xgbe.h index 9fff65e99d..b860ac0446 100644 --- a/include/hw/vfio/vfio-amd-xgbe.h +++ b/include/hw/vfio/vfio-amd-xgbe.h @@ -15,6 +15,7 @@ #define HW_VFIO_VFIO_AMD_XGBE_H #include "hw/vfio/vfio-platform.h" +#include "qom/object.h" #define TYPE_VFIO_AMD_XGBE "vfio-amd-xgbe" diff --git a/include/hw/vfio/vfio-calxeda-xgmac.h b/include/hw/vfio/vfio-calxeda-xgmac.h index f994775c09..b19dc2160b 100644 --- a/include/hw/vfio/vfio-calxeda-xgmac.h +++ b/include/hw/vfio/vfio-calxeda-xgmac.h @@ -15,6 +15,7 @@ #define HW_VFIO_VFIO_CALXEDA_XGMAC_H #include "hw/vfio/vfio-platform.h" +#include "qom/object.h" #define TYPE_VFIO_CALXEDA_XGMAC "vfio-calxeda-xgmac" @@ -23,16 +24,18 @@ * - a single MMIO region corresponding to its register space * - 3 IRQS (main and 2 power related IRQs) */ -typedef struct VFIOCalxedaXgmacDevice { +struct VFIOCalxedaXgmacDevice { VFIOPlatformDevice vdev; -} VFIOCalxedaXgmacDevice; +}; +typedef struct VFIOCalxedaXgmacDevice VFIOCalxedaXgmacDevice; -typedef struct VFIOCalxedaXgmacDeviceClass { +struct VFIOCalxedaXgmacDeviceClass { /*< private >*/ VFIOPlatformDeviceClass parent_class; /*< public >*/ DeviceRealize parent_realize; -} VFIOCalxedaXgmacDeviceClass; +}; +typedef struct VFIOCalxedaXgmacDeviceClass VFIOCalxedaXgmacDeviceClass; #define VFIO_CALXEDA_XGMAC_DEVICE(obj) \ OBJECT_CHECK(VFIOCalxedaXgmacDevice, (obj), TYPE_VFIO_CALXEDA_XGMAC) diff --git a/include/hw/vfio/vfio-platform.h b/include/hw/vfio/vfio-platform.h index 4ec70c813a..248c23dba7 100644 --- a/include/hw/vfio/vfio-platform.h +++ b/include/hw/vfio/vfio-platform.h @@ -20,6 +20,7 @@ #include "hw/vfio/vfio-common.h" #include "qemu/event_notifier.h" #include "qemu/queue.h" +#include "qom/object.h" #define TYPE_VFIO_PLATFORM "vfio-platform" @@ -46,7 +47,7 @@ typedef struct VFIOINTp { /* function type for user side eventfd handler */ typedef void (*eventfd_user_side_handler_t)(VFIOINTp *intp); -typedef struct VFIOPlatformDevice { +struct VFIOPlatformDevice { SysBusDevice sbdev; VFIODevice vbasedev; /* not a QOM object */ VFIORegion **regions; @@ -59,13 +60,15 @@ typedef struct VFIOPlatformDevice { QEMUTimer *mmap_timer; /* allows fast-path resume after IRQ hit */ QemuMutex intp_mutex; /* protect the intp_list IRQ state */ bool irqfd_allowed; /* debug option to force irqfd on/off */ -} VFIOPlatformDevice; +}; +typedef struct VFIOPlatformDevice VFIOPlatformDevice; -typedef struct VFIOPlatformDeviceClass { +struct VFIOPlatformDeviceClass { /*< private >*/ SysBusDeviceClass parent_class; /*< public >*/ -} VFIOPlatformDeviceClass; +}; +typedef struct VFIOPlatformDeviceClass VFIOPlatformDeviceClass; #define VFIO_PLATFORM_DEVICE(obj) \ OBJECT_CHECK(VFIOPlatformDevice, (obj), TYPE_VFIO_PLATFORM) diff --git a/include/hw/virtio/vhost-scsi-common.h b/include/hw/virtio/vhost-scsi-common.h index 16bf1a73c1..f198f25119 100644 --- a/include/hw/virtio/vhost-scsi-common.h +++ b/include/hw/virtio/vhost-scsi-common.h @@ -17,12 +17,14 @@ #include "hw/virtio/virtio-scsi.h" #include "hw/virtio/vhost.h" #include "hw/fw-path-provider.h" +#include "qom/object.h" #define TYPE_VHOST_SCSI_COMMON "vhost-scsi-common" +typedef struct VHostSCSICommon VHostSCSICommon; #define VHOST_SCSI_COMMON(obj) \ OBJECT_CHECK(VHostSCSICommon, (obj), TYPE_VHOST_SCSI_COMMON) -typedef struct VHostSCSICommon { +struct VHostSCSICommon { VirtIOSCSICommon parent_obj; Error *migration_blocker; @@ -35,7 +37,7 @@ typedef struct VHostSCSICommon { int lun; uint64_t host_features; bool migratable; -} VHostSCSICommon; +}; int vhost_scsi_common_start(VHostSCSICommon *vsc); void vhost_scsi_common_stop(VHostSCSICommon *vsc); diff --git a/include/hw/virtio/vhost-scsi.h b/include/hw/virtio/vhost-scsi.h index 23252153ff..72ae842646 100644 --- a/include/hw/virtio/vhost-scsi.h +++ b/include/hw/virtio/vhost-scsi.h @@ -17,6 +17,7 @@ #include "hw/virtio/virtio-scsi.h" #include "hw/virtio/vhost.h" #include "hw/virtio/vhost-scsi-common.h" +#include "qom/object.h" enum vhost_scsi_vq_list { VHOST_SCSI_VQ_CONTROL = 0, @@ -25,11 +26,12 @@ enum vhost_scsi_vq_list { }; #define TYPE_VHOST_SCSI "vhost-scsi" +typedef struct VHostSCSI VHostSCSI; #define VHOST_SCSI(obj) \ OBJECT_CHECK(VHostSCSI, (obj), TYPE_VHOST_SCSI) -typedef struct VHostSCSI { +struct VHostSCSI { VHostSCSICommon parent_obj; -} VHostSCSI; +}; #endif diff --git a/include/hw/virtio/vhost-user-blk.h b/include/hw/virtio/vhost-user-blk.h index 292d17147c..9d38877907 100644 --- a/include/hw/virtio/vhost-user-blk.h +++ b/include/hw/virtio/vhost-user-blk.h @@ -20,14 +20,16 @@ #include "chardev/char-fe.h" #include "hw/virtio/vhost.h" #include "hw/virtio/vhost-user.h" +#include "qom/object.h" #define TYPE_VHOST_USER_BLK "vhost-user-blk" +typedef struct VHostUserBlk VHostUserBlk; #define VHOST_USER_BLK(obj) \ OBJECT_CHECK(VHostUserBlk, (obj), TYPE_VHOST_USER_BLK) #define VHOST_USER_BLK_AUTO_NUM_QUEUES UINT16_MAX -typedef struct VHostUserBlk { +struct VHostUserBlk { VirtIODevice parent_obj; CharBackend chardev; int32_t bootindex; @@ -41,6 +43,6 @@ typedef struct VHostUserBlk { struct vhost_virtqueue *vhost_vqs; VirtQueue **virtqs; bool connected; -} VHostUserBlk; +}; #endif diff --git a/include/hw/virtio/vhost-user-fs.h b/include/hw/virtio/vhost-user-fs.h index 6f3030d288..fa82be0e8a 100644 --- a/include/hw/virtio/vhost-user-fs.h +++ b/include/hw/virtio/vhost-user-fs.h @@ -18,8 +18,10 @@ #include "hw/virtio/vhost.h" #include "hw/virtio/vhost-user.h" #include "chardev/char-fe.h" +#include "qom/object.h" #define TYPE_VHOST_USER_FS "vhost-user-fs-device" +typedef struct VHostUserFS VHostUserFS; #define VHOST_USER_FS(obj) \ OBJECT_CHECK(VHostUserFS, (obj), TYPE_VHOST_USER_FS) @@ -30,7 +32,7 @@ typedef struct { uint16_t queue_size; } VHostUserFSConf; -typedef struct { +struct VHostUserFS { /*< private >*/ VirtIODevice parent; VHostUserFSConf conf; @@ -41,6 +43,6 @@ typedef struct { VirtQueue *hiprio_vq; /*< public >*/ -} VHostUserFS; +}; #endif /* _QEMU_VHOST_USER_FS_H */ diff --git a/include/hw/virtio/vhost-user-scsi.h b/include/hw/virtio/vhost-user-scsi.h index 99ab2f2cc4..c4c4c29bf9 100644 --- a/include/hw/virtio/vhost-user-scsi.h +++ b/include/hw/virtio/vhost-user-scsi.h @@ -21,14 +21,16 @@ #include "hw/virtio/vhost.h" #include "hw/virtio/vhost-user.h" #include "hw/virtio/vhost-scsi-common.h" +#include "qom/object.h" #define TYPE_VHOST_USER_SCSI "vhost-user-scsi" +typedef struct VHostUserSCSI VHostUserSCSI; #define VHOST_USER_SCSI(obj) \ OBJECT_CHECK(VHostUserSCSI, (obj), TYPE_VHOST_USER_SCSI) -typedef struct VHostUserSCSI { +struct VHostUserSCSI { VHostSCSICommon parent_obj; VhostUserState vhost_user; -} VHostUserSCSI; +}; #endif /* VHOST_USER_SCSI_H */ diff --git a/include/hw/virtio/vhost-user-vsock.h b/include/hw/virtio/vhost-user-vsock.h index 4e128a4b9f..d7eda986b6 100644 --- a/include/hw/virtio/vhost-user-vsock.h +++ b/include/hw/virtio/vhost-user-vsock.h @@ -14,8 +14,10 @@ #include "hw/virtio/vhost-vsock-common.h" #include "hw/virtio/vhost-user.h" #include "standard-headers/linux/virtio_vsock.h" +#include "qom/object.h" #define TYPE_VHOST_USER_VSOCK "vhost-user-vsock-device" +typedef struct VHostUserVSock VHostUserVSock; #define VHOST_USER_VSOCK(obj) \ OBJECT_CHECK(VHostUserVSock, (obj), TYPE_VHOST_USER_VSOCK) @@ -23,7 +25,7 @@ typedef struct { CharBackend chardev; } VHostUserVSockConf; -typedef struct { +struct VHostUserVSock { /*< private >*/ VHostVSockCommon parent; VhostUserState vhost_user; @@ -31,6 +33,6 @@ typedef struct { struct virtio_vsock_config vsockcfg; /*< public >*/ -} VHostUserVSock; +}; #endif /* _QEMU_VHOST_USER_VSOCK_H */ diff --git a/include/hw/virtio/vhost-vsock-common.h b/include/hw/virtio/vhost-vsock-common.h index f8b4aaae00..a181396215 100644 --- a/include/hw/virtio/vhost-vsock-common.h +++ b/include/hw/virtio/vhost-vsock-common.h @@ -13,8 +13,10 @@ #include "hw/virtio/virtio.h" #include "hw/virtio/vhost.h" +#include "qom/object.h" #define TYPE_VHOST_VSOCK_COMMON "vhost-vsock-common" +typedef struct VHostVSockCommon VHostVSockCommon; #define VHOST_VSOCK_COMMON(obj) \ OBJECT_CHECK(VHostVSockCommon, (obj), TYPE_VHOST_VSOCK_COMMON) @@ -24,7 +26,7 @@ enum { VHOST_VSOCK_QUEUE_SIZE = 128, }; -typedef struct { +struct VHostVSockCommon { VirtIODevice parent; struct vhost_virtqueue vhost_vqs[2]; @@ -35,7 +37,7 @@ typedef struct { VirtQueue *trans_vq; QEMUTimer *post_load_timer; -} VHostVSockCommon; +}; int vhost_vsock_common_start(VirtIODevice *vdev); void vhost_vsock_common_stop(VirtIODevice *vdev); diff --git a/include/hw/virtio/vhost-vsock.h b/include/hw/virtio/vhost-vsock.h index 8cbb7b90f9..e13ff85d12 100644 --- a/include/hw/virtio/vhost-vsock.h +++ b/include/hw/virtio/vhost-vsock.h @@ -15,8 +15,10 @@ #define QEMU_VHOST_VSOCK_H #include "hw/virtio/vhost-vsock-common.h" +#include "qom/object.h" #define TYPE_VHOST_VSOCK "vhost-vsock-device" +typedef struct VHostVSock VHostVSock; #define VHOST_VSOCK(obj) \ OBJECT_CHECK(VHostVSock, (obj), TYPE_VHOST_VSOCK) @@ -25,12 +27,12 @@ typedef struct { char *vhostfd; } VHostVSockConf; -typedef struct { +struct VHostVSock { /*< private >*/ VHostVSockCommon parent; VHostVSockConf conf; /*< public >*/ -} VHostVSock; +}; #endif /* QEMU_VHOST_VSOCK_H */ diff --git a/include/hw/virtio/virtio-balloon.h b/include/hw/virtio/virtio-balloon.h index 28fd2b3960..a5b869a4d4 100644 --- a/include/hw/virtio/virtio-balloon.h +++ b/include/hw/virtio/virtio-balloon.h @@ -18,8 +18,10 @@ #include "standard-headers/linux/virtio_balloon.h" #include "hw/virtio/virtio.h" #include "sysemu/iothread.h" +#include "qom/object.h" #define TYPE_VIRTIO_BALLOON "virtio-balloon-device" +typedef struct VirtIOBalloon VirtIOBalloon; #define VIRTIO_BALLOON(obj) \ OBJECT_CHECK(VirtIOBalloon, (obj), TYPE_VIRTIO_BALLOON) @@ -40,7 +42,7 @@ enum virtio_balloon_free_page_hint_status { FREE_PAGE_HINT_S_DONE = 3, }; -typedef struct VirtIOBalloon { +struct VirtIOBalloon { VirtIODevice parent_obj; VirtQueue *ivq, *dvq, *svq, *free_page_vq, *reporting_vq; uint32_t free_page_hint_status; @@ -71,6 +73,6 @@ typedef struct VirtIOBalloon { bool qemu_4_0_config_size; uint32_t poison_val; -} VirtIOBalloon; +}; #endif diff --git a/include/hw/virtio/virtio-blk.h b/include/hw/virtio/virtio-blk.h index 7539c2b848..d299b55cb9 100644 --- a/include/hw/virtio/virtio-blk.h +++ b/include/hw/virtio/virtio-blk.h @@ -19,8 +19,10 @@ #include "hw/block/block.h" #include "sysemu/iothread.h" #include "sysemu/block-backend.h" +#include "qom/object.h" #define TYPE_VIRTIO_BLK "virtio-blk-device" +typedef struct VirtIOBlock VirtIOBlock; #define VIRTIO_BLK(obj) \ OBJECT_CHECK(VirtIOBlock, (obj), TYPE_VIRTIO_BLK) @@ -49,7 +51,7 @@ struct VirtIOBlkConf struct VirtIOBlockDataPlane; struct VirtIOBlockReq; -typedef struct VirtIOBlock { +struct VirtIOBlock { VirtIODevice parent_obj; BlockBackend *blk; void *rq; @@ -63,7 +65,7 @@ typedef struct VirtIOBlock { struct VirtIOBlockDataPlane *dataplane; uint64_t host_features; size_t config_size; -} VirtIOBlock; +}; typedef struct VirtIOBlockReq { VirtQueueElement elem; diff --git a/include/hw/virtio/virtio-bus.h b/include/hw/virtio/virtio-bus.h index 0f6f215925..f3e9096370 100644 --- a/include/hw/virtio/virtio-bus.h +++ b/include/hw/virtio/virtio-bus.h @@ -27,17 +27,19 @@ #include "hw/qdev-core.h" #include "hw/virtio/virtio.h" +#include "qom/object.h" #define TYPE_VIRTIO_BUS "virtio-bus" +typedef struct VirtioBusClass VirtioBusClass; +typedef struct VirtioBusState VirtioBusState; #define VIRTIO_BUS_GET_CLASS(obj) \ OBJECT_GET_CLASS(VirtioBusClass, obj, TYPE_VIRTIO_BUS) #define VIRTIO_BUS_CLASS(klass) \ OBJECT_CLASS_CHECK(VirtioBusClass, klass, TYPE_VIRTIO_BUS) #define VIRTIO_BUS(obj) OBJECT_CHECK(VirtioBusState, (obj), TYPE_VIRTIO_BUS) -typedef struct VirtioBusState VirtioBusState; -typedef struct VirtioBusClass { +struct VirtioBusClass { /* This is what a VirtioBus must implement */ BusClass parent; void (*notify)(DeviceState *d, uint16_t vector); @@ -94,7 +96,7 @@ typedef struct VirtioBusClass { */ bool has_variable_vring_alignment; AddressSpace *(*get_dma_as)(DeviceState *d); -} VirtioBusClass; +}; struct VirtioBusState { BusState parent_obj; diff --git a/include/hw/virtio/virtio-crypto.h b/include/hw/virtio/virtio-crypto.h index ffe2391ece..4134e1b7ca 100644 --- a/include/hw/virtio/virtio-crypto.h +++ b/include/hw/virtio/virtio-crypto.h @@ -18,6 +18,7 @@ #include "hw/virtio/virtio.h" #include "sysemu/iothread.h" #include "sysemu/cryptodev.h" +#include "qom/object.h" #define DEBUG_VIRTIO_CRYPTO 0 @@ -31,6 +32,7 @@ do { \ #define TYPE_VIRTIO_CRYPTO "virtio-crypto-device" +typedef struct VirtIOCrypto VirtIOCrypto; #define VIRTIO_CRYPTO(obj) \ OBJECT_CHECK(VirtIOCrypto, (obj), TYPE_VIRTIO_CRYPTO) #define VIRTIO_CRYPTO_GET_PARENT_CLASS(obj) \ @@ -82,7 +84,7 @@ typedef struct VirtIOCryptoQueue { struct VirtIOCrypto *vcrypto; } VirtIOCryptoQueue; -typedef struct VirtIOCrypto { +struct VirtIOCrypto { VirtIODevice parent_obj; VirtQueue *ctrl_vq; @@ -97,6 +99,6 @@ typedef struct VirtIOCrypto { uint32_t curr_queues; size_t config_size; uint8_t vhost_started; -} VirtIOCrypto; +}; #endif /* QEMU_VIRTIO_CRYPTO_H */ diff --git a/include/hw/virtio/virtio-gpu-pci.h b/include/hw/virtio/virtio-gpu-pci.h index 2f69b5a9cc..d727c8cada 100644 --- a/include/hw/virtio/virtio-gpu-pci.h +++ b/include/hw/virtio/virtio-gpu-pci.h @@ -16,6 +16,7 @@ #include "hw/virtio/virtio-pci.h" #include "hw/virtio/virtio-gpu.h" +#include "qom/object.h" typedef struct VirtIOGPUPCIBase VirtIOGPUPCIBase; diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 7517438e10..f464004bc2 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -22,8 +22,11 @@ #include "sysemu/vhost-user-backend.h" #include "standard-headers/linux/virtio_gpu.h" +#include "qom/object.h" #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base" +typedef struct VirtIOGPUBase VirtIOGPUBase; +typedef struct VirtIOGPUBaseClass VirtIOGPUBaseClass; #define VIRTIO_GPU_BASE(obj) \ OBJECT_CHECK(VirtIOGPUBase, (obj), TYPE_VIRTIO_GPU_BASE) #define VIRTIO_GPU_BASE_GET_CLASS(obj) \ @@ -32,10 +35,12 @@ OBJECT_CLASS_CHECK(VirtIOGPUBaseClass, klass, TYPE_VIRTIO_GPU_BASE) #define TYPE_VIRTIO_GPU "virtio-gpu-device" +typedef struct VirtIOGPU VirtIOGPU; #define VIRTIO_GPU(obj) \ OBJECT_CHECK(VirtIOGPU, (obj), TYPE_VIRTIO_GPU) #define TYPE_VHOST_USER_GPU "vhost-user-gpu" +typedef struct VhostUserGPU VhostUserGPU; #define VHOST_USER_GPU(obj) \ OBJECT_CHECK(VhostUserGPU, (obj), TYPE_VHOST_USER_GPU) @@ -100,7 +105,7 @@ struct virtio_gpu_ctrl_command { QTAILQ_ENTRY(virtio_gpu_ctrl_command) next; }; -typedef struct VirtIOGPUBase { +struct VirtIOGPUBase { VirtIODevice parent_obj; Error *migration_blocker; @@ -116,13 +121,13 @@ typedef struct VirtIOGPUBase { int enabled_output_bitmask; struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS]; -} VirtIOGPUBase; +}; -typedef struct VirtIOGPUBaseClass { +struct VirtIOGPUBaseClass { VirtioDeviceClass parent; void (*gl_unblock)(VirtIOGPUBase *g); -} VirtIOGPUBaseClass; +}; #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf) \ DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1), \ @@ -131,7 +136,7 @@ typedef struct VirtIOGPUBaseClass { DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1024), \ DEFINE_PROP_UINT32("yres", _state, _conf.yres, 768) -typedef struct VirtIOGPU { +struct VirtIOGPU { VirtIOGPUBase parent_obj; uint64_t conf_max_hostmem; @@ -160,9 +165,9 @@ typedef struct VirtIOGPU { uint32_t req_3d; uint32_t bytes_3d; } stats; -} VirtIOGPU; +}; -typedef struct VhostUserGPU { +struct VhostUserGPU { VirtIOGPUBase parent_obj; VhostUserBackend *vhost; @@ -170,7 +175,7 @@ typedef struct VhostUserGPU { CharBackend vhost_chr; QemuDmaBuf dmabuf[VIRTIO_GPU_MAX_SCANOUTS]; bool backend_blocked; -} VhostUserGPU; +}; extern const GraphicHwOps virtio_gpu_ops; diff --git a/include/hw/virtio/virtio-input.h b/include/hw/virtio/virtio-input.h index 4fca03e796..c15e983d36 100644 --- a/include/hw/virtio/virtio-input.h +++ b/include/hw/virtio/virtio-input.h @@ -9,6 +9,7 @@ #include "standard-headers/linux/virtio_ids.h" #include "standard-headers/linux/virtio_input.h" +#include "qom/object.h" typedef struct virtio_input_absinfo virtio_input_absinfo; typedef struct virtio_input_config virtio_input_config; @@ -18,6 +19,8 @@ typedef struct virtio_input_event virtio_input_event; /* qemu internals */ #define TYPE_VIRTIO_INPUT "virtio-input-device" +typedef struct VirtIOInput VirtIOInput; +typedef struct VirtIOInputClass VirtIOInputClass; #define VIRTIO_INPUT(obj) \ OBJECT_CHECK(VirtIOInput, (obj), TYPE_VIRTIO_INPUT) #define VIRTIO_INPUT_GET_PARENT_CLASS(obj) \ @@ -32,29 +35,27 @@ typedef struct virtio_input_event virtio_input_event; #define TYPE_VIRTIO_MOUSE "virtio-mouse-device" #define TYPE_VIRTIO_TABLET "virtio-tablet-device" +typedef struct VirtIOInputHID VirtIOInputHID; #define VIRTIO_INPUT_HID(obj) \ OBJECT_CHECK(VirtIOInputHID, (obj), TYPE_VIRTIO_INPUT_HID) #define VIRTIO_INPUT_HID_GET_PARENT_CLASS(obj) \ OBJECT_GET_PARENT_CLASS(obj, TYPE_VIRTIO_INPUT_HID) #define TYPE_VIRTIO_INPUT_HOST "virtio-input-host-device" +typedef struct VirtIOInputHost VirtIOInputHost; #define VIRTIO_INPUT_HOST(obj) \ OBJECT_CHECK(VirtIOInputHost, (obj), TYPE_VIRTIO_INPUT_HOST) #define VIRTIO_INPUT_HOST_GET_PARENT_CLASS(obj) \ OBJECT_GET_PARENT_CLASS(obj, TYPE_VIRTIO_INPUT_HOST) #define TYPE_VHOST_USER_INPUT "vhost-user-input" +typedef struct VHostUserInput VHostUserInput; #define VHOST_USER_INPUT(obj) \ OBJECT_CHECK(VHostUserInput, (obj), TYPE_VHOST_USER_INPUT) #define VHOST_USER_INPUT_GET_PARENT_CLASS(obj) \ OBJECT_GET_PARENT_CLASS(obj, TYPE_VHOST_USER_INPUT) -typedef struct VirtIOInput VirtIOInput; -typedef struct VirtIOInputClass VirtIOInputClass; typedef struct VirtIOInputConfig VirtIOInputConfig; -typedef struct VirtIOInputHID VirtIOInputHID; -typedef struct VirtIOInputHost VirtIOInputHost; -typedef struct VHostUserInput VHostUserInput; struct VirtIOInputConfig { virtio_input_config config; diff --git a/include/hw/virtio/virtio-iommu.h b/include/hw/virtio/virtio-iommu.h index 49eb105cd8..d852980b30 100644 --- a/include/hw/virtio/virtio-iommu.h +++ b/include/hw/virtio/virtio-iommu.h @@ -23,9 +23,11 @@ #include "standard-headers/linux/virtio_iommu.h" #include "hw/virtio/virtio.h" #include "hw/pci/pci.h" +#include "qom/object.h" #define TYPE_VIRTIO_IOMMU "virtio-iommu-device" #define TYPE_VIRTIO_IOMMU_PCI "virtio-iommu-device-base" +typedef struct VirtIOIOMMU VirtIOIOMMU; #define VIRTIO_IOMMU(obj) \ OBJECT_CHECK(VirtIOIOMMU, (obj), TYPE_VIRTIO_IOMMU) @@ -44,7 +46,7 @@ typedef struct IOMMUPciBus { IOMMUDevice *pbdev[]; /* Parent array is sparse, so dynamically alloc */ } IOMMUPciBus; -typedef struct VirtIOIOMMU { +struct VirtIOIOMMU { VirtIODevice parent_obj; VirtQueue *req_vq; VirtQueue *event_vq; @@ -58,6 +60,6 @@ typedef struct VirtIOIOMMU { GTree *domains; QemuMutex mutex; GTree *endpoints; -} VirtIOIOMMU; +}; #endif diff --git a/include/hw/virtio/virtio-mem.h b/include/hw/virtio/virtio-mem.h index 0778224964..08e37d8e84 100644 --- a/include/hw/virtio/virtio-mem.h +++ b/include/hw/virtio/virtio-mem.h @@ -17,9 +17,12 @@ #include "hw/virtio/virtio.h" #include "qapi/qapi-types-misc.h" #include "sysemu/hostmem.h" +#include "qom/object.h" #define TYPE_VIRTIO_MEM "virtio-mem" +typedef struct VirtIOMEM VirtIOMEM; +typedef struct VirtIOMEMClass VirtIOMEMClass; #define VIRTIO_MEM(obj) \ OBJECT_CHECK(VirtIOMEM, (obj), TYPE_VIRTIO_MEM) #define VIRTIO_MEM_CLASS(oc) \ @@ -34,7 +37,7 @@ #define VIRTIO_MEM_BLOCK_SIZE_PROP "block-size" #define VIRTIO_MEM_ADDR_PROP "memaddr" -typedef struct VirtIOMEM { +struct VirtIOMEM { VirtIODevice parent_obj; /* guest -> host request queue */ @@ -70,9 +73,9 @@ typedef struct VirtIOMEM { /* don't migrate unplugged memory */ NotifierWithReturn precopy_notifier; -} VirtIOMEM; +}; -typedef struct VirtIOMEMClass { +struct VirtIOMEMClass { /* private */ VirtIODevice parent; @@ -81,6 +84,6 @@ typedef struct VirtIOMEMClass { MemoryRegion *(*get_memory_region)(VirtIOMEM *vmem, Error **errp); void (*add_size_change_notifier)(VirtIOMEM *vmem, Notifier *notifier); void (*remove_size_change_notifier)(VirtIOMEM *vmem, Notifier *notifier); -} VirtIOMEMClass; +}; #endif diff --git a/include/hw/virtio/virtio-mmio.h b/include/hw/virtio/virtio-mmio.h index 7dbfd03dcf..947fb02d3e 100644 --- a/include/hw/virtio/virtio-mmio.h +++ b/include/hw/virtio/virtio-mmio.h @@ -23,6 +23,7 @@ #define HW_VIRTIO_MMIO_H #include "hw/virtio/virtio-bus.h" +#include "qom/object.h" /* QOM macros */ /* virtio-mmio-bus */ @@ -36,6 +37,7 @@ /* virtio-mmio */ #define TYPE_VIRTIO_MMIO "virtio-mmio" +typedef struct VirtIOMMIOProxy VirtIOMMIOProxy; #define VIRTIO_MMIO(obj) \ OBJECT_CHECK(VirtIOMMIOProxy, (obj), TYPE_VIRTIO_MMIO) @@ -52,7 +54,7 @@ typedef struct VirtIOMMIOQueue { uint32_t used[2]; } VirtIOMMIOQueue; -typedef struct { +struct VirtIOMMIOProxy { /* Generic */ SysBusDevice parent_obj; MemoryRegion iomem; @@ -68,6 +70,6 @@ typedef struct { /* Fields only used for non-legacy (v2) devices */ uint32_t guest_features[2]; VirtIOMMIOQueue vqs[VIRTIO_QUEUE_MAX]; -} VirtIOMMIOProxy; +}; #endif diff --git a/include/hw/virtio/virtio-net.h b/include/hw/virtio/virtio-net.h index a45ef8278e..2e81b5bfcb 100644 --- a/include/hw/virtio/virtio-net.h +++ b/include/hw/virtio/virtio-net.h @@ -19,8 +19,10 @@ #include "hw/virtio/virtio.h" #include "net/announce.h" #include "qemu/option_int.h" +#include "qom/object.h" #define TYPE_VIRTIO_NET "virtio-net-device" +typedef struct VirtIONet VirtIONet; #define VIRTIO_NET(obj) \ OBJECT_CHECK(VirtIONet, (obj), TYPE_VIRTIO_NET) @@ -109,7 +111,6 @@ typedef struct VirtioNetRscSeg { NetClientState *nc; } VirtioNetRscSeg; -typedef struct VirtIONet VirtIONet; /* Chain is divided by protocol(ipv4/v6) and NetClientInfo */ typedef struct VirtioNetRscChain { diff --git a/include/hw/virtio/virtio-pmem.h b/include/hw/virtio/virtio-pmem.h index 33f1999320..56bce2be7a 100644 --- a/include/hw/virtio/virtio-pmem.h +++ b/include/hw/virtio/virtio-pmem.h @@ -16,9 +16,12 @@ #include "hw/virtio/virtio.h" #include "qapi/qapi-types-misc.h" +#include "qom/object.h" #define TYPE_VIRTIO_PMEM "virtio-pmem" +typedef struct VirtIOPMEM VirtIOPMEM; +typedef struct VirtIOPMEMClass VirtIOPMEMClass; #define VIRTIO_PMEM(obj) \ OBJECT_CHECK(VirtIOPMEM, (obj), TYPE_VIRTIO_PMEM) #define VIRTIO_PMEM_CLASS(oc) \ @@ -29,21 +32,21 @@ #define VIRTIO_PMEM_ADDR_PROP "memaddr" #define VIRTIO_PMEM_MEMDEV_PROP "memdev" -typedef struct VirtIOPMEM { +struct VirtIOPMEM { VirtIODevice parent_obj; VirtQueue *rq_vq; uint64_t start; HostMemoryBackend *memdev; -} VirtIOPMEM; +}; -typedef struct VirtIOPMEMClass { +struct VirtIOPMEMClass { /* private */ VirtIODevice parent; /* public */ void (*fill_device_info)(const VirtIOPMEM *pmem, VirtioPMEMDeviceInfo *vi); MemoryRegion *(*get_memory_region)(VirtIOPMEM *pmem, Error **errp); -} VirtIOPMEMClass; +}; #endif diff --git a/include/hw/virtio/virtio-rng.h b/include/hw/virtio/virtio-rng.h index bd05d734b8..34fb5f695f 100644 --- a/include/hw/virtio/virtio-rng.h +++ b/include/hw/virtio/virtio-rng.h @@ -15,8 +15,10 @@ #include "hw/virtio/virtio.h" #include "sysemu/rng.h" #include "standard-headers/linux/virtio_rng.h" +#include "qom/object.h" #define TYPE_VIRTIO_RNG "virtio-rng-device" +typedef struct VirtIORNG VirtIORNG; #define VIRTIO_RNG(obj) \ OBJECT_CHECK(VirtIORNG, (obj), TYPE_VIRTIO_RNG) #define VIRTIO_RNG_GET_PARENT_CLASS(obj) \ @@ -28,7 +30,7 @@ struct VirtIORNGConf { uint32_t period_ms; }; -typedef struct VirtIORNG { +struct VirtIORNG { VirtIODevice parent_obj; /* Only one vq - guest puts buffer(s) on it when it needs entropy */ @@ -46,6 +48,6 @@ typedef struct VirtIORNG { bool activate_timer; VMChangeStateEntry *vmstate; -} VirtIORNG; +}; #endif diff --git a/include/hw/virtio/virtio-scsi.h b/include/hw/virtio/virtio-scsi.h index c0b8e4dd7e..bbf4b9a356 100644 --- a/include/hw/virtio/virtio-scsi.h +++ b/include/hw/virtio/virtio-scsi.h @@ -13,6 +13,7 @@ #ifndef QEMU_VIRTIO_SCSI_H #define QEMU_VIRTIO_SCSI_H +#include "qom/object.h" /* Override CDB/sense data size: they are dynamic (guest controlled) in QEMU */ #define VIRTIO_SCSI_CDB_SIZE 0 @@ -25,10 +26,12 @@ #include "sysemu/iothread.h" #define TYPE_VIRTIO_SCSI_COMMON "virtio-scsi-common" +typedef struct VirtIOSCSICommon VirtIOSCSICommon; #define VIRTIO_SCSI_COMMON(obj) \ OBJECT_CHECK(VirtIOSCSICommon, (obj), TYPE_VIRTIO_SCSI_COMMON) #define TYPE_VIRTIO_SCSI "virtio-scsi-device" +typedef struct VirtIOSCSI VirtIOSCSI; #define VIRTIO_SCSI(obj) \ OBJECT_CHECK(VirtIOSCSI, (obj), TYPE_VIRTIO_SCSI) @@ -67,7 +70,7 @@ struct VirtIOSCSIConf { struct VirtIOSCSI; -typedef struct VirtIOSCSICommon { +struct VirtIOSCSICommon { VirtIODevice parent_obj; VirtIOSCSIConf conf; @@ -76,9 +79,9 @@ typedef struct VirtIOSCSICommon { VirtQueue *ctrl_vq; VirtQueue *event_vq; VirtQueue **cmd_vqs; -} VirtIOSCSICommon; +}; -typedef struct VirtIOSCSI { +struct VirtIOSCSI { VirtIOSCSICommon parent_obj; SCSIBus bus; @@ -93,7 +96,7 @@ typedef struct VirtIOSCSI { bool dataplane_stopping; bool dataplane_fenced; uint32_t host_features; -} VirtIOSCSI; +}; typedef struct VirtIOSCSIReq { /* Note: diff --git a/include/hw/virtio/virtio-serial.h b/include/hw/virtio/virtio-serial.h index 448615a6b3..94da09ec34 100644 --- a/include/hw/virtio/virtio-serial.h +++ b/include/hw/virtio/virtio-serial.h @@ -18,6 +18,7 @@ #include "standard-headers/linux/virtio_console.h" #include "hw/virtio/virtio.h" +#include "qom/object.h" struct virtio_serial_conf { /* Max. number of ports we can have for a virtio-serial device */ @@ -25,6 +26,8 @@ struct virtio_serial_conf { }; #define TYPE_VIRTIO_SERIAL_PORT "virtio-serial-port" +typedef struct VirtIOSerialPort VirtIOSerialPort; +typedef struct VirtIOSerialPortClass VirtIOSerialPortClass; #define VIRTIO_SERIAL_PORT(obj) \ OBJECT_CHECK(VirtIOSerialPort, (obj), TYPE_VIRTIO_SERIAL_PORT) #define VIRTIO_SERIAL_PORT_CLASS(klass) \ @@ -39,9 +42,8 @@ typedef struct VirtIOSerialBus VirtIOSerialBus; #define VIRTIO_SERIAL_BUS(obj) \ OBJECT_CHECK(VirtIOSerialBus, (obj), TYPE_VIRTIO_SERIAL_BUS) -typedef struct VirtIOSerialPort VirtIOSerialPort; -typedef struct VirtIOSerialPortClass { +struct VirtIOSerialPortClass { DeviceClass parent_class; /* Is this a device that binds with hvc in the guest? */ @@ -86,7 +88,7 @@ typedef struct VirtIOSerialPortClass { */ ssize_t (*have_data)(VirtIOSerialPort *port, const uint8_t *buf, ssize_t len); -} VirtIOSerialPortClass; +}; /* * This is the state that's shared between all the ports. Some of the diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h index e424df12cf..261d087de8 100644 --- a/include/hw/virtio/virtio.h +++ b/include/hw/virtio/virtio.h @@ -21,6 +21,7 @@ #include "qemu/event_notifier.h" #include "standard-headers/linux/virtio_config.h" #include "standard-headers/linux/virtio_ring.h" +#include "qom/object.h" /* A guest should never accept this. It implies negotiation is broken. */ #define VIRTIO_F_BAD_FEATURE 30 @@ -67,6 +68,7 @@ typedef struct VirtQueueElement #define VIRTIO_NO_VECTOR 0xffff #define TYPE_VIRTIO_DEVICE "virtio-device" +typedef struct VirtioDeviceClass VirtioDeviceClass; #define VIRTIO_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(VirtioDeviceClass, obj, TYPE_VIRTIO_DEVICE) #define VIRTIO_DEVICE_CLASS(klass) \ @@ -113,7 +115,7 @@ struct VirtIODevice QLIST_HEAD(, VirtQueue) *vector_queues; }; -typedef struct VirtioDeviceClass { +struct VirtioDeviceClass { /*< private >*/ DeviceClass parent; /*< public >*/ @@ -163,7 +165,7 @@ typedef struct VirtioDeviceClass { int (*post_load)(VirtIODevice *vdev); const VMStateDescription *vmsd; bool (*primary_unplug_pending)(void *opaque); -} VirtioDeviceClass; +}; void virtio_instance_init_common(Object *proxy_obj, void *data, size_t vdev_size, const char *vdev_name); diff --git a/include/hw/vmstate-if.h b/include/hw/vmstate-if.h index 8ff7f0f292..eabf5b05ad 100644 --- a/include/hw/vmstate-if.h +++ b/include/hw/vmstate-if.h @@ -13,6 +13,7 @@ #define TYPE_VMSTATE_IF "vmstate-if" +typedef struct VMStateIfClass VMStateIfClass; #define VMSTATE_IF_CLASS(klass) \ OBJECT_CLASS_CHECK(VMStateIfClass, (klass), TYPE_VMSTATE_IF) #define VMSTATE_IF_GET_CLASS(obj) \ @@ -22,11 +23,11 @@ typedef struct VMStateIf VMStateIf; -typedef struct VMStateIfClass { +struct VMStateIfClass { InterfaceClass parent_class; char * (*get_id)(VMStateIf *obj); -} VMStateIfClass; +}; static inline char *vmstate_if_get_id(VMStateIf *vmif) { diff --git a/include/hw/watchdog/cmsdk-apb-watchdog.h b/include/hw/watchdog/cmsdk-apb-watchdog.h index 6ae9531370..be2983eefa 100644 --- a/include/hw/watchdog/cmsdk-apb-watchdog.h +++ b/include/hw/watchdog/cmsdk-apb-watchdog.h @@ -33,8 +33,10 @@ #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "qom/object.h" #define TYPE_CMSDK_APB_WATCHDOG "cmsdk-apb-watchdog" +typedef struct CMSDKAPBWatchdog CMSDKAPBWatchdog; #define CMSDK_APB_WATCHDOG(obj) OBJECT_CHECK(CMSDKAPBWatchdog, (obj), \ TYPE_CMSDK_APB_WATCHDOG) @@ -44,7 +46,7 @@ */ #define TYPE_LUMINARY_WATCHDOG "luminary-watchdog" -typedef struct CMSDKAPBWatchdog { +struct CMSDKAPBWatchdog { /*< private >*/ SysBusDevice parent_obj; @@ -62,6 +64,6 @@ typedef struct CMSDKAPBWatchdog { uint32_t itop; uint32_t resetstatus; const uint32_t *id; -} CMSDKAPBWatchdog; +}; #endif diff --git a/include/hw/watchdog/wdt_aspeed.h b/include/hw/watchdog/wdt_aspeed.h index 819c22993a..ba9a0a1fd8 100644 --- a/include/hw/watchdog/wdt_aspeed.h +++ b/include/hw/watchdog/wdt_aspeed.h @@ -12,8 +12,11 @@ #include "hw/misc/aspeed_scu.h" #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_ASPEED_WDT "aspeed.wdt" +typedef struct AspeedWDTClass AspeedWDTClass; +typedef struct AspeedWDTState AspeedWDTState; #define ASPEED_WDT(obj) \ OBJECT_CHECK(AspeedWDTState, (obj), TYPE_ASPEED_WDT) #define TYPE_ASPEED_2400_WDT TYPE_ASPEED_WDT "-ast2400" @@ -22,7 +25,7 @@ #define ASPEED_WDT_REGS_MAX (0x20 / 4) -typedef struct AspeedWDTState { +struct AspeedWDTState { /*< private >*/ SysBusDevice parent_obj; QEMUTimer *timer; @@ -33,14 +36,14 @@ typedef struct AspeedWDTState { AspeedSCUState *scu; uint32_t pclk_freq; -} AspeedWDTState; +}; #define ASPEED_WDT_CLASS(klass) \ OBJECT_CLASS_CHECK(AspeedWDTClass, (klass), TYPE_ASPEED_WDT) #define ASPEED_WDT_GET_CLASS(obj) \ OBJECT_GET_CLASS(AspeedWDTClass, (obj), TYPE_ASPEED_WDT) -typedef struct AspeedWDTClass { +struct AspeedWDTClass { SysBusDeviceClass parent_class; uint32_t offset; @@ -48,6 +51,6 @@ typedef struct AspeedWDTClass { uint32_t reset_ctrl_reg; void (*reset_pulse)(AspeedWDTState *s, uint32_t property); void (*wdt_reload)(AspeedWDTState *s); -} AspeedWDTClass; +}; #endif /* WDT_ASPEED_H */ diff --git a/include/hw/watchdog/wdt_diag288.h b/include/hw/watchdog/wdt_diag288.h index 19d83a0937..e611163821 100644 --- a/include/hw/watchdog/wdt_diag288.h +++ b/include/hw/watchdog/wdt_diag288.h @@ -2,8 +2,11 @@ #define WDT_DIAG288_H #include "hw/qdev-core.h" +#include "qom/object.h" #define TYPE_WDT_DIAG288 "diag288" +typedef struct DIAG288Class DIAG288Class; +typedef struct DIAG288State DIAG288State; #define DIAG288(obj) \ OBJECT_CHECK(DIAG288State, (obj), TYPE_WDT_DIAG288) #define DIAG288_CLASS(klass) \ @@ -15,22 +18,22 @@ #define WDT_DIAG288_CHANGE 1 #define WDT_DIAG288_CANCEL 2 -typedef struct DIAG288State { +struct DIAG288State { /*< private >*/ DeviceState parent_obj; QEMUTimer *timer; bool enabled; /*< public >*/ -} DIAG288State; +}; -typedef struct DIAG288Class { +struct DIAG288Class { /*< private >*/ DeviceClass parent_class; /*< public >*/ int (*handle_timer)(DIAG288State *dev, uint64_t func, uint64_t timeout); -} DIAG288Class; +}; #endif /* WDT_DIAG288_H */ diff --git a/include/hw/watchdog/wdt_imx2.h b/include/hw/watchdog/wdt_imx2.h index f9af6be4b6..8757418b46 100644 --- a/include/hw/watchdog/wdt_imx2.h +++ b/include/hw/watchdog/wdt_imx2.h @@ -16,8 +16,10 @@ #include "hw/sysbus.h" #include "hw/irq.h" #include "hw/ptimer.h" +#include "qom/object.h" #define TYPE_IMX2_WDT "imx2.wdt" +typedef struct IMX2WdtState IMX2WdtState; #define IMX2_WDT(obj) OBJECT_CHECK(IMX2WdtState, (obj), TYPE_IMX2_WDT) enum IMX2WdtRegisters { @@ -62,7 +64,7 @@ enum IMX2WdtRegisters { /* Misc Control Register definitions */ #define IMX2_WDT_WMCR_PDE BIT(0) /* Power-Down Enable */ -typedef struct IMX2WdtState { +struct IMX2WdtState { /* <private> */ SysBusDevice parent_obj; @@ -85,6 +87,6 @@ typedef struct IMX2WdtState { bool wcr_locked; /* affects WDZST, WDBG, and WDW */ bool wcr_wde_locked; /* affects WDE */ bool wcr_wdt_locked; /* affects WDT (never cleared) */ -} IMX2WdtState; +}; #endif /* IMX2_WDT_H */ diff --git a/include/hw/xen/xen-block.h b/include/hw/xen/xen-block.h index 2cd2fc2701..54f2e35122 100644 --- a/include/hw/xen/xen-block.h +++ b/include/hw/xen/xen-block.h @@ -12,6 +12,7 @@ #include "hw/block/block.h" #include "hw/block/dataplane/xen-block.h" #include "sysemu/iothread.h" +#include "qom/object.h" typedef enum XenBlockVdevType { XEN_BLOCK_VDEV_TYPE_INVALID, @@ -46,7 +47,7 @@ typedef struct XenBlockIOThread { char *id; } XenBlockIOThread; -typedef struct XenBlockDevice { +struct XenBlockDevice { XenDevice xendev; XenBlockProperties props; const char *device_type; @@ -54,18 +55,20 @@ typedef struct XenBlockDevice { XenBlockDataPlane *dataplane; XenBlockDrive *drive; XenBlockIOThread *iothread; -} XenBlockDevice; +}; +typedef struct XenBlockDevice XenBlockDevice; typedef void (*XenBlockDeviceRealize)(XenBlockDevice *blockdev, Error **errp); typedef void (*XenBlockDeviceUnrealize)(XenBlockDevice *blockdev); -typedef struct XenBlockDeviceClass { +struct XenBlockDeviceClass { /*< private >*/ XenDeviceClass parent_class; /*< public >*/ XenBlockDeviceRealize realize; XenBlockDeviceUnrealize unrealize; -} XenBlockDeviceClass; +}; +typedef struct XenBlockDeviceClass XenBlockDeviceClass; #define TYPE_XEN_BLOCK_DEVICE "xen-block" #define XEN_BLOCK_DEVICE(obj) \ @@ -75,17 +78,19 @@ typedef struct XenBlockDeviceClass { #define XEN_BLOCK_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(XenBlockDeviceClass, (obj), TYPE_XEN_BLOCK_DEVICE) -typedef struct XenDiskDevice { +struct XenDiskDevice { XenBlockDevice blockdev; -} XenDiskDevice; +}; +typedef struct XenDiskDevice XenDiskDevice; #define TYPE_XEN_DISK_DEVICE "xen-disk" #define XEN_DISK_DEVICE(obj) \ OBJECT_CHECK(XenDiskDevice, (obj), TYPE_XEN_DISK_DEVICE) -typedef struct XenCDRomDevice { +struct XenCDRomDevice { XenBlockDevice blockdev; -} XenCDRomDevice; +}; +typedef struct XenCDRomDevice XenCDRomDevice; #define TYPE_XEN_CDROM_DEVICE "xen-cdrom" #define XEN_CDROM_DEVICE(obj) \ diff --git a/include/hw/xen/xen-bus.h b/include/hw/xen/xen-bus.h index 4ec0bb072f..910cf49161 100644 --- a/include/hw/xen/xen-bus.h +++ b/include/hw/xen/xen-bus.h @@ -11,6 +11,7 @@ #include "hw/xen/xen_common.h" #include "hw/sysbus.h" #include "qemu/notify.h" +#include "qom/object.h" typedef void (*XenWatchHandler)(void *opaque); @@ -18,7 +19,7 @@ typedef struct XenWatchList XenWatchList; typedef struct XenWatch XenWatch; typedef struct XenEventChannel XenEventChannel; -typedef struct XenDevice { +struct XenDevice { DeviceState qdev; domid_t frontend_id; char *name; @@ -35,7 +36,8 @@ typedef struct XenDevice { bool inactive; QLIST_HEAD(, XenEventChannel) event_channels; QLIST_ENTRY(XenDevice) list; -} XenDevice; +}; +typedef struct XenDevice XenDevice; typedef char *(*XenDeviceGetName)(XenDevice *xendev, Error **errp); typedef void (*XenDeviceRealize)(XenDevice *xendev, Error **errp); @@ -44,7 +46,7 @@ typedef void (*XenDeviceFrontendChanged)(XenDevice *xendev, Error **errp); typedef void (*XenDeviceUnrealize)(XenDevice *xendev); -typedef struct XenDeviceClass { +struct XenDeviceClass { /*< private >*/ DeviceClass parent_class; /*< public >*/ @@ -54,7 +56,8 @@ typedef struct XenDeviceClass { XenDeviceRealize realize; XenDeviceFrontendChanged frontend_changed; XenDeviceUnrealize unrealize; -} XenDeviceClass; +}; +typedef struct XenDeviceClass XenDeviceClass; #define TYPE_XEN_DEVICE "xen-device" #define XEN_DEVICE(obj) \ @@ -64,19 +67,21 @@ typedef struct XenDeviceClass { #define XEN_DEVICE_GET_CLASS(obj) \ OBJECT_GET_CLASS(XenDeviceClass, (obj), TYPE_XEN_DEVICE) -typedef struct XenBus { +struct XenBus { BusState qbus; domid_t backend_id; struct xs_handle *xsh; XenWatchList *watch_list; XenWatch *backend_watch; QLIST_HEAD(, XenDevice) inactive_devices; -} XenBus; +}; +typedef struct XenBus XenBus; -typedef struct XenBusClass { +struct XenBusClass { /*< private >*/ BusClass parent_class; -} XenBusClass; +}; +typedef struct XenBusClass XenBusClass; #define TYPE_XEN_BUS "xen-bus" #define XEN_BUS(obj) \ diff --git a/include/hw/xen/xen-legacy-backend.h b/include/hw/xen/xen-legacy-backend.h index 704bc7852b..89b51e05fc 100644 --- a/include/hw/xen/xen-legacy-backend.h +++ b/include/hw/xen/xen-legacy-backend.h @@ -4,6 +4,7 @@ #include "hw/xen/xen_common.h" #include "hw/xen/xen_pvdev.h" #include "net/net.h" +#include "qom/object.h" #define TYPE_XENSYSDEV "xen-sysdev" #define TYPE_XENSYSBUS "xen-sysbus" |