diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/char/escc.h | 54 | ||||
| -rw-r--r-- | include/hw/misc/macio/cuda.h | 107 | ||||
| -rw-r--r-- | include/hw/pci/pcie_host.h | 2 | ||||
| -rw-r--r-- | include/hw/ppc/spapr.h | 3 |
4 files changed, 159 insertions, 7 deletions
diff --git a/include/hw/char/escc.h b/include/hw/char/escc.h index 08ae122386..42aca83611 100644 --- a/include/hw/char/escc.h +++ b/include/hw/char/escc.h @@ -1,14 +1,58 @@ #ifndef HW_ESCC_H #define HW_ESCC_H +#include "chardev/char-fe.h" +#include "chardev/char-serial.h" +#include "ui/input.h" + /* escc.c */ #define TYPE_ESCC "escc" #define ESCC_SIZE 4 -MemoryRegion *escc_init(hwaddr base, qemu_irq irqA, qemu_irq irqB, - Chardev *chrA, Chardev *chrB, - int clock, int it_shift); -void slavio_serial_ms_kbd_init(hwaddr base, qemu_irq irq, - int disabled, int clock, int it_shift); +#define ESCC(obj) OBJECT_CHECK(ESCCState, (obj), TYPE_ESCC) + +typedef enum { + escc_chn_a, escc_chn_b, +} ESCCChnID; + +typedef enum { + escc_serial, escc_kbd, escc_mouse, +} ESCCChnType; + +#define ESCC_SERIO_QUEUE_SIZE 256 + +typedef struct { + uint8_t data[ESCC_SERIO_QUEUE_SIZE]; + int rptr, wptr, count; +} ESCCSERIOQueue; + +#define ESCC_SERIAL_REGS 16 +typedef struct ESCCChannelState { + qemu_irq irq; + uint32_t rxint, txint, rxint_under_svc, txint_under_svc; + struct ESCCChannelState *otherchn; + uint32_t reg; + uint8_t wregs[ESCC_SERIAL_REGS], rregs[ESCC_SERIAL_REGS]; + ESCCSERIOQueue queue; + CharBackend chr; + int e0_mode, led_mode, caps_lock_mode, num_lock_mode; + int disabled; + int clock; + uint32_t vmstate_dummy; + ESCCChnID chn; /* this channel, A (base+4) or B (base+0) */ + ESCCChnType type; + uint8_t rx, tx; + QemuInputHandlerState *hs; +} ESCCChannelState; + +typedef struct ESCCState { + SysBusDevice parent_obj; + + struct ESCCChannelState chn[2]; + uint32_t it_shift; + MemoryRegion mmio; + uint32_t disabled; + uint32_t frequency; +} ESCCState; #endif diff --git a/include/hw/misc/macio/cuda.h b/include/hw/misc/macio/cuda.h new file mode 100644 index 0000000000..6afbdd13ee --- /dev/null +++ b/include/hw/misc/macio/cuda.h @@ -0,0 +1,107 @@ +/* + * QEMU PowerMac CUDA device support + * + * Copyright (c) 2004-2007 Fabrice Bellard + * Copyright (c) 2007 Jocelyn Mayer + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef CUDA_H +#define CUDA_H + +/* CUDA commands (2nd byte) */ +#define CUDA_WARM_START 0x0 +#define CUDA_AUTOPOLL 0x1 +#define CUDA_GET_6805_ADDR 0x2 +#define CUDA_GET_TIME 0x3 +#define CUDA_GET_PRAM 0x7 +#define CUDA_SET_6805_ADDR 0x8 +#define CUDA_SET_TIME 0x9 +#define CUDA_POWERDOWN 0xa +#define CUDA_POWERUP_TIME 0xb +#define CUDA_SET_PRAM 0xc +#define CUDA_MS_RESET 0xd +#define CUDA_SEND_DFAC 0xe +#define CUDA_BATTERY_SWAP_SENSE 0x10 +#define CUDA_RESET_SYSTEM 0x11 +#define CUDA_SET_IPL 0x12 +#define CUDA_FILE_SERVER_FLAG 0x13 +#define CUDA_SET_AUTO_RATE 0x14 +#define CUDA_GET_AUTO_RATE 0x16 +#define CUDA_SET_DEVICE_LIST 0x19 +#define CUDA_GET_DEVICE_LIST 0x1a +#define CUDA_SET_ONE_SECOND_MODE 0x1b +#define CUDA_SET_POWER_MESSAGES 0x21 +#define CUDA_GET_SET_IIC 0x22 +#define CUDA_WAKEUP 0x23 +#define CUDA_TIMER_TICKLE 0x24 +#define CUDA_COMBINED_FORMAT_IIC 0x25 + +/* Cuda */ +#define TYPE_CUDA "cuda" +#define CUDA(obj) OBJECT_CHECK(CUDAState, (obj), TYPE_CUDA) + +typedef struct MOS6522CUDAState MOS6522CUDAState; + +typedef struct CUDAState { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ + MemoryRegion mem; + + ADBBusState adb_bus; + MOS6522CUDAState *mos6522_cuda; + + uint32_t tick_offset; + uint64_t tb_frequency; + + uint8_t last_b; + uint8_t last_acr; + + /* MacOS 9 is racy and requires a delay upon setting the SR_INT bit */ + uint64_t sr_delay_ns; + QEMUTimer *sr_delay_timer; + + int data_in_size; + int data_in_index; + int data_out_index; + + qemu_irq irq; + uint16_t adb_poll_mask; + uint8_t autopoll_rate_ms; + uint8_t autopoll; + uint8_t data_in[128]; + uint8_t data_out[16]; + QEMUTimer *adb_poll_timer; +} CUDAState; + +/* MOS6522 CUDA */ +typedef struct MOS6522CUDAState { + /*< private >*/ + MOS6522State parent_obj; + + CUDAState *cuda; +} MOS6522CUDAState; + +#define TYPE_MOS6522_CUDA "mos6522-cuda" +#define MOS6522_CUDA(obj) OBJECT_CHECK(MOS6522CUDAState, (obj), \ + TYPE_MOS6522_CUDA) + +#endif /* CUDA_H */ diff --git a/include/hw/pci/pcie_host.h b/include/hw/pci/pcie_host.h index 4d23c80759..3f7b9886d1 100644 --- a/include/hw/pci/pcie_host.h +++ b/include/hw/pci/pcie_host.h @@ -65,7 +65,7 @@ void pcie_host_mmcfg_update(PCIExpressHost *e, * bit 12 - 14: function number * bit 0 - 11: offset in configuration space of a given device */ -#define PCIE_MMCFG_SIZE_MAX (1ULL << 28) +#define PCIE_MMCFG_SIZE_MAX (1ULL << 29) #define PCIE_MMCFG_SIZE_MIN (1ULL << 20) #define PCIE_MMCFG_BUS_BIT 20 #define PCIE_MMCFG_BUS_MASK 0x1ff diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 62c077ac20..36942b378d 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -766,7 +766,8 @@ void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg); #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift)) -int spapr_vcpu_id(PowerPCCPU *cpu); +int spapr_get_vcpu_id(PowerPCCPU *cpu); +void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp); PowerPCCPU *spapr_find_cpu(int vcpu_id); int spapr_irq_alloc(sPAPRMachineState *spapr, int irq_hint, bool lsi, |