diff options
Diffstat (limited to 'target-sh4/helper.c')
| -rw-r--r-- | target-sh4/helper.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/target-sh4/helper.c b/target-sh4/helper.c index 006d1a9db8..5c57380f12 100644 --- a/target-sh4/helper.c +++ b/target-sh4/helper.c @@ -31,12 +31,12 @@ #if defined(CONFIG_USER_ONLY) -void do_interrupt (CPUState *env) +void do_interrupt (CPUSH4State *env) { env->exception_index = -1; } -int cpu_sh4_handle_mmu_fault(CPUState * env, target_ulong address, int rw, +int cpu_sh4_handle_mmu_fault(CPUSH4State * env, target_ulong address, int rw, int mmu_idx) { env->tea = address; @@ -78,7 +78,7 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr) #define MMU_DADDR_ERROR_READ (-12) #define MMU_DADDR_ERROR_WRITE (-13) -void do_interrupt(CPUState * env) +void do_interrupt(CPUSH4State * env) { int do_irq = env->interrupt_request & CPU_INTERRUPT_HARD; int do_exp, irq_vector = env->exception_index; @@ -202,7 +202,7 @@ void do_interrupt(CPUState * env) } } -static void update_itlb_use(CPUState * env, int itlbnb) +static void update_itlb_use(CPUSH4State * env, int itlbnb) { uint8_t or_mask = 0, and_mask = (uint8_t) - 1; @@ -227,7 +227,7 @@ static void update_itlb_use(CPUState * env, int itlbnb) env->mmucr |= (or_mask << 24); } -static int itlb_replacement(CPUState * env) +static int itlb_replacement(CPUSH4State * env) { if ((env->mmucr & 0xe0000000) == 0xe0000000) return 0; @@ -243,7 +243,7 @@ static int itlb_replacement(CPUState * env) /* Find the corresponding entry in the right TLB Return entry, MMU_DTLB_MISS or MMU_DTLB_MULTIPLE */ -static int find_tlb_entry(CPUState * env, target_ulong address, +static int find_tlb_entry(CPUSH4State * env, target_ulong address, tlb_t * entries, uint8_t nbtlb, int use_asid) { int match = MMU_DTLB_MISS; @@ -269,7 +269,7 @@ static int find_tlb_entry(CPUState * env, target_ulong address, return match; } -static void increment_urc(CPUState * env) +static void increment_urc(CPUSH4State * env) { uint8_t urb, urc; @@ -285,7 +285,7 @@ static void increment_urc(CPUState * env) /* Copy and utlb entry into itlb Return entry */ -static int copy_utlb_entry_itlb(CPUState *env, int utlb) +static int copy_utlb_entry_itlb(CPUSH4State *env, int utlb) { int itlb; @@ -303,7 +303,7 @@ static int copy_utlb_entry_itlb(CPUState *env, int utlb) /* Find itlb entry Return entry, MMU_ITLB_MISS, MMU_ITLB_MULTIPLE or MMU_DTLB_MULTIPLE */ -static int find_itlb_entry(CPUState * env, target_ulong address, +static int find_itlb_entry(CPUSH4State * env, target_ulong address, int use_asid) { int e; @@ -321,7 +321,7 @@ static int find_itlb_entry(CPUState * env, target_ulong address, /* Find utlb entry Return entry, MMU_DTLB_MISS, MMU_DTLB_MULTIPLE */ -static int find_utlb_entry(CPUState * env, target_ulong address, int use_asid) +static int find_utlb_entry(CPUSH4State * env, target_ulong address, int use_asid) { /* per utlb access */ increment_urc(env); @@ -337,7 +337,7 @@ static int find_utlb_entry(CPUState * env, target_ulong address, int use_asid) MMU_ITLB_MULTIPLE, MMU_ITLB_VIOLATION, MMU_IADDR_ERROR, MMU_DADDR_ERROR_READ, MMU_DADDR_ERROR_WRITE. */ -static int get_mmu_address(CPUState * env, target_ulong * physical, +static int get_mmu_address(CPUSH4State * env, target_ulong * physical, int *prot, target_ulong address, int rw, int access_type) { @@ -403,7 +403,7 @@ static int get_mmu_address(CPUState * env, target_ulong * physical, return n; } -static int get_physical_address(CPUState * env, target_ulong * physical, +static int get_physical_address(CPUSH4State * env, target_ulong * physical, int *prot, target_ulong address, int rw, int access_type) { @@ -442,7 +442,7 @@ static int get_physical_address(CPUState * env, target_ulong * physical, return get_mmu_address(env, physical, prot, address, rw, access_type); } -int cpu_sh4_handle_mmu_fault(CPUState * env, target_ulong address, int rw, +int cpu_sh4_handle_mmu_fault(CPUSH4State * env, target_ulong address, int rw, int mmu_idx) { target_ulong physical; @@ -503,7 +503,7 @@ int cpu_sh4_handle_mmu_fault(CPUState * env, target_ulong address, int rw, return 0; } -target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr) +target_phys_addr_t cpu_get_phys_page_debug(CPUSH4State * env, target_ulong addr) { target_ulong physical; int prot; |