summary refs log tree commit diff stats
path: root/target-sparc
diff options
context:
space:
mode:
Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/helper.c5
-rw-r--r--target-sparc/op_helper.c2
-rw-r--r--target-sparc/translate.c20
3 files changed, 3 insertions, 24 deletions
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 7a2ac21d06..b39b16272b 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -1366,8 +1366,6 @@ void sparc_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
                    "fpu_version mmu_version nwindows\n");
 }
 
-#define GET_FLAG(a,b) ((env->psr & a)?b:'-')
-
 void cpu_dump_state(CPUState *env, FILE *f,
                     int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
                     int flags)
@@ -1411,6 +1409,9 @@ void cpu_dump_state(CPUState *env, FILE *f,
                 env->cansave, env->canrestore, env->otherwin, env->wstate,
                 env->cleanwin, env->nwindows - 1 - env->cwp);
 #else
+
+#define GET_FLAG(a,b) ((env->psr & a)?b:'-')
+
     cpu_fprintf(f, "psr: 0x%08x -> %c%c%c%c %c%c%c wim: 0x%08x\n",
                 GET_PSR(env), GET_FLAG(PSR_ZERO, 'Z'), GET_FLAG(PSR_OVF, 'V'),
                 GET_FLAG(PSR_NEG, 'N'), GET_FLAG(PSR_CARRY, 'C'),
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index 2f88f4c1e3..947a55ad15 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -29,8 +29,6 @@ do { printf("MXCC: " fmt , ##args); } while (0)
 #ifdef DEBUG_ASI
 #define DPRINTF_ASI(fmt, args...) \
 do { printf("ASI: " fmt , ##args); } while (0)
-#else
-#define DPRINTF_ASI(fmt, args...) do {} while (0)
 #endif
 
 #ifdef TARGET_SPARC64
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 53997ae936..d059408ba1 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -92,11 +92,9 @@ typedef struct DisasContext {
 #define GET_FIELD_SPs(x,a,b) sign_extend (GET_FIELD_SP(x,a,b), ((b) - (a) + 1))
 
 #ifdef TARGET_SPARC64
-#define FFPREG(r) (r)
 #define DFPREG(r) (((r & 1) << 5) | (r & 0x1e))
 #define QFPREG(r) (((r & 1) << 5) | (r & 0x1c))
 #else
-#define FFPREG(r) (r)
 #define DFPREG(r) (r & 0x1e)
 #define QFPREG(r) (r & 0x1c)
 #endif
@@ -2846,24 +2844,6 @@ static void disas_sparc_insn(DisasContext * dc)
 #undef FMOVSCC
 #undef FMOVDCC
 #undef FMOVQCC
-#define FMOVCC(size_FDQ, icc)                                           \
-                    {                                                   \
-                        TCGv r_cond;                                    \
-                        int l1;                                         \
-                                                                        \
-                        l1 = gen_new_label();                           \
-                        r_cond = tcg_temp_new();             \
-                        cond = GET_FIELD_SP(insn, 14, 17);              \
-                        gen_cond(r_cond, icc, cond);                    \
-                        tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond,         \
-                                           0, l1);                      \
-                        glue(glue(gen_op_load_fpr_, size_FDQ), T0)      \
-                            (glue(size_FDQ, FPREG(rs2)));               \
-                        glue(glue(gen_op_store_, size_FDQ), T0_fpr)     \
-                            (glue(size_FDQ, FPREG(rd)));                \
-                        gen_set_label(l1);                              \
-                        tcg_temp_free(r_cond);                          \
-                    }
 #define FMOVSCC(icc)                                                    \
                     {                                                   \
                         TCGv r_cond;                                    \