diff options
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/kvm64.c | 1 | ||||
| -rw-r--r-- | target/arm/translate-a64.c | 7 | ||||
| -rw-r--r-- | target/cris/translate.c | 7 | ||||
| -rw-r--r-- | target/cris/translate_v10.c.inc | 2 | ||||
| -rw-r--r-- | target/ppc/misc_helper.c | 5 | ||||
| -rw-r--r-- | target/sh4/translate.c | 3 |
6 files changed, 5 insertions, 20 deletions
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 1169237905..ef1e960285 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -330,7 +330,6 @@ int kvm_arch_remove_hw_breakpoint(target_ulong addr, switch (type) { case GDB_BREAKPOINT_HW: return delete_hw_breakpoint(addr); - break; case GDB_WATCHPOINT_READ: case GDB_WATCHPOINT_WRITE: case GDB_WATCHPOINT_ACCESS: diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 4ba6918b60..7188808341 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -8631,8 +8631,8 @@ static void handle_scalar_simd_shli(DisasContext *s, bool insert, int size = 32 - clz32(immh) - 1; int immhb = immh << 3 | immb; int shift = immhb - (8 << size); - TCGv_i64 tcg_rn = new_tmp_a64(s); - TCGv_i64 tcg_rd = new_tmp_a64(s); + TCGv_i64 tcg_rn; + TCGv_i64 tcg_rd; if (!extract32(immh, 3, 1)) { unallocated_encoding(s); @@ -13014,9 +13014,6 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn) fpop = deposit32(opcode, 5, 1, a); fpop = deposit32(fpop, 6, 1, u); - rd = extract32(insn, 0, 5); - rn = extract32(insn, 5, 5); - switch (fpop) { case 0x1d: /* SCVTF */ case 0x5d: /* UCVTF */ diff --git a/target/cris/translate.c b/target/cris/translate.c index ee5e359c77..c312e6f8a6 100644 --- a/target/cris/translate.c +++ b/target/cris/translate.c @@ -1178,12 +1178,11 @@ static inline void t_gen_zext(TCGv d, TCGv s, int size) static char memsize_char(int size) { switch (size) { - case 1: return 'b'; break; - case 2: return 'w'; break; - case 4: return 'd'; break; + case 1: return 'b'; + case 2: return 'w'; + case 4: return 'd'; default: return 'x'; - break; } } #endif diff --git a/target/cris/translate_v10.c.inc b/target/cris/translate_v10.c.inc index ae34a0d1a3..7f38fd215e 100644 --- a/target/cris/translate_v10.c.inc +++ b/target/cris/translate_v10.c.inc @@ -1026,10 +1026,8 @@ static unsigned int dec10_ind(CPUCRISState *env, DisasContext *dc) switch (dc->opcode) { case CRISV10_IND_MOVE_M_R: return dec10_ind_move_m_r(env, dc, size); - break; case CRISV10_IND_MOVE_R_M: return dec10_ind_move_r_m(dc, size); - break; case CRISV10_IND_CMP: LOG_DIS("cmp size=%d op=%d %d\n", size, dc->src, dc->dst); cris_cc_mask(dc, CC_MASK_NZVC); diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c index 55b68d1246..e43a3b4686 100644 --- a/target/ppc/misc_helper.c +++ b/target/ppc/misc_helper.c @@ -234,25 +234,20 @@ target_ulong helper_clcs(CPUPPCState *env, uint32_t arg) case 0x0CUL: /* Instruction cache line size */ return env->icache_line_size; - break; case 0x0DUL: /* Data cache line size */ return env->dcache_line_size; - break; case 0x0EUL: /* Minimum cache line size */ return (env->icache_line_size < env->dcache_line_size) ? env->icache_line_size : env->dcache_line_size; - break; case 0x0FUL: /* Maximum cache line size */ return (env->icache_line_size > env->dcache_line_size) ? env->icache_line_size : env->dcache_line_size; - break; default: /* Undefined */ return 0; - break; } } diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 6192d83e8c..60c863d9e1 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -1542,7 +1542,6 @@ static void _decode_opc(DisasContext * ctx) tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx, MO_TEUL | MO_UNALN); return; - break; case 0x40e9: /* movua.l @Rm+,R0 */ CHECK_SH4A /* Load non-boundary-aligned data */ @@ -1550,7 +1549,6 @@ static void _decode_opc(DisasContext * ctx) MO_TEUL | MO_UNALN); tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4); return; - break; case 0x0029: /* movt Rn */ tcg_gen_mov_i32(REG(B11_8), cpu_sr_t); return; @@ -1638,7 +1636,6 @@ static void _decode_opc(DisasContext * ctx) CHECK_SH4A tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); return; - break; case 0x4024: /* rotcl Rn */ { TCGv tmp = tcg_temp_new(); |