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* target/arm: Implement fp16 for Neon VCVT fixed-pointPeter Maydell2020-09-014-1/+21
| | | | | | | | | Implement fp16 for the Neon VCVT insns which convert between float and fixed-point. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-39-peter.maydell@linaro.org
* target/arm: Convert Neon VCVT fixed-point to gvecPeter Maydell2020-09-013-17/+43
| | | | | | | | | Convert the Neon VCVT float<->fixed-point insns to a gvec style, in preparation for adding fp16 support. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-38-peter.maydell@linaro.org
* target/arm: Implement fp16 for Neon float-integer VCVTPeter Maydell2020-09-013-11/+42
| | | | | | | | | | | | | | | Convert the Neon float-integer VCVT insns to gvec, and use this to implement fp16 support for them. Note that unlike the VFP int<->fp16 VCVT insns we converted earlier and which convert to/from a 32-bit integer, these Neon insns convert to/from 16-bit integers. So we can use the existing vfp conversion helpers for the f32<->u32/i32 case but need to provide our own for f16<->u16/i16. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-37-peter.maydell@linaro.org
* target/arm: Implement fp16 for Neon pairwise fp opsPeter Maydell2020-09-013-26/+68
| | | | | | | | | | | Convert the Neon pairwise fp ops to use a single gvic-style helper to do the full operation instead of one helper call for each 32-bit part. This allows us to use the same framework to implement the fp16. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-36-peter.maydell@linaro.org
* target/arm: Implement fp16 for Neon VRSQRTSPeter Maydell2020-09-014-36/+34
| | | | | | | | | | | | Convert the Neon VRSQRTS insn to using a gvec helper, and use this to implement the fp16 case. As with VRECPS, we adjust the phrasing of the new implementation slightly so that the fp32 version parallels the fp16 one. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-35-peter.maydell@linaro.org
* target/arm: Implement fp16 for Neon VRECPSPeter Maydell2020-09-014-34/+35
| | | | | | | | | | | | | Convert the Neon VRECPS insn to using a gvec helper, and use this to implement the fp16 case. The phrasing of the new float32_recps_nf() is slightly different from the old recps_f32() so that it parallels the f16 version; for f16 we can't assume that flush-to-zero is always enabled. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-34-peter.maydell@linaro.org
* target/arm: Implement fp16 for Neon fp compare-vs-0Peter Maydell2020-09-013-28/+45
| | | | | | | | | | Convert the neon floating-point vector compare-vs-0 insns VCEQ0, VCGT0, VCLE0, VCGE0 and VCLT0 to use a gvec helper, and use this to implement the fp16 case. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-33-peter.maydell@linaro.org
* target/arm: Implement fp16 for Neon VFMA, VMFSPeter Maydell2020-09-013-91/+40
| | | | | | | | | | | | Convert the neon floating-point vector operations VFMA and VFMS to use a gvec helper, and use this to implement the fp16 case. This is the last use of do_3same_fp() so we can now delete that function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-32-peter.maydell@linaro.org
* target/arm: Implement fp16 for Neon VMLA, VMLS operationsPeter Maydell2020-09-013-31/+50
| | | | | | | | | Convert the Neon floating-point VMLA and VMLS insns over to using a gvec helper, and use this to implement the fp16 case. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-31-peter.maydell@linaro.org
* target/arm: Implement fp16 for Neon VMAXNM, VMINNMPeter Maydell2020-09-013-8/+27
| | | | | | | | | Convert the Neon floating point VMAXNM and VMINNM insns to using a gvec helper and use this to implement the fp16 case. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-30-peter.maydell@linaro.org
* target/arm: Implement fp16 for Neon VMAX, VMINPeter Maydell2020-09-013-3/+14
| | | | | | | | | Convert the Neon float-point VMAX and VMIN insns over to using a gvec helper, and use this to implement the fp16 case. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-29-peter.maydell@linaro.org
* target/arm: Implement fp16 for VACGE, VACGTPeter Maydell2020-09-013-2/+34
| | | | | | | | | | Convert the neon floating-point vector absolute comparison ops VACGE and VACGT over to using a gvec hepler and use this to implement the fp16 case. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-28-peter.maydell@linaro.org
* target/arm: Implement fp16 for VCEQ, VCGE, VCGT comparisonsPeter Maydell2020-09-013-3/+56
| | | | | | | | | | | | | | | Convert the Neon floating-point vector comparison ops VCEQ, VCGE and VCGT over to using a gvec helper and use this to implement the fp16 case. (We put the float16_ceq() etc functions above the DO_2OP() macro definition because later when we convert the compare-against-zero instructions we'll want their definitions to be visible at that point in the source file.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-27-peter.maydell@linaro.org
* target/arm: Implement fp16 for Neon VABS, VNEG of floatsPeter Maydell2020-09-011-6/+28
| | | | | | | | | Rewrite Neon VABS/VNEG of floats to use gvec logical AND and XOR, so that we can implement the fp16 version of the insns. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-26-peter.maydell@linaro.org
* target/arm: Implement fp16 for Neon VRECPE, VRSQRTE using gvecPeter Maydell2020-09-011-2/+29
| | | | | | | | | | We already have gvec helpers for floating point VRECPE and VRQSRTE, so convert the Neon decoder to use them and add the fp16 support. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-25-peter.maydell@linaro.org
* target/arm: Implement FP16 for Neon VADD, VSUB, VABD, VMULPeter Maydell2020-09-013-17/+26
| | | | | | | | | | | | Implement FP16 support for the Neon insns which use the DO_3S_FP_GVEC macro: VADD, VSUB, VABD, VMUL. For VABD this requires us to implement a new gvec_fabd_h helper using the machinery we have already for the other helpers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-24-peter.maydell@linaro.org
* target/arm: Implement VFP fp16 VMOV between gp and halfprec registersPeter Maydell2020-09-012-0/+35
| | | | | | | | | | | | | Implement the VFP fp16 variant of VMOV that transfers a 16-bit value between a general purpose register and a VFP register. Note that Rt == 15 is UNPREDICTABLE; since this insn is v8 and later only we have no need to replicate the old "updates CPSR.NZCV" behaviour that the singleprec version of this insn does. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-22-peter.maydell@linaro.org
* target/arm: Implement new VFP fp16 insn VMOVXPeter Maydell2020-09-012-0/+28
| | | | | | | | | | | The fp16 extension includes a new instruction VMOVX, which copies the upper 16 bits of a 32-bit source VFP register into the lower 16 bits of the destination and zeroes the high half of the destination. Implement it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-21-peter.maydell@linaro.org
* target/arm: Implement new VFP fp16 insn VINSPeter Maydell2020-09-012-0/+31
| | | | | | | | | | The fp16 extension includes a new instruction VINS, which copies the lower 16 bits of a 32-bit source VFP register into the upper 16 bits of the destination. Implement it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-20-peter.maydell@linaro.org
* target/arm: Implement VFP fp16 VRINT*Peter Maydell2020-09-015-8/+122
| | | | | | | | Implement the fp16 version of the VFP VRINT* insns. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-19-peter.maydell@linaro.org
* target/arm: Implement VFP fp16 VSELPeter Maydell2020-09-012-6/+16
| | | | | | | | Implement the fp16 versions of the VFP VSEL instruction. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-18-peter.maydell@linaro.org
* target/arm: Implement VFP vp16 VCVT-with-specified-rounding-modePeter Maydell2020-09-012-10/+28
| | | | | | | | | | Implement the fp16 versions of the VFP VCVT instruction forms which convert between floating point and integer with a specified rounding mode. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-17-peter.maydell@linaro.org
* target/arm: Implement VFP fp16 VCVT between float and fixed-pointPeter Maydell2020-09-012-0/+61
| | | | | | | | | Implement the fp16 versions of the VFP VCVT instruction forms which convert between floating point and fixed-point. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-16-peter.maydell@linaro.org
* target/arm: Use macros instead of open-coding fp16 conversion helpersPeter Maydell2020-09-012-80/+12
| | | | | | | | | | | | | Now the VFP_CONV_FIX macros can handle fp16's distinction between the width of the operation and the width of the type used to pass operands, use the macros rather than the open-coded functions. This creates an extra six helper functions, all of which we are going to need for the AArch32 VFP fp16 instructions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-15-peter.maydell@linaro.org
* target/arm: Make VFP_CONV_FIX macros take separate float type and float sizePeter Maydell2020-09-011-23/+23
| | | | | | | | | | | | | | | Currently the VFP_CONV_FIX macros take a single fsz argument for the size of the float type, which is used both to select the name of the functions to call (eg float32_is_any_nan()) and also for the type to use for the float inputs and outputs (eg float32). Separate these into fsz and ftype arguments, so that we can use them for fp16, which uses 'float16' in the function names but is still passing inputs and outputs in a 32-bit sized type. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-14-peter.maydell@linaro.org
* target/arm: Implement VFP fp16 VCVT between float and integerPeter Maydell2020-09-012-0/+69
| | | | | | | | | Implement the fp16 versions of the VFP VCVT instruction forms which convert between floating point and integer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-13-peter.maydell@linaro.org
* target/arm: Implement VFP fp16 VLDR and VSTRPeter Maydell2020-09-012-2/+36
| | | | | | | | Implement the fp16 versions of the VFP VLDR/VSTR (immediate). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-12-peter.maydell@linaro.org
* target/arm: Implement VFP fp16 VCMPPeter Maydell2020-09-014-7/+51
| | | | | | | | Implement fp16 version of VCMP. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-11-peter.maydell@linaro.org
* target/arm: Implement VFP fp16 for VMOV immediatePeter Maydell2020-09-012-0/+24
| | | | | | | | Implement VFP fp16 support for the VMOV immediate insn. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-10-peter.maydell@linaro.org
* target/arm: Implement VFP fp16 for VABS, VNEG, VSQRTPeter Maydell2020-09-014-0/+55
| | | | | | | | | | | | | | | | Implement VFP fp16 for VABS, VNEG and VSQRT. This is all the fp16 insns that use the DO_VFP_2OP macro, because there is no fp16 version of VMOV_reg. Notes: * the gen_helper_vfp_negh already exists as we needed to create it for the fp16 multiply-add insns * as usual we need to use the f16 version of the fp_status; this is only relevant for VSQRT Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-9-peter.maydell@linaro.org
* target/arm: Macroify uses of do_vfp_2op_sp() and do_vfp_2op_dp()Peter Maydell2020-09-011-35/+14
| | | | | | | | | Macroify the uses of do_vfp_2op_sp() and do_vfp_2op_dp(); this will make it easier to add the halfprec support. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-8-peter.maydell@linaro.org
* target/arm: Implement VFP fp16 for fused-multiply-addPeter Maydell2020-09-014-0/+77
| | | | | | | | | Implement VFP fp16 support for fused multiply-add insns VFNMA, VFNMS, VFMA, VFMS. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-7-peter.maydell@linaro.org
* target/arm: Macroify trans functions for VFMA, VFMS, VFNMA, VFNMSPeter Maydell2020-09-011-37/+13
| | | | | | | | | | | Macroify creation of the trans functions for single and double precision VFMA, VFMS, VFNMA, VFNMS. The repetition was OK for two sizes, but we're about to add halfprec and it will get a bit more than seems reasonable. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-6-peter.maydell@linaro.org
* target/arm: Implement VFP fp16 VMLA, VMLS, VNMLS, VNMLA, VNMULPeter Maydell2020-09-014-0/+95
| | | | | | | | | | Implement fp16 versions of the VFP VMLA, VMLS, VNMLS, VNMLA, VNMUL instructions. (These are all the remaining ones which we implement via do_vfp_3op_[hsd]p().) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-5-peter.maydell@linaro.org
* target/arm: Implement VFP fp16 for VFP_BINOP operationsPeter Maydell2020-09-015-0/+106
| | | | | | | | | | | | | | | | | | | | Implmeent VFP fp16 support for simple binary-operator VFP insns VADD, VSUB, VMUL, VDIV, VMINNM and VMAXNM: * make the VFP_BINOP() macro generate float16 helpers as well as float32 and float64 * implement a do_vfp_3op_hp() function similar to the existing do_vfp_3op_sp() * add decode for the half-precision insn patterns Note that the VFP_BINOP macro use creates a couple of unused helper functions vfp_maxh and vfp_minh, but they're small so it's not worth splitting the BINOP operations into "needs halfprec" and "no halfprec" groups. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-4-peter.maydell@linaro.org
* target/arm: Use correct ID register check for aa32_fp16_arithPeter Maydell2020-09-011-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | The aa32_fp16_arith feature check function currently looks at the AArch64 ID_AA64PFR0 register. This is (as the comment notes) not correct. The bogus check was put in mostly to allow testing of the fp16 variants of the VCMLA instructions and it was something of a mistake that we allowed them to exist in master. Switch the feature check function to testing VMFR1.FPHP, which is what it ought to be. This will remove emulation of the VCMLA and VCADD insns from AArch32 code running on an AArch64 '-cpu max' using system emulation. (They were never enabled for aarch32 linux-user and system-emulation.) Since we weren't advertising their existence via the AArch32 ID register, well-behaved guests wouldn't have been using them anyway. Once we have implemented all the AArch32 support for the FP16 extension we will advertise it in the MVFR1 ID register field, which will reenable these insns along with all the others. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-3-peter.maydell@linaro.org
* target/arm: Remove local definitions of float constantsPeter Maydell2020-09-013-19/+0
| | | | | | | | | | In several places the target/arm code defines local float constants for 2, 3 and 1.5, which are also provided by include/fpu/softfloat.h. Remove the unnecessary local duplicate versions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200828183354.27913-2-peter.maydell@linaro.org
* Merge remote-tracking branch 'remotes/kraxel/tags/usb-20200831-pull-request' ↵Peter Maydell2020-08-3120-40/+1797
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging usb: usb_packet_map fixes for ehci and xhci. usb: setup_len fix (CVE-2020-14364). usb: u2f key support (GSoC). * v2: 32bit build fixed. * v3: libu2f-emu dependency fixed. # gpg: Signature made Mon 31 Aug 2020 09:32:49 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/usb-20200831-pull-request: usb: fix setup_len init (CVE-2020-14364) usb-host: workaround libusb bug hw/usb: Add U2F device autoscan to passthru mode hw/usb: Add U2F device check to passthru mode scripts: Add u2f-setup-gen script docs/qdev-device-use.txt: Add USB U2F key to the QDEV devices examples docs/system: Add U2F key to the USB devices examples meson: Add U2F key to meson hw/usb: Add U2F key emulated mode hw/usb: Add U2F key passthru mode hw/usb: Add U2F key base class implementation hw/usb: Add U2F key base class docs: Add USB U2F key device documentation hw/usb: Regroup USB HID protocol values ehci: drop pointless warn_report for guest bugs. hw: ehci: check return value of 'usb_packet_map' hw: ehci: destroy sglist in error path hw: xhci: check return value of 'usb_packet_map' Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * usb: fix setup_len init (CVE-2020-14364)Gerd Hoffmann2020-08-311-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Store calculated setup_len in a local variable, verify it, and only write it to the struct (USBDevice->setup_len) in case it passed the sanity checks. This prevents other code (do_token_{in,out} functions specifically) from working with invalid USBDevice->setup_len values and overrunning the USBDevice->setup_buf[] buffer. Fixes: CVE-2020-14364 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Gonglei <arei.gonglei@huawei.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> Message-id: 20200825053636.29648-1-kraxel@redhat.com
| * usb-host: workaround libusb bugGerd Hoffmann2020-08-311-1/+36
| | | | | | | | | | | | | | | | | | libusb_get_device_speed() does not work for libusb_wrap_sys_device() devices in v1.0.23. Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1871090 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20200824110057.32089-1-kraxel@redhat.com
| * hw/usb: Add U2F device autoscan to passthru modeCésar Belley2020-08-313-14/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds an autoscan to let u2f-passthru choose the first U2F device it finds. The autoscan is performed using libudev with an enumeration of all the hidraw devices present on the host. The first device which happens to be a U2F device is taken to do the passtru. Signed-off-by: César Belley <cesar.belley@lse.epita.fr> Message-id: 20200826114209.28821-13-cesar.belley@lse.epita.fr Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * hw/usb: Add U2F device check to passthru modeCésar Belley2020-08-311-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | This patchs adds a check to verify that the device passed through the hidraw property is a U2F device. The check is done by ensuring that the first values of the report descriptor (USAGE PAGE and USAGE) correspond to those of a U2F device. Signed-off-by: César Belley <cesar.belley@lse.epita.fr> Message-id: 20200826114209.28821-12-cesar.belley@lse.epita.fr Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * scripts: Add u2f-setup-gen scriptCésar Belley2020-08-311-0/+170
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds the script used to generate setup directories, needed for the device u2f-emulated configuration in directory mode: python u2f-setup-gen.py $DIR qemu -usb -device u2f-emulated,dir=$DIR Signed-off-by: César Belley <cesar.belley@lse.epita.fr> Message-id: 20200826114209.28821-11-cesar.belley@lse.epita.fr Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * docs/qdev-device-use.txt: Add USB U2F key to the QDEV devices examplesCésar Belley2020-08-311-0/+1
| | | | | | | | | | | | Signed-off-by: César Belley <cesar.belley@lse.epita.fr> Message-id: 20200826114209.28821-10-cesar.belley@lse.epita.fr Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * docs/system: Add U2F key to the USB devices examplesCésar Belley2020-08-311-0/+3
| | | | | | | | | | | | Signed-off-by: César Belley <cesar.belley@lse.epita.fr> Message-id: 20200826114209.28821-9-cesar.belley@lse.epita.fr Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * meson: Add U2F key to mesonCésar Belley2020-08-315-1/+27
| | | | | | | | | | | | | | | | | | Signed-off-by: César Belley <cesar.belley@lse.epita.fr> Message-id: 20200826114209.28821-8-cesar.belley@lse.epita.fr [ fixes suggested by paolo ] Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * hw/usb: Add U2F key emulated modeCésar Belley2020-08-311-0/+405
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the U2F key emulated mode. The emulated mode consists of completely emulating the behavior of a U2F device through software part. Libu2f-emu is used for that. The emulated mode is associated with a device inheriting from u2f-key base. To work, an emulated U2F device must have differents elements which can be given in different ways. This is detailed in docs/u2f.txt. The Ephemeral one is the simplest way to configure, it lets the device generate all the elements it needs for a single use of the lifetime of the device: qemu -usb -device u2f-emulated For more information about libu2f-emu see this page: https://github.com/MattGorko/libu2f-emu. Signed-off-by: César Belley <cesar.belley@lse.epita.fr> Message-id: 20200826114209.28821-7-cesar.belley@lse.epita.fr Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * hw/usb: Add U2F key passthru modeCésar Belley2020-08-311-0/+423
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the U2F key pass-through mode. The pass-through mode consists of passing all requests made from the guest to the physical security key connected to the host machine and vice versa. In addition, the dedicated pass-through allows to have a U2F security key shared on several guests which is not possible with a simple host device assignment pass-through. The pass-through mode is associated with a device inheriting from u2f-key base. To work, it needs the path to a U2F hidraw, obtained from the Qemu command line, and passed by the user: qemu -usb -device u2f-passthru,hidraw=/dev/hidrawX Autoscan and U2F compatibility checking features are given at the end of the patch series. Signed-off-by: César Belley <cesar.belley@lse.epita.fr> Message-id: 20200826114209.28821-6-cesar.belley@lse.epita.fr Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * hw/usb: Add U2F key base class implementationCésar Belley2020-08-311-0/+352
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the U2F key base class implementation. The U2F key base mainly takes care of the HID interfacing with guest. On the one hand, it retrieves the guest U2FHID packets and transmits them to the variant associated according to the mode: pass-through or emulated. On the other hand, it provides the public API used by its variants to send U2FHID packets to the guest. Signed-off-by: César Belley <cesar.belley@lse.epita.fr> Message-id: 20200826114209.28821-5-cesar.belley@lse.epita.fr Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * hw/usb: Add U2F key base classCésar Belley2020-08-311-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the specification for the U2F key base class. Used to group the common characteristics, this device class will be inherited by its two variants, corresponding to the two modes: passthrough and emulated This prepares the U2F devices hierarchy which is as follow: USB device -> u2f-key -> {u2f-passthru, u2f-emulated}. Signed-off-by: César Belley <cesar.belley@lse.epita.fr> Message-id: 20200826114209.28821-4-cesar.belley@lse.epita.fr Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>