summary refs log tree commit diff stats
Commit message (Collapse)AuthorAgeFilesLines
* aspeed/wdt: Fix coding styleJamin Lin2025-01-271-1/+2
| | | | | | | | | Fix coding style issues from checkpatch.pl. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250124030249.1706996-2-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* aspeed: Create sd devices only when defaults are enabledCédric Le Goater2025-01-271-2/+2
| | | | | | | | | | | | | | | | | | | When the -nodefaults option is set, sd devices should not be automatically created by the machine. Instead they should be defined on the command line. Note that it is not currently possible to define which bus an "sd-card" device is attached to: -blockdev node-name=drive0,driver=file,filename=/path/to/file.img \ -device sd-card,drive=drive0,id=sd0 and the first bus named "sd-bus" will be used. Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com> Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/qemu-devel/20250122070909.1138598-10-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* test/functional: Update buildroot images to 2024.11Cédric Le Goater2025-01-273-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | The main changes compared to upstream 2024.11 buildroot are - bumped Linux to version 6.11.11 with a custom config - changed U-Boot to OpenBMC branch for more support - included extra target packages See branch [1] for more details. There is a slight output change when powering off the machine, the console now contains : reboot: Power off not available: System halted Adjust accordingly the expect string in do_test_arm_aspeed_buildroot_poweroff(). [1] https://github.com/legoater/buildroot/commits/aspeed-2024.11 Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com> Link: https://lore.kernel.org/qemu-devel/20250122070909.1138598-9-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* test/functional: Update the Aspeed aarch64 testCédric Le Goater2025-01-271-5/+5
| | | | | | | | | Bumped SDK version to v09.03. v09.04 is available but not yet supported in QEMU. Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com> Link: https://lore.kernel.org/qemu-devel/20250122070909.1138598-8-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* aspeed/soc: Support Timer for AST2700Jamin Lin2025-01-271-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Timer model for AST2700 Timer support. The Timer controller include 8 sets of 32-bit decrement counters. The base address of TIMER0 to TIMER7 as following. Base Address of Timer 0 = 0x12C1_0000 Base Address of Timer 1 = 0x12C1_0040 Base Address of Timer 2 = 0x12C1_0080 Base Address of Timer 3 = 0x12C1_00C0 Base Address of Timer 4 = 0x12C1_0100 Base Address of Timer 5 = 0x12C1_0140 Base Address of Timer 6 = 0x12C1_0180 Base Address of Timer 7 = 0x12C1_01C0 The interrupt of TIMER0 to TIMER7 as following. GICINT16 = TIMER 0 interrupt GICINT17 = TIMER 1 interrupt GICINT18 = TIMER 2 interrupt GICINT19 = TIMER 3 interrupt GICINT20 = TIMER 4 interrupt GICINT21 = TIMER 5 interrupt GICINT22 = TIMER 6 interrupt GICINT23 = TIMER 7 interrupt Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20250113064455.1660564-4-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* hw/timer/aspeed: Add AST2700 SupportJamin Lin2025-01-272-0/+209
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The timer controller include 8 sets of 32-bit decrement counters, based on either PCLK or 1MHZ clock and the design of timer controller between AST2600 and AST2700 are almost the same. TIMER0 – TIMER7 has their own individual control and interrupt status register. In other words, users are able to set timer control in register TMC10 with different TIMER base address and clear timer control and interrupt status in register TMC14 with different TIMER base address. Introduce new "aspeed_2700_timer_read" and "aspeed_2700_timer_write" callback functions and a new ast2700 class to support AST2700. The base address of TIMER0 to TIMER7 as following. Base Address of Timer 0 = 0x12C1_0000 Base Address of Timer 1 = 0x12C1_0040 Base Address of Timer 2 = 0x12C1_0080 Base Address of Timer 3 = 0x12C1_00C0 Base Address of Timer 4 = 0x12C1_0100 Base Address of Timer 5 = 0x12C1_0140 Base Address of Timer 6 = 0x12C1_0180 Base Address of Timer 7 = 0x12C1_01C0 The register address space of each TIMER is "0x40" , and uses the following formula to get the index and register of each TIMER. timer_index = offset >> 6; timer_offset = offset & 0x3f; The TMC010 is a counter control set and interrupt status register. Write "1" to TMC10[3:0] will set the specific bits to "1". Introduce a new "aspeed_2700_timer_set_ctrl" function to handle this register behavior. The TMC014 is a counter control clear and interrupt status register, to clear the specific bits to "0", it should write "1" to TMC14[3:0] on the same bit position. Introduce a new "aspeed_2700_timer_clear_ctrl" function to handle this register behavior. TMC014 does not support read operation. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Acked-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20250113064455.1660564-3-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* hw/timer/aspeed: Refactor Timer Callbacks for SoC-Specific ImplementationsJamin Lin2025-01-272-16/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | The register set have a significant change in AST2700. The TMC00-TMC3C are used for TIMER0 and TMC40-TMC7C are used for TIMER1. In additional, TMC20-TMC3C and TMC60-TMC7C are reserved registers for TIMER0 and TIMER1, respectively. Besides, each TIMER has their own control and interrupt status register. In other words, users are able to set control and interrupt status for TIMER0 in one register. Both aspeed_timer_read and aspeed_timer_write callback functions are not compatible AST2700. Introduce common read and write functions for ASPEED timers. Modify the aspeed_timer_read and aspeed_timer_write functions to delegate to SoC-specific callbacks first. Update the AST2400, AST2500, AST2600 and AST1030 specific read and write functions to call the common implementations for common register accesses. This refactoring improves the organization of call delegation and prepares the codebase for future SoC-specific specializations, such as the AST2700. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20250113064455.1660564-2-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* hw/arm/aspeed: Invert sdhci write protected pin for AST2600 EVBJamin Lin2025-01-272-0/+8
| | | | | | | | | | | | | | | | | The Write Protect pin of SDHCI model is default active low to match the SDHCI spec. So, write enable the bit 19 should be 1 and write protected the bit 19 should be 0 at the Present State Register (0x24). According to the design of AST2600 EVB, the Write Protected pin is active high by default. To support it, introduces a new "sdhci_wp_inverted" property in ASPEED MACHINE State and set it true for AST2600 EVB and set "wp_inverted" property true of sdhci-generic model. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/r/20241114094839.4128404-4-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* hw/sd/sdhci: Introduce a new Write Protected pin inverted propertyJamin Lin2025-01-272-0/+11
| | | | | | | | | | | | | | | | The Write Protect pin of SDHCI model is default active low to match the SDHCI spec. So, write enable the bit 19 should be 1 and write protected the bit 19 should be 0 at the Present State Register (0x24). However, some boards are design Write Protected pin active high. In other words, write enable the bit 19 should be 0 and write protected the bit 19 should be 1 at the Present State Register (0x24). To support it, introduces a new "wp-inverted" property and set it false by default. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Acked-by: Cédric Le Goater <clg@redhat.com> Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/r/20241114094839.4128404-3-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* hw/arm/aspeed: fix connect_serial_hds_to_uartsKenneth Jia2025-01-271-2/+2
| | | | | | | | | | | In the loop, we need ignore the index increase when uart == uart_chosen We should increase the index only after we allocate a serial. Signed-off-by: Kenneth Jia <kenneth_jia@asus.com> Fixes: d2b3eaefb4d7 ("aspeed: Refactor UART init for multi-SoC machines") Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/5f9b0c53f1644922ba85522046e92f4c@asus.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* Merge tag 'linux-user-fix-gupnp-pull-request' of ↵Stefan Hajnoczi2025-01-243-17/+192
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/hdeller/qemu-hppa into staging linux-user: Add support for various missing netlink sockopt entries Add missing sockopt calls and thus fix building the debian gupnp package in a chroot. This fixes debian bug report: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1044651 Signed-off-by: Helge Deller <deller@gmx.de> # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZ5OPdwAKCRD3ErUQojoP # X9EWAP0ZvoDehmNzgWMlUpWT+d4O06kMsrDsi+tRddUUSJgp4wEAuuycr4go4b9b # 6xLDLr81C7MFEGsztGcRVhPwVdDJxAU= # =Lw8U # -----END PGP SIGNATURE----- # gpg: Signature made Fri 24 Jan 2025 08:02:47 EST # gpg: using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F # gpg: Good signature from "Helge Deller <deller@gmx.de>" [unknown] # gpg: aka "Helge Deller <deller@kernel.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 4544 8228 2CD9 10DB EF3D 25F8 3E5F 3D04 A7A2 4603 # Subkey fingerprint: BCE9 123E 1AD2 9F07 C049 BBDE F712 B510 A23A 0F5F * tag 'linux-user-fix-gupnp-pull-request' of https://github.com/hdeller/qemu-hppa: linux-user: netlink: Add missing QEMU_IFLA entries linux-user: netlink: add netlink neighbour emulation linux-user: netlink: Add emulation of IP_MULTICAST_IF linux-user: netlink: Add IP_PKTINFO cmsg parsing linux-user: Use unique error messages for cmsg parsing linux-user: netlink: Add missing IFA_PROTO to host_to_target_data_addr_rtattr() Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * linux-user: netlink: Add missing QEMU_IFLA entriesHelge Deller2025-01-241-1/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the following qemu warnings when building debian gupnp package: Unknown host QEMU_IFLA type: 61 Unknown host QEMU_IFLA type: 58 Unknown host QEMU_IFLA type: 59 Unknown host QEMU_IFLA type: 60 Unknown host QEMU_IFLA type: 32820 QEMU_IFLA type 32820 is actually NLA_NESTED | QEMU_IFLA_PROP_LIST (a nested entry), which is why rta_type needs to be masked with NLA_TYPE_MASK. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user: netlink: add netlink neighbour emulationHelge Deller2025-01-241-0/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes various warnings in the testsuite while building gupnp: gssdp-net-DEBUG: Failed to send netlink message: Operation not supported gupnp-context-DEBUG: Mismatch between host header and host IP (example.com, expected: 127.0.0.1) gupnp-context-DEBUG: Mismatch between host header and host port (80, expected 4711) gupnp-context-DEBUG: Mismatch between host header and host IP (192.168.1.2, expected: 127.0.0.1) gupnp-context-DEBUG: Mismatch between host header and host IP (fe80::01, expected: 127.0.0.1) gupnp-context-DEBUG: Mismatch between host header and host port (80, expected 4711) gupnp-context-DEBUG: Failed to parse HOST header from request: Invalid IPv6 address ?[fe80::01%1]? in URI gupnp-context-DEBUG: Failed to parse HOST header from request: Invalid IPv6 address ?[fe80::01%eth0]? in URI gupnp-context-DEBUG: Failed to parse HOST header from request: Could not parse port ?:1? in URI gupnp-context-DEBUG: Mismatch between host header and host IP (example.com, expected: ::1) gupnp-context-DEBUG: Mismatch between host header and host port (80, expected 4711) gupnp-context-DEBUG: Mismatch between host header and host IP (example.com, expected: ::1) gupnp-context-DEBUG: Mismatch between host header and host port (80, expected 4711) gupnp-context-DEBUG: Mismatch between host header and host IP (example.com, expected: ::1) Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user: netlink: Add emulation of IP_MULTICAST_IFHelge Deller2025-01-241-6/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add IP_MULTICAST_IF and share the code with IP_ADD_MEMBERSHIP / IP_DROP_MEMBERSHIP. Sharing the code makes sense, because the manpage of ip(7) says: IP_MULTICAST_IF (since Linux 1.2) Set the local device for a multicast socket. The argument for setsockopt(2) is an ip_mreqn or (since Linux 3.5) ip_mreq structure similar to IP_ADD_MEMBERSHIP, or an in_addr structure. (The kernel determines which structure is being passed based on the size passed in optlen.) For getsockopt(2), the argument is an in_addr structure. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user: netlink: Add IP_PKTINFO cmsg parsingHelge Deller2025-01-242-0/+16
| | | | | | | | | | | | | | | | Fixes those warnings: Unsupported host ancillary data: 0/8 Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user: Use unique error messages for cmsg parsingHelge Deller2025-01-241-2/+2
| | | | | | | | | | | | | | | | | | Avoid using the same error message for two different code paths as it complicates determining the one which actually triggered. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu>
| * linux-user: netlink: Add missing IFA_PROTO to host_to_target_data_addr_rtattr()Helge Deller2025-01-241-8/+25
| | | | | | | | | | | | | | | | | | | | | | | | Fix this warning: Unknown host IFA type: 11 While adding IFA_PROTO, convert all IFA_XXX values over to QEMU_IFA_XXX values to avoid a build failure on Ubuntu 22.04 (kernel v5.18 which does not know IFA_PROTO yet). Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Laurent Vivier <laurent@vivier.eu>
* | Merge tag 'pull-loongarch-20250124' of https://gitlab.com/bibo-mao/qemu into ↵Stefan Hajnoczi2025-01-247-139/+294
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging loongarch queue # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQQNhkKjomWfgLCz0aQfewwSUazn0QUCZ5M4AwAKCRAfewwSUazn # 0aJAAP45/9qfbGSYiMCrBXpRFlyvtRN+GEXHEsERfk9Q1V+tQgEA/mMiUEcyc/xc # Z1Z27cDoqUFRhPmxbd6/KyTGHzo2+As= # =Zanw # -----END PGP SIGNATURE----- # gpg: Signature made Fri 24 Jan 2025 01:49:39 EST # gpg: using EDDSA key 0D8642A3A2659F80B0B3D1A41F7B0C1251ACE7D1 # gpg: Good signature from "bibo mao <maobibo@loongson.cn>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 7044 3A00 19C0 E97A 31C7 13C4 8E86 8FB7 A176 9D4C # Subkey fingerprint: 0D86 42A3 A265 9F80 B0B3 D1A4 1F7B 0C12 51AC E7D1 * tag 'pull-loongarch-20250124' of https://gitlab.com/bibo-mao/qemu: target/loongarch: Dump all generic CSR registers target/loongarch: Set unused flag with CSR registers target/loongarch: Add common source file for CSR register target/loongarch: Add common header file for CSR registers target/loongarch: Add generic csr function type target/loongarch: Remove static CSR function setting target/loongarch: Add dynamic function access with CSR register Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * | target/loongarch: Dump all generic CSR registersBibo Mao2025-01-243-16/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CSR registers is import system control registers, it had better dump all CSR registers when VM is running in system mode. Here is dump output example of CSR registers: CSR000: CRMD b4 PRMD 4 EUEN 0 MISC 0 CSR004: ECFG 71c1c ESTAT 0 ERA 9000000002c31300 BADV 12022c0e0 CSR008: BADI 2b0000 CSR012: EENTRY 90000000046b0000 CSR016: TLBIDX ffffffff8e000228 TLBEHI 120228000 TLBELO0 400000016f19001f TLBELO1 400000016f1a401f CSR024: ASID a0004 PGDL 90000001016f0000 PGDH 9000000004680000 PGD 0 CSR028: PWCL 5e56e PWCH 2e4 STLBPS e RVACFG 0 CSR032: CPUID 0 PRCFG1 72f8 PRCFG2 3ffff000 PRCFG3 8073f2 CSR048: SAVE0 0 SAVE1 af9c SAVE2 12010d6a8 SAVE3 8300000 CSR052: SAVE4 0 SAVE5 0 SAVE6 0 SAVE7 0 CSR064: TID 0 TCFG 8f0ca15 TVAL 4cefd8b CNTC fffffffffe688aaa CSR068: TICLR 0 CSR096: LLBCTL 1 CSR136: TLBRENTRY 46ba000 TLBRBADV ffff8000130d81e2 TLBRERA 9000000003585cb8 TLBRSAVE ffff8000130d81e0 CSR140: TLBRELO0 1fe00043 TLBRELO1 40 TLBREHI ffff8000130d800e TLBRPRMD 0 CSR384: DMW0 8000000000000001 DMW1 9000000000000011 DMW2 0 DMW3 0 Signed-off-by: Bibo Mao <maobibo@loongson.cn>
| * | target/loongarch: Set unused flag with CSR registersBibo Mao2025-01-243-1/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On LA464, some CSR registers are not used such as CSR_SAVE8 - CSR_SAVE15, also CSR registers relative with MCE is not used now. Flag CSRFL_UNUSED is added for these registers, so that it will not dumped. In order to keep compatiblity, these CSR registers are not removed since it is used in vmstate already. Signed-off-by: Bibo Mao <maobibo@loongson.cn>
| * | target/loongarch: Add common source file for CSR registerBibo Mao2025-01-244-107/+116
| | | | | | | | | | | | | | | | | | | | | | | | Common source file csr.c is added here, it can be used by both TCG mode and kvm mode. The common code is removed from file tcg/insn_trans/trans_privileged.c.inc to csrc.c Signed-off-by: Bibo Mao <maobibo@loongson.cn>
| * | target/loongarch: Add common header file for CSR registersBibo Mao2025-01-242-15/+26
| | | | | | | | | | | | | | | | | | | | | Common header file csr.h is added here, it can be used by both TCG mode and kvm mode. Signed-off-by: Bibo Mao <maobibo@loongson.cn>
| * | target/loongarch: Add generic csr function typeBibo Mao2025-01-241-10/+17
| | | | | | | | | | | | | | | | | | | | | | | | Parameter type TCGv and TCGv_ptr for function GenCSRRead and GenCSRWrite is not used in non-TCG mode. Generic csr function type is added here with parameter void type, so that it passes to compile with non-TCG mode. Signed-off-by: Bibo Mao <maobibo@loongson.cn>
| * | target/loongarch: Remove static CSR function settingBibo Mao2025-01-241-8/+8
| | | | | | | | | | | | | | | | | | | | | Since CSR function setting is done dynamically in TCG mode, remove static CSR function setting here. Signed-off-by: Bibo Mao <maobibo@loongson.cn>
| * | target/loongarch: Add dynamic function access with CSR registerBibo Mao2025-01-243-3/+51
|/ / | | | | | | | | | | | | With CSR register, dynamic function access is used for CSR register access in TCG mode, so that csr info can be used by other modules. Signed-off-by: Bibo Mao <maobibo@loongson.cn>
* | Merge tag 'pull-request-2025-01-21v2' of https://gitlab.com/thuth/qemu into ↵Stefan Hajnoczi2025-01-2211-77/+128
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging * Fix bugs related to the new "boot order" feature in the s390-ccw bios * Fix crash that occurs when introspecting older s390-virtio-ccw machines * Fix error in pbkdf code on fast machines (e.g. s390x with crypto adapter) * Convert kvm_xen_guest avocado test to the functional framework # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmeQpIYRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbXYKA/9HddJS8Ljxwwme2XL1uSXreTGGKjE4QO1 # NKaEyJFfu5KAXCgufr/L4mLLxc8Bdf+qEux1v9u49OadMlYf/WzG5BYW42bLBrnK # zhZZGnuLZHU6kzhK3OMQ0kJLYVGneKU8WahHiPaOfIjuEr+6SoMfb5N8ttSOG7ry # Np3HvA5K5m4pOL0kSMJiiCqKSzRPbzWaxxwwB5j+iD4NB5NfLo8kEH1iXqRqkEBQ # zkM0ab0pYYYZil6DqpNQ84QbWY0qJfhj+1GhsVugTE46ePdr7t7v3K1TFq27cGPw # seJiUAdQwjUfblmlyjcuZfXr1p2sNAY2xocg/6dyIqroOVU9SxVwqrZAOvXd9t2r # 7UEoT0EfEkDaEaL3T2me6AEtxpkXwEw/usVHv/79vdAVX4VxHUQz3YxUnG4kByXJ # AEwUzq9Pm7mIV6I3zZ1AZHmBxENshhL0pBGdsL9F/Wv1tkPEf1WnDJ+1d2v2Hpag # Pr5i6RikG0x8LoT1+G2Swr43fhOLGybqIiy7T4d4WiCuR3szfj1FCeJoMTEK6jHg # 29Fps7ypQhfkSCcMCvk8VwImb+lc5bQPrV1PKcpEnLZbf3jU6myO/Ac3j2cnfYd6 # 3HidYK3GTpL7hMegyYh/nmFNp/edsgcky7SnDvcxsedVbwLxX112DaVed1ngPXmu # 6ZLrIhNk7BU= # =4IXO # -----END PGP SIGNATURE----- # gpg: Signature made Wed 22 Jan 2025 02:55:50 EST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2025-01-21v2' of https://gitlab.com/thuth/qemu: pc-bios: Update the s390 bios images with the recent changes pc-bios/s390-ccw: Abort IPL on invalid loadparm pc-bios/s390-ccw/netmain: Fix error messages with regards to the TFTP server pc-bios/s390-ccw: Fix boot problem with virtio-net devices pc-bios/s390-ccw/virtio: Add a function to reset a virtio device hw/s390x: Fix crash that occurs when inspecting older versioned machines types crypto: fix bogus error benchmarking pbkdf on fast machines MAINTAINERS: Remove myself as Avocado Framework reviewer tests/functional: Convert the kvm_xen_guest avocado test Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * | pc-bios: Update the s390 bios images with the recent changesThomas Huth2025-01-221-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | Fix the problem with the non-quiesced virtio-net device and make sure to abort the boot process if the user specified a wrong loadparm parameter. Signed-off-by: Thomas Huth <thuth@redhat.com>
| * | pc-bios/s390-ccw: Abort IPL on invalid loadparmJared Rossi2025-01-221-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the loadparm specifies an exact kernel the user wants to boot, if the loadparm is invalid it must represent a misconfiguration of the guest. Thus we should abort the IPL immediately, without attempting to use other devices, to avoid booting into an unintended guest image. Signed-off-by: Jared Rossi <jrossi@linux.ibm.com> Message-ID: <20250117212235.1324063-2-jrossi@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
| * | pc-bios/s390-ccw/netmain: Fix error messages with regards to the TFTP serverThomas Huth2025-01-221-11/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code in net_init_ip() currently bails out early if "rc" is less than 0, so the if-statements that check for negative "rc" codes to print out some specific error messages with regards to the TFTP server are never reached. Move them earlier to bring that dead code back to life. Reviewed-by: Jared Rossi <jrossi@linux.ibm.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Tested-by: Jared Rossi <jrossi@linux.ibm.com> Message-ID: <20250116115826.192047-4-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
| * | pc-bios/s390-ccw: Fix boot problem with virtio-net devicesThomas Huth2025-01-223-10/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we are trying to boot from virtio-net devices, the s390-ccw bios currently leaves the virtio-net device enabled after using it. That means that the receiving virt queues will continue to happily write incoming network packets into memory. This can corrupt data of the following boot process. For example, if you set up a second guest on a virtual network and create a lot of broadcast traffic there, e.g. with: ping -i 0.02 -s 1400 -b 192.168.1.255 and then you try to boot a guest with two boot devices, a network device first (which should not be bootable) and e.g. a bootable SCSI CD second, then this guest will fail to load the kernel from the CD image: $ qemu-system-s390x -m 2G -nographic -device virtio-scsi-ccw \ -netdev tap,id=net0 -device virtio-net-ccw,netdev=net0,bootindex=1 \ -drive if=none,file=test.iso,format=raw,id=cd1 \ -device scsi-cd,drive=cd1,bootindex=2 LOADPARM=[ ] Network boot device detected Network boot starting... Using MAC address: 52:54:00:12:34:56 Requesting information via DHCP: done Using IPv4 address: 192.168.1.76 Using TFTP server: 192.168.1.1 Trying pxelinux.cfg files... TFTP error: ICMP ERROR "port unreachable" Receiving data: 0 KBytes Repeating TFTP read request... TFTP error: ICMP ERROR "port unreachable" Failed to load OS from network. Failed to IPL from this network! LOADPARM=[ ] Using virtio-scsi. ! virtio-scsi:setup:inquiry: response VS RESP=ff ! ERROR: No suitable device for IPL. Halting... We really have to shut up the virtio-net devices after we're not using it anymore. The easiest way to do this is to simply reset the device, so let's do that now. Reviewed-by: Jared Rossi <jrossi@linux.ibm.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Tested-by: Jared Rossi <jrossi@linux.ibm.com> Message-ID: <20250116115826.192047-3-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
| * | pc-bios/s390-ccw/virtio: Add a function to reset a virtio deviceThomas Huth2025-01-222-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To be able to properly silence a virtio device after using it, we need a global function to reset the device. Reviewed-by: Jared Rossi <jrossi@linux.ibm.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Tested-by: Jared Rossi <jrossi@linux.ibm.com> Message-ID: <20250116115826.192047-2-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
| * | hw/s390x: Fix crash that occurs when inspecting older versioned machines typesThomas Huth2025-01-221-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | qemu-system-s390x currently crashes when trying to inspect older machines types, for example: $ echo '{ "execute": "qmp_capabilities" } { "execute": "qom-list-properties","arguments": { "typename": "s390-ccw-virtio-3.0-machine"}}' \ | ./qemu-system-s390x -qmp stdio -no-shutdown {"QMP": {"version": {"qemu": {"micro": 50, "minor": 2, "major": 9}, "package": "v9.2.0-1071-g81e97df3e7"}, "capabilities": ["oob"]}} {"return": {}} ** Bail out! ERROR:../target/s390x/cpu_models.c:832:s390_set_qemu_cpu_model: assertion failed: (QTAILQ_EMPTY_RCU(&cpus_queue)) Aborted (core dumped) The problem is that the versioned s390-ccw-virtio machine types use instance_init() to set global state that should be initialized before the CPUs get instantiated. But instance_init() is not called only for the machine that is finally used, it is also called for temporary instances of objects that are e.g. just created for introspection. That means that those instance_init() functions can also be called while a machine (and its CPUs) is already created, which triggers the assertion in cpu_models.c. So we must not use instance_init() for setting global state, but use the machine->init() function instead, which is really only called once when the machine comes to life. Fixes: 3b00f702c2 ("s390x/cpumodel: add zpci, aen and ais facilities") Message-ID: <20250120085059.239345-1-thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
| * | crypto: fix bogus error benchmarking pbkdf on fast machinesDaniel P. Berrangé2025-01-221-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We're seeing periodic reports of errors like: $ qemu-img create -f luks --object secret,data=123456,id=sec0 \ -o key-secret=sec0 luks-info.img 1M Formatting 'luks-info.img', fmt=luks size=1048576 key-secret=sec0 qemu-img: luks-info.img: Unable to get accurate CPU usage This error message comes from a recent attempt to workaround a kernel bug with measuring rusage in long running processes: commit c72cab5ad9f849bbcfcf4be7952b8b8946cc626e Author: Tiago Pasqualini <tiago.pasqualini@canonical.com> Date: Wed Sep 4 20:52:30 2024 -0300 crypto: run qcrypto_pbkdf2_count_iters in a new thread Unfortunately this has a subtle bug on machines which are very fast. On the first time around the loop, the 'iterations' value is quite small (1 << 15), and so will run quite fast. Testing has shown that some machines can complete this benchmarking task in as little as 7 milliseconds. Unfortunately the 'getrusage' data is not updated at the time of the 'getrusage' call, it is done asynchronously by the scheduler. The 7 millisecond completion time for the benchmark is short enough that 'getrusage' sometimes reports 0 accumulated execution time. As a result the 'delay_ms == 0' sanity check in the above commit is triggering non-deterministically on such machines. The benchmarking loop intended to run multiple times, increasing the 'iterations' value until the benchmark ran for > 500 ms, but the sanity check doesn't allow this to happen. To fix it, we keep a loop counter and only run the sanity check after we've been around the loop more than 5 times. At that point the 'iterations' value is high enough that even with infrequent updates of 'getrusage' accounting data on fast machines, we should see a non-zero value. Fixes: https://lore.kernel.org/qemu-devel/ffe542bb-310c-4616-b0ca-13182f849fd1@redhat.com/ Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=2336437 Reported-by: Thomas Huth <thuth@redhat.com> Reported-by: Richard W.M. Jones <rjones@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250109093746.1216300-1-berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
| * | MAINTAINERS: Remove myself as Avocado Framework reviewerPhilippe Mathieu-Daudé2025-01-221-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While I was very enthusiastic when Avocado was presented to the QEMU community and pushed forward to have it integrated, time passed and I lost interest. Be honest, remove my R: tag to not give fake expectation I'd review patches related to Avocado anymore. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250106055024.70139-1-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
| * | tests/functional: Convert the kvm_xen_guest avocado testThomas Huth2025-01-223-38/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the serial console to execute the commands in the guest instead of using ssh since we don't have ssh support in the functional framework yet. Acked-by: David Woodhouse <dwmw@amazon.co.uk> Message-ID: <20250113082516.57894-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* | | Merge tag 'pull-tcg-20250117' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi2025-01-2178-2280/+2867
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tcg: - Add TCGOP_TYPE, TCGOP_FLAGS. - Pass type and flags to tcg_op_supported, tcg_target_op_def. - Split out tcg-target-has.h and unexport from tcg.h. - Reorg constraint processing; constify TCGOpDef. - Make extract, sextract, deposit opcodes mandatory. - Merge ext{8,16,32}{s,u} opcodes into {s}extract. tcg/mips: Expand bswap unconditionally tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64 tcg/riscv: Use BEXTI for single-bit extractions tcg/sparc64: Use SRA, SRL for {s}extract_i64 disas/riscv: Guard dec->cfg dereference for host disassemble util/cpuinfo-riscv: Detect Zbs accel/tcg: Call tcg_tb_insert() for one-insn TBs linux-user: Add missing /proc/cpuinfo fields for sparc # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmeKnzUdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+Kvgf+LG9UjXlWF9GK923E # TllBL2rLf1OOdtTXWO15VcvGMoWDwB3tVBdhihdvXmnWju+WbfMk6mct5NhzsKn9 # LmuugMIZs+hMROj+bgMK8x47jRIh5N2rDYxcEgmyfIpYb2o9qvyqKecGVRlSJTCE # bmt5UFbvPThBb8upoMfq3F6evuMx0szBP7wrOwSR/VGpmzIr20UTEWo6I1ALp4uj # paFaysYol4em3dIhkiuV9cL7E0EIObaNa7l9RUci/BmTq+JaVxUnW1Y2i0PEwKwG # FJSfYTJk3wBgAVxC2zC2g3ZM7uKuecSXMpiFopTiuyQLp7Q61i9kCNvEq0qY5tdb # DaqR/g== # =cv4O # -----END PGP SIGNATURE----- # gpg: Signature made Fri 17 Jan 2025 13:19:33 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20250117' of https://gitlab.com/rth7680/qemu: (68 commits) softfloat: Constify helpers returning float_status field accel/tcg: Call tcg_tb_insert() for one-insn TBs tcg: Document tb_lookup() and tcg_tb_lookup() linux-user: Add missing /proc/cpuinfo fields for sparc tcg/riscv: Use BEXTI for single-bit extractions util/cpuinfo-riscv: Detect Zbs tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64} tcg: Remove TCG_TARGET_HAS_{s}extract_{i32,i64} tcg/tci: Remove assertions for deposit and extract tcg/tci: Provide TCG_TARGET_{s}extract_valid tcg/sparc64: Use SRA, SRL for {s}extract_i64 tcg/s390x: Fold the ext{8,16,32}[us] cases into {s}extract tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64 tcg/riscv64: Fold the ext{8,16,32}[us] cases into {s}extract tcg/ppc: Fold the ext{8,16,32}[us] cases into {s}extract tcg/mips: Fold the ext{8,16,32}[us] cases into {s}extract tcg/loongarch64: Fold the ext{8,16,32}[us] cases into {s}extract tcg/arm: Add full [US]XT[BH] into {s}extract tcg/aarch64: Expand extract with offset 0 with andi tcg/aarch64: Provide TCG_TARGET_{s}extract_valid ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * | softfloat: Constify helpers returning float_status fieldPhilippe Mathieu-Daudé2025-01-171-11/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | These helpers don't alter float_status. Make it const. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250116214359.67295-1-philmd@linaro.org>
| * | accel/tcg: Call tcg_tb_insert() for one-insn TBsIlya Leoshkevich2025-01-171-9/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently one-insn TBs created from I/O memory are not added to region_trees. Therefore, when they generate exceptions, they are not handled by cpu_restore_state_from_tb(). For x86 this is not a problem, because x86_restore_state_to_opc() only restores pc and cc, which already have the correct values if the first TB instruction causes an exception. However, on several other architectures, restore_state_to_opc() is not stricly limited to state restoration and affects some exception-related registers, where guests can notice incorrect values, for example: - arm's exception.syndrome; - hppa's unwind_breg; - riscv's excp_uw2; - s390x's int_pgm_ilen. Fix by always calling tcg_tb_insert(). This may increase the size of region_trees, but tcg_region_reset_all() clears it once code_gen_buffer fills up, so it will not grow uncontrollably. Do not call tb_link_page(), which would add such TBs to the QHT, to prevent tb_lookup() from finding them. These TBs are single-use, since subsequent reads from I/O memory may return different values; they are not removed from code_gen_buffer only in order to keep things simple. Co-developed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250116213214.5695-2-iii@linux.ibm.com>
| * | tcg: Document tb_lookup() and tcg_tb_lookup()Ilya Leoshkevich2025-01-172-1/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These similarly named functions serve different purposes; add docstrings to highlight them. Suggested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250116213214.5695-1-iii@linux.ibm.com>
| * | linux-user: Add missing /proc/cpuinfo fields for sparcHelge Deller2025-01-161-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add some missing fields which may be parsed by userspace applications. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <Z39B1wzNNpndmOxZ@p100>
| * | tcg/riscv: Use BEXTI for single-bit extractionsRichard Henderson2025-01-162-3/+16
| | | | | | | | | | | | | | | | | | Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250102181601.1421059-3-richard.henderson@linaro.org>
| * | util/cpuinfo-riscv: Detect ZbsRichard Henderson2025-01-162-4/+19
| | | | | | | | | | | | | | | | | | | | | Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250102181601.1421059-2-richard.henderson@linaro.org>
| * | tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64}Richard Henderson2025-01-1615-65/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | Make deposit "unconditional" in the sense that the opcode is always present. Rely instead on TCG_TARGET_deposit_valid, now always defined. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg: Remove TCG_TARGET_HAS_{s}extract_{i32,i64}Richard Henderson2025-01-1614-70/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Make extract and sextract "unconditional" in the sense that the opcodes are always present. Rely instead on TCG_TARGET_HAS_{s}extract_valid, now always defined. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg/tci: Remove assertions for deposit and extractRichard Henderson2025-01-161-18/+2
| | | | | | | | | | | | | | | | | | | | | We already have these assertions during opcode creation. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg/tci: Provide TCG_TARGET_{s}extract_validRichard Henderson2025-01-161-0/+3
| | | | | | | | | | | | | | | | | | | | | Trivially mirrors TCG_TARGET_HAS_{s}extract_*. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg/sparc64: Use SRA, SRL for {s}extract_i64Richard Henderson2025-01-162-4/+20
| | | | | | | | | | | | | | | | | | | | | Extracts which abut bit 32 may use 32-bit shifts. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg/s390x: Fold the ext{8,16,32}[us] cases into {s}extractRichard Henderson2025-01-162-2/+57
| | | | | | | | | | | | | | | | | | | | | | | | Accept byte and word extensions with the extract opcodes. This is preparatory to removing the specialized extracts. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64Richard Henderson2025-01-162-21/+19
| | | | | | | | | | | | | | | | | | | | | Extracts which abut bit 32 may use 32-bit shifts. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg/riscv64: Fold the ext{8,16,32}[us] cases into {s}extractRichard Henderson2025-01-162-4/+69
| | | | | | | | | | | | | | | | | | | | | | | | Accept byte and word extensions with the extract opcodes. This is preparatory to removing the specialized extracts. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>