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* target/riscv: rvv: Fix vslide1[up|down].vx unexpected result when XLEN=32 ↵Max Chou2025-10-033-20/+66
| | | | | | | | | | | | | | | | | | and SEW=64 When XLEN is 32 and SEW is 64, the original implementation of vslide1up.vx and vslide1down.vx helper functions fills the 32-bit value of rs1 into the first element of the destination vector register (rd), which is a 64-bit element. This commit attempted to resolve the issue by extending the rs1 value to 64 bits during the TCG translation phase to ensure that the helper functions won't lost the higer 32 bits. Signed-off-by: Max Chou <max.chou@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250124073325.2467664-1-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* target/riscv: rvv: Modify minimum VLEN according to enabled vector extensionsMax Chou2025-10-031-2/+17
| | | | | | | | | | | | | | | | According to the RISC-V unprivileged specification, the VLEN should be greater or equal to the ELEN. This commit modifies the minimum VLEN based on the vector extensions and introduces a check rule for VLEN and ELEN. Extension Minimum VLEN * V 128 * Zve64[d|f|x] 64 * Zve32[f|x] 32 Signed-off-by: Max Chou <max.chou@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250923090729.1887406-3-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* target/riscv: rvv: Replace checking V by checking Zve32xMax Chou2025-10-035-5/+7
| | | | | | | | | | | The Zve32x extension will be applied by the V and Zve* extensions. Therefore we can replace the original V checking with Zve32x checking for both the V and Zve* extensions. Signed-off-by: Max Chou <max.chou@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250923090729.1887406-2-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* target/riscv: Fix ssamoswap error handlingJim Shu2025-10-033-0/+62
| | | | | | | | | | | | Follow the RISC-V CFI v1.0 spec [1] to fix the exception type when ssamoswap is disabled by xSSE. [1] RISC-V CFI spec v1.0, ch2.7 Atomic Swap from a Shadow Stack Location Signed-off-by: Jim Shu <jim.shu@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250924074818.230010-4-jim.shu@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* target/riscv: Fix SSP CSR error handling in VU/VS modeJim Shu2025-10-031-0/+2
| | | | | | | | | | | | | In VU/VS mode, accessing $ssp CSR will trigger the virtual instruction exception instead of illegal instruction exception if SSE is disabled via xenvcfg CSRs. This is from RISC-V CFI v1.0 spec ch2.2.4. Shadow Stack Pointer Signed-off-by: Jim Shu <jim.shu@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250924074818.230010-3-jim.shu@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* target/riscv: Fix the mepc when sspopchk triggers the exceptionJim Shu2025-10-031-0/+1
| | | | | | | | | | | When sspopchk is in the middle of TB and triggers the SW check exception, it should update PC from gen_update_pc(). If not, RISC-V mepc CSR will get wrong PC address which is still at the start of TB. Signed-off-by: Jim Shu <jim.shu@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250924074818.230010-2-jim.shu@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* target/riscv: do not use translator_ldl in opcode_atVladimir Isaev2025-10-031-1/+2
| | | | | | | | | | | | | | | | | | opcode_at is used only in semihosting checks to match opcodes with expected pattern. This is not a translator and if we got following assert if page is not in TLB: qemu-system-riscv64: ../accel/tcg/translator.c:363: record_save: Assertion `offset == db->record_start + db->record_len' failed. Fixes: 1f9c4462334f ("target/riscv: Use translator_ld* for everything") Signed-off-by: Vladimir Isaev <vladimir.isaev@syntacore.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250815140633.86920-1-vladimir.isaev@syntacore.com> [ Changes by AF: - Fixup header includes after rebase ] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* qemu/osdep: align memory allocations to 2M on RISC-VXuemei Liu2025-10-031-1/+1
| | | | | | | | | | Similar to other architectures (e.g., x86_64, aarch64), utilizing THP on RISC-V KVM requires 2MiB-aligned memory blocks. Signed-off-by: Xuemei Liu <liu.xuemei1@zte.com.cn> Reviewed-by: David Hildenbrand <david@redhat.com> Message-ID: <20250924131803656Yqt9ZJKfevWkInaGppFdE@zte.com.cn> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* target/riscv: use riscv_csrr in riscv_csr_readstove2025-10-031-1/+1
| | | | | | | | | | | | | | | | Commit 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSR") changed the behavior of riscv_csrrw, which would formerly be treated as read-only if the write mask were set to 0. Fixes an exception being raised when accessing read-only vector CSRs like vtype. Fixes: 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSR") Signed-off-by: stove <stove@rivosinc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20250827203617.79947-1-stove@rivosinc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* target/riscv/kvm: Use riscv_cpu_is_32bit() when handling SBI_DBCN regPhilippe Mathieu-Daudé2025-10-031-1/+1
| | | | | | | | | | Use the existing riscv_cpu_is_32bit() helper to check for 32-bit CPU. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-ID: <20250924164515.51782-1-philmd@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* target/riscv: Save stimer and vstimer in CPU vmstateTANG Tiancheng2025-10-031-0/+25
| | | | | | | | | | | | | | | vmstate_riscv_cpu was missing env.stimer and env.vstimer. Without migrating these QEMUTimer fields, active S/VS-mode timer events are lost after snapshot or migration. Add VMSTATE_TIMER_PTR() entries to save and restore them. Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: TANG Tiancheng <lyndra@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911-timers-v3-4-60508f640050@linux.alibaba.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* hw/intc: Save timers array in RISC-V mtimer VMStateTANG Tiancheng2025-10-032-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current 'timecmp' field in vmstate_riscv_mtimer is insufficient to keep timers functional after migration. If an mtimer's entry in 'mtimer->timers' is active at the time the snapshot is taken, it means riscv_aclint_mtimer_write_timecmp() has written to 'mtimecmp' and scheduled a timer into QEMU's main loop 'timer_list'. During snapshot save, these active timers must also be migrated; otherwise, after snapshot load there is no mechanism to restore 'mtimer->timers' back into the 'timer_list', and any pending timer events would be lost. QEMU's migration framework commonly uses VMSTATE_TIMER_xxx macros to save and restore 'QEMUTimer' variables. However, 'timers' is a pointer array with variable length, and vmstate.h did not previously provide a helper macro for such type. This commit adds a new macro, 'VMSTATE_TIMER_PTR_VARRAY', to handle saving and restoring a variable-length array of 'QEMUTimer *'. We then use this macro to migrate the 'mtimer->timers' array, ensuring that timer events remain scheduled correctly after snapshot load. Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Signed-off-by: TANG Tiancheng <lyndra@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911-timers-v3-3-60508f640050@linux.alibaba.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* migration: Add support for a variable-length array of UINT32 pointersTANG Tiancheng2025-10-031-0/+10
| | | | | | | | | | | | | | Add support for defining a vmstate field which is a variable-length array of pointers, and use this to define a VMSTATE_TIMER_PTR_VARRAY() which allows a variable-length array of QEMUTimer* to be used by devices. Message-id: 20250909-timers-v1-0-7ee18a9d8f4b@linux.alibaba.com Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: TANG Tiancheng <lyndra@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911-timers-v3-2-60508f640050@linux.alibaba.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* hw/intc: Save time_delta in RISC-V mtimer VMStateTANG Tiancheng2025-10-021-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In QEMU's RISC-V ACLINT timer model, 'mtime' is not stored directly as a state variable. It is computed on demand as: mtime = rtc_r + time_delta where: - 'rtc_r' is the current VM virtual time (in ticks) obtained via cpu_riscv_read_rtc_raw() from QEMU_CLOCK_VIRTUAL. - 'time_delta' is an offset applied when the guest writes a new 'mtime' value via riscv_aclint_mtimer_write(): time_delta = value - rtc_r Under this design, 'rtc_r' is assumed to be monotonically increasing during VM execution. Even if the guest writes an 'mtime' value smaller than the current one (making 'time_delta' negative in signed arithmetic, or underflow in unsigned arithmetic), the computed 'mtime' remains correct because 'rtc_r_new > rtc_r_old': mtime_new = rtc_r_new + (value - rtc_r_old) However, this monotonicity assumption breaks on snapshot load. Before restoring a snapshot, QEMU resets the guest, which calls riscv_aclint_mtimer_reset_enter() to set 'mtime' to 0 and recompute 'time_delta' as: time_delta = 0 - rtc_r_reset Here, the time_delta differs from the value that was present when the snapshot was saved. As a result, subsequent reads produce a fixed offset from the true mtime. This can be observed with the 'date' command inside the guest: after loading a snapshot, the reported time appears "frozen" at the save point, and only resumes correctly after the guest has run long enough to compensate for the erroneous offset. The fix is to treat 'time_delta' as part of the device's migratable state and save/restore it via vmstate. This preserves the correct relation between 'rtc_r' and 'mtime' across snapshot save/load, ensuring 'mtime' continues incrementing from the precise saved value after restore. Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: TANG Tiancheng <lyndra@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911-timers-v3-1-60508f640050@linux.alibaba.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* hw/char: sifive_uart: Add newline to error messageFrank Chang2025-10-021-1/+1
| | | | | | | | | Adds a missing newline character to the error message. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911160647.5710-5-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* hw/char: sifive_uart: Remove outdated comment about Tx FIFOFrank Chang2025-10-021-6/+0
| | | | | | | | | | Since Tx FIFO is now implemented using "qemu/fifo8.h", remove the comment that no longer reflects the current implementation. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911160647.5710-4-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* hw/char: sifive_uart: Avoid pushing Tx FIFO when size is zeroFrank Chang2025-10-021-1/+3
| | | | | | | | | There's no need to call fifo8_push_all() when size is zero. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911160647.5710-3-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* hw/char: sifive_uart: Raise IRQ according to the Tx/Rx watermark thresholdsFrank Chang2025-10-021-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the SiFive UART raises an IRQ whenever: 1. ie.txwm is enabled. 2. ie.rxwm is enabled and the Rx FIFO is not empty. It does not check the watermark thresholds set by software. However, since commit [1] changed the SiFive UART character printing from synchronous to asynchronous, Tx overflows may occur, causing characters to be dropped when running Linux because: 1. The Linux SiFive UART driver sets the transmit watermark level to 1 [2], meaning a transmit watermark interrupt is raised whenever a character is enqueued into the Tx FIFO. 2. Upon receiving a transmit watermark interrupt, the Linux driver transfers up to a full Tx FIFO's worth of characters from the Linux serial transmit buffer [3], without checking the txdata.full flag before transferring multiple characters [4]. To fix this issue, we must honor the Tx/Rx watermark thresholds and raise interrupts only when the Tx threshold is exceeded or the Rx threshold is undercut. [1] 53c1557b230986ab6320a58e1b2c26216ecd86d5 [2] https://github.com/torvalds/linux/blob/master/drivers/tty/serial/sifive.c#L1039 [3] https://github.com/torvalds/linux/blob/master/drivers/tty/serial/sifive.c#L538 [4] https://github.com/torvalds/linux/blob/master/drivers/tty/serial/sifive.c#L291 Signed-off-by: Frank Chang <frank.chang@sifive.com> Signed-off-by: Emmanuel Blot <emmanuel.blot@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911160647.5710-2-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* roms/opensbi: Update to v1.7Daniel Henrique Barboza2025-10-023-0/+0
| | | | | | | | | | | | | | | | | | | | Update OpenSBI and the pre-built opensbi32 and opensbi64 images to version 1.7. It has been almost an year since we last updated OpenSBI (at the time, up to v1.5.1) and we're missing a lot of good stuff from both v1.6 and v1.7, including SBI 3.0 and RPMI 1.0. The changelog is too large and tedious to post in the commit msg so I encourage refering to [1] and [2] to see the new features we're adding into the QEMU roms. [1] https://github.com/riscv-software-src/opensbi/releases/tag/v1.6 [2] https://github.com/riscv-software-src/opensbi/releases/tag/v1.7 Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* target/riscv: implement MonitorDef HMP APIDaniel Henrique Barboza2025-10-022-0/+149
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MonitorDef API is related to two HMP monitor commands: 'p' and 'x': (qemu) help p print|p /fmt expr -- print expression value (use $reg for CPU register access) (qemu) help x x /fmt addr -- virtual memory dump starting at 'addr' For x86, one of the few targets that implements it, it is possible to print the PC register value with $pc and use the PC value in the 'x' command as well. Those 2 commands are hooked into get_monitor_def(), called by exp_unary() in hmp.c. The function tries to fetch a reg value in two ways: by reading them directly via a target_monitor_defs array or using a target_get_monitor_def() helper. In RISC-V we have *A LOT* of registers and this number will keep getting bigger, so we're opting out of an array declaration. We're able to retrieve all regs but vregs because the API only fits an uint64_t and vregs have 'vlen' size that are bigger than that. With this patch we can do things such as: - print CSRs and use their val in expressions: (qemu) p $mstatus 0xa000000a0 (qemu) p $mstatus & 0xFF 0xa0 - dump the next 10 insn from virtual memory starting at x1 (ra): (qemu) x/10i $ra 0xffffffff80958aea: a9bff0ef jal ra,-1382 # 0xffffffff80958584 0xffffffff80958aee: 10016073 csrrsi zero,sstatus,2 0xffffffff80958af2: 60a2 ld ra,8(sp) 0xffffffff80958af4: 6402 ld s0,0(sp) 0xffffffff80958af6: 0141 addi sp,sp,16 0xffffffff80958af8: 8082 ret 0xffffffff80958afa: 10016073 csrrsi zero,sstatus,2 0xffffffff80958afe: 8082 ret 0xffffffff80958b00: 1141 addi sp,sp,-16 0xffffffff80958b02: e422 sd s0,8(sp) (qemu) Suggested-by: Dr. David Alan Gilbert <dave@treblig.org> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250703130815.1592493-1-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* linux-user/syscall.c: sync RISC-V hwprobe with LinuxDaniel Henrique Barboza2025-10-021-0/+89
| | | | | | | | | | | | | It has been awhile since the last sync. Let's bring QEMU hwprobe support on par with Linux 6.17-rc4. A lot of new RISCV_HWPROBE_KEY_* entities are added but this patch is only adding support for ZICBOM_BLOCK_SIZE. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250903164043.2828336-1-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* docs/interop/firmware: Add riscv64 to FirmwareArchitectureAndrea Bolognani2025-10-021-1/+3
| | | | | | | | | | | Descriptors using this value have been shipped for years by distros, so we just need to update the spec to match reality. Signed-off-by: Andrea Bolognani <abologna@redhat.com> Reviewed-by: Kashyap Chamarthy <kchamart@redhat.com> Message-ID: <20250910121501.676219-1-abologna@redhat.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* hw/riscv/riscv-iommu: Fix MSI table size limitAndrew Jones2025-10-021-4/+7
| | | | | | | | | | | | | The MSI table is not limited to 4k. The only constraint the table has is that its base address must be aligned to its size, ensuring no offsets of the table size will overrun when added to the base address (see "8.5. MSI page tables" of the AIA spec). Fixes: 0c54acb8243d ("hw/riscv: add RISC-V IOMMU base emulation") Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20250904132723.614507-2-ajones@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* Merge tag 'rust-ci-pull-request' of https://gitlab.com/marcandre.lureau/qemu ↵Richard Henderson2025-09-3044-179/+573
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging CI/build-sys fixes for Rust Collect CI/build-sys patches related to Rust. # -----BEGIN PGP SIGNATURE----- # # iQJQBAABCgA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmjb+PUcHG1hcmNhbmRy # ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5Y3iEAC2C8pc2lPCTGFI+0N/ # eqXwTCeSysbmprhqf3vWXQEke8WgYMGPeZNXqUUnzzRuR5oN7JTy6YNzLCM0jGUp # QHciTecyPVQjIlWOs+HURqKsrLO2CG1sbWuips1eZ6X8O5KdHLxfFqvyReflEn/z # G1LHhQEWQzKwR0kj3VVHjyUzeSIJVch8sVONkby4h2DMFO4lHtcrr7VAzKlwKGAt # kgFgijaLe7xCPktJs7g2x+NfBeRbnQ/3mb3/3pkunx98Dhhis0yTZSyfzlChyVfL # FwTf/xWgw/0oQ8+c9E/RJz6DVvgjJNASrLumuZWO7HVdDV60cvMwb3xHOcQmAz7t # +ySKM08jI9lWYIr/tKnwWo1NWFWPzDts0L+M/pRhQ1/pYw8OnYvtwnKd3ClEVRbp # dYcKRE97t3L8BbWyB5hTvTc0V0IVbOOhfDVZfG/IPqxIKWHeCGLL2PiyKGBgfU2M # V4okrMbGqWH72HZbLUpMYcaaK9lVv6ng/3AH817giJVnCuNO06m420/7Q8WcX68o # foIeTbL83h8KCqi8pGCJUW9Wz3/wIk3AYkUKwdISswCL6nSgt7pk7K1fnFwGI4bu # PqzQITelnRUK0TOvqzbDi6Y3j0p06/bc4TAHoI76Yzi3iUrQL0ynOAFFf6Wk13p9 # EnMAlnsrY9kyJrCMU66lroU/RQ== # =rMSk # -----END PGP SIGNATURE----- # gpg: Signature made Tue 30 Sep 2025 08:36:21 AM PDT # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [unknown] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * tag 'rust-ci-pull-request' of https://gitlab.com/marcandre.lureau/qemu: (23 commits) build-sys: pass -fvisibility=default for wasm bindgen build-sys: deprecate mips host meson: rust-bindgen limit allowlist-file to srcdir/include tests/freebsd: enable Rust configure: set the meson executable suffix/ext tests/lcitool: enable rust & refresh tests/docker: add ENABLE_RUST environment tests/lcitool: update to debian13 tests/lcitool: add missing rust-std dep lcitool/alpine: workaround bindgen issue lcitool/qemu: include libclang-rt for TSAN lcitool: update, switch to f41 build-sys: cfi_debug and safe_stack are not compatible tests/docker/common: print meson log on configure failure tests/docker: use fully qualified image name for emsdk tests/docker/common: print errors to stderr configure: set the bindgen cross target configure: fix rust meson configuration scripts/archive-source: use a bash array scripts/archive-source: silence subprojects downloads ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * build-sys: pass -fvisibility=default for wasm bindgenMarc-André Lureau2025-09-309-1/+13
| | | | | | | | | | | | | | | | | | Otherwise, no functions are generated: https://github.com/rust-lang/rust-bindgen/issues/2989 Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Kohei Tokunaga <ktokunaga.mail@gmail.com> Message-ID: <20250924120426.2158655-27-marcandre.lureau@redhat.com>
| * build-sys: deprecate mips hostMarc-André Lureau2025-09-303-8/+11
| | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250924120426.2158655-26-marcandre.lureau@redhat.com>
| * meson: rust-bindgen limit allowlist-file to srcdir/includeMarc-André Lureau2025-09-301-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gitlab CI restricts usage of directories for the build environment and cache. Msys64 is installed under project root ($srcdir/msys64). This confuses rust-bindgen allowlist-file which will generate bindings for all the system include headers under msys64/. blocklist-file is also too strict, as it prevents generating all the recursively dependent types coming from system includes. Instead, let's not use allowlist-file from the project root, Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-ID: <20250924120426.2158655-22-marcandre.lureau@redhat.com>
| * tests/freebsd: enable RustMarc-André Lureau2025-09-302-2/+4
| | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-21-marcandre.lureau@redhat.com>
| * configure: set the meson executable suffix/extMarc-André Lureau2025-09-301-1/+13
| | | | | | | | | | | | | | | | | | The 'rustfmt' target runs meson: it needs the correct path with extension on Windows. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-20-marcandre.lureau@redhat.com>
| * tests/lcitool: enable rust & refreshMarc-André Lureau2025-09-3016-3/+41
| | | | | | | | | | | | | | | | | | Enable Rust on various distro images: alpine, centos, debian, fedora, opensuse. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250924120426.2158655-19-marcandre.lureau@redhat.com>
| * tests/docker: add ENABLE_RUST environmentMarc-André Lureau2025-09-301-0/+9
| | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-18-marcandre.lureau@redhat.com>
| * tests/lcitool: update to debian13Marc-André Lureau2025-09-309-46/+149
| | | | | | | | | | | | | | | | | | riscv64 is now a supported architecture. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250924120426.2158655-17-marcandre.lureau@redhat.com>
| * tests/lcitool: add missing rust-std depMarc-André Lureau2025-09-3017-1/+18
| | | | | | | | | | | | | | | | Some distros/targets may pull it by default, but some don't. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-16-marcandre.lureau@redhat.com>
| * lcitool/alpine: workaround bindgen issueMarc-André Lureau2025-09-302-1/+9
| | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-15-marcandre.lureau@redhat.com>
| * lcitool/qemu: include libclang-rt for TSANMarc-André Lureau2025-09-3018-0/+18
| | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-14-marcandre.lureau@redhat.com>
| * lcitool: update, switch to f41Marc-André Lureau2025-09-3020-37/+79
| | | | | | | | | | | | | | | | Newer lcitool version has various fixes helping QEMU CI and this series. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-13-marcandre.lureau@redhat.com>
| * build-sys: cfi_debug and safe_stack are not compatibleMarc-André Lureau2025-09-302-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It fails to link on fedora >= 41: /usr/bin/ld: /usr/bin/../lib/clang/20/lib/x86_64-redhat-linux-gnu/libclang_rt.safestack.a(safestack.cpp.o): in function `__sanitizer_internal_memcpy': (.text.__sanitizer_internal_memcpy+0x0): multiple definition of `__sanitizer_internal_memcpy'; /usr/bin/../lib/clang/20/lib/x86_64-redhat-linux-gnu/libclang_rt.ubsan_standalone.a(sanitizer_libc.cpp.o):(.text.__sanitizer_internal_memcpy+0x0): first defined here /usr/bin/ld: /usr/bin/../lib/clang/20/lib/x86_64-redhat-linux-gnu/libclang_rt.safestack.a(safestack.cpp.o): in function `__sanitizer_internal_memmove': (.text.__sanitizer_internal_memmove+0x0): multiple definition of `__sanitizer_internal_memmove'; /usr/bin/../lib/clang/20/lib/x86_64-redhat-linux-gnu/libclang_rt.ubsan_standalone.a(sanitizer_libc.cpp.o):(.text.__sanitizer_internal_memmove+0x0): first defined here /usr/bin/ld: /usr/bin/../lib/clang/20/lib/x86_64-redhat-linux-gnu/libclang_rt.safestack.a(safestack.cpp.o): in function `__sanitizer_internal_memset': (.text.__sanitizer_internal_memset+0x0): multiple definition of `__sanitizer_internal_memset'; /usr/bin/../lib/clang/20/lib/x86_64-redhat-linux-gnu/libclang_rt.ubsan_standalone.a(sanitizer_libc.cpp.o):(.text.__sanitizer_internal_memset+0x0): first defined here cfi_debug seems to pull ubsan which has conflicting symbols with safe_stack. See also: https://bugzilla.redhat.com/show_bug.cgi?id=2397265 Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-12-marcandre.lureau@redhat.com>
| * tests/docker/common: print meson log on configure failureMarc-André Lureau2025-09-301-1/+1
| | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-11-marcandre.lureau@redhat.com>
| * tests/docker: use fully qualified image name for emsdkMarc-André Lureau2025-09-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Without it, at least it fails with podman on fc42: [1/6] STEP 1/15: FROM emscripten/emsdk:3.1.50 AS build-base Error: creating build container: short-name resolution enforced but cannot prompt without a TTY Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Kohei Tokunaga <ktokunaga.mail@gmail.com> Message-ID: <20250924120426.2158655-10-marcandre.lureau@redhat.com>
| * tests/docker/common: print errors to stderrMarc-André Lureau2025-09-301-2/+2
| | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-9-marcandre.lureau@redhat.com>
| * configure: set the bindgen cross targetMarc-André Lureau2025-09-304-0/+110
| | | | | | | | | | | | | | | | | | Implement a bash version of rust-bindgen rust_to_clang_target() to convert from rust target to clang target. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-ID: <20250924120426.2158655-8-marcandre.lureau@redhat.com>
| * configure: fix rust meson configurationMarc-André Lureau2025-09-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | It was incorrectly set on the [host_machine] and caused error: File "/tmp/qemu-test/build/pyvenv/lib/python3.11/site-packages/mesonbuild/envconfig.py", line 281, in from_literal assert all(isinstance(v, str) for v in raw.values()), 'for mypy' AssertionError: for mypy Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-7-marcandre.lureau@redhat.com>
| * scripts/archive-source: use a bash arrayMarc-André Lureau2025-09-301-8/+23
| | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250924120426.2158655-6-marcandre.lureau@redhat.com>
| * scripts/archive-source: silence subprojects downloadsMarc-André Lureau2025-09-301-1/+1
| | | | | | | | | | | | | | | | It's too verbose. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250924120426.2158655-5-marcandre.lureau@redhat.com>
| * scripts/archive-source: speed up downloading subprojectsMarc-André Lureau2025-09-301-2/+3
| | | | | | | | | | | | | | | | | | | | Running meson on each subproject is quite slow. According to Paolo, meson will run download tasks in parallel. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250924120426.2158655-4-marcandre.lureau@redhat.com>
| * gitlab-ci: fix 'needs' property type must be arrayMarc-André Lureau2025-09-303-54/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gitlab "Pipeline editor" has some warnings, and gitlab-ci-local fails. Read also from the docs https://docs.gitlab.com/ci/yaml/#needs "Supported values: An array of jobs (maximum of 50 jobs). An empty array ([]), to set the job to start as soon as the pipeline is created." Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-ID: <20250924120426.2158655-3-marcandre.lureau@redhat.com>
| * build-sys: require -lrt when no shm_open() in std libsMarc-André Lureau2025-09-301-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | Fail during configure time if the shm functions are missing, as required by oslib-posix.c. Note, we could further check the presence of the function in librt. This is a minor cleanup/improvement. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250924120426.2158655-2-marcandre.lureau@redhat.com>
* | Merge tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu into ↵Richard Henderson2025-09-306-16/+27
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging UI-related Fixes for gtk, sdl2, spice UI backends. # -----BEGIN PGP SIGNATURE----- # # iQJQBAABCgA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmjbjIEcHG1hcmNhbmRy # ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5Q70EACGm3PbuN9NAn0xOxTR # +uBftfnsdSFuksh6NpTi9IxHrP75VMtepBsxpS1F0HWjKBIvTcSvNMdVIOUyfSWo # zCT9nIMX0Wk7NKdHRwayW/EQGOrZrbGcI/jwCg0BvfgfTyi1SNQnNCQOH2swG5rz # gZr6/53PQGrva0cM1PooaqZRGRG+3aPLuMAt2aS3ZDtHNTT6WN5KrvtmNGck8OCL # uLcsc25WPH1sWQ2yfxj66L+GLdDO0GXAAa88XoBDpnIVrbGiply5tdZlMz4QRjYB # nxMwTgsFfWSZgCnWie83YhmKPsYcKVinulieUKygS18+VVz0rUEJtsDPjlsyA9Uc # LP6zgYP0RV9knLfImfpevE5AGtw8FwjV0wlqg30+hNOyZXmpWzyWSN6Kwu72GIIu # Ox1cY03bxkhGz8KlYqdcGrkxm7SZIEH8IoSoAisRwSA6AchxTT8c8qgeAv5jgk4d # SrZoAgrgxK70UjuvYRW0ukE5MegXIfZMmKFa254b8zfnlFNSF10LwOiqXsw20IPl # SGvbTjEkEw/sJlPAZdUr4tEH/Xu1f3OLy4zH2gJiHlHMbgR1ndKiA3JUTpTytOne # nERTCPX1vXURI27l3JY6hu1NJuy+k+DZE9K/gPFMXnrQk1Ma7qIVyUqPDUOK2WtV # 8gISszSdbQl6mNxvMjiyy52eZg== # =7A6g # -----END PGP SIGNATURE----- # gpg: Signature made Tue 30 Sep 2025 12:53:37 AM PDT # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [unknown] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu: ui/icons/qemu.svg: Add metadata information (author, license) to the logo ui/sdl2: fix reset scaling binding to be consistent with gtk ui/spice: fix crash when disabling GL scanout on ui/spice: Fix abort on macOS gtk: Skip drawing if console surface is NULL Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * ui/icons/qemu.svg: Add metadata information (author, license) to the logoThomas Huth2025-09-301-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We've got two versions of the QEMU logo in the repository, one with the whole word "QEMU" (pc-bios/qemu_logo.svg) and one that only contains the letter "Q" (ui/icons/qemu.svg). While qemu_logo.svg contains the proper metadata with license and author information, this is missing from the ui/icons/qemu.svg file. Copy the meta data there so that people have a chance to know the license of the file if they only look at the qemu.svg file. Closes: https://gitlab.com/qemu-project/qemu/-/issues/3139 Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-ID: <20250930071419.117592-1-thuth@redhat.com>
| * ui/sdl2: fix reset scaling binding to be consistent with gtkNir Lichtman2025-09-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Problem: Currently the reset scaling hotkey is inconsistent between SDL and GTK graphics modes. Solution: Fix SDL to use MOD+0 instead of MOD+u which is in line with GTK and generally more consistent with other apps. This is also related to my previously sent patch fixing the docs. Suggested-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Nir Lichtman <nir@lichtman.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250910114929.GA1783677@lichtman.org>