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path: root/hw/dma/xlnx_csu_dma.c (follow)
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* hw/dma: Constify VMStateRichard Henderson2023-12-291-1/+1
* hw/dma/xlnx_csu_dma: don't throw guest errors when stopping the SRC DMAFrederic Konrad2023-11-271-4/+8
* hw/misc, hw/ssi: Fix some URLs for AMD / Xilinx modelsFrederic Konrad2023-11-271-1/+1
* hw/dma: Declare link using static DEFINE_PROP_LINK() macroPhilippe Mathieu-Daudé2023-10-191-9/+4
* bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plxPhilippe Mathieu-Daudé2023-01-181-2/+2
* ptimer: Rename PTIMER_POLICY_DEFAULT to PTIMER_POLICY_LEGACYPeter Maydell2022-05-191-1/+1
* hw/dma/xlnx_csu_dma: Set TYPE_XLNX_CSU_DMA class_sizePeter Maydell2022-03-181-0/+1
* Merge remote-tracking branch 'remotes/quintela-gitlab/tags/migration-20220128...Peter Maydell2022-01-291-1/+0
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| * Remove unnecessary minimum_version_id_old fieldsPeter Maydell2022-01-281-1/+0
* | hw/dma/xlnx_csu_dma: Support starting a read transfer through a class methodFrancisco Iglesias2022-01-281-0/+17
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* hw/dma/xlnx_csu_dma: Always expect 'dma' link property to be setPhilippe Mathieu-Daudé2021-08-261-11/+10
* hw/dma/xlnx_csu_dma: Run trivial checks early in realize()Philippe Mathieu-Daudé2021-08-261-5/+5
* hw: Remove superfluous includes of hw/hw.hThomas Huth2021-05-021-1/+0
* hw/dma: Implement a Xilinx CSU DMA modelXuzhou Cheng2021-03-081-0/+745