| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx | Philippe Mathieu-Daudé | 2023-01-18 | 1 | -2/+2 |
| * | ptimer: Rename PTIMER_POLICY_DEFAULT to PTIMER_POLICY_LEGACY | Peter Maydell | 2022-05-19 | 1 | -1/+1 |
| * | hw/dma/xlnx_csu_dma: Set TYPE_XLNX_CSU_DMA class_size | Peter Maydell | 2022-03-18 | 1 | -0/+1 |
| * | Merge remote-tracking branch 'remotes/quintela-gitlab/tags/migration-20220128... | Peter Maydell | 2022-01-29 | 1 | -1/+0 |
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| | * | Remove unnecessary minimum_version_id_old fields | Peter Maydell | 2022-01-28 | 1 | -1/+0 |
| * | | hw/dma/xlnx_csu_dma: Support starting a read transfer through a class method | Francisco Iglesias | 2022-01-28 | 1 | -0/+17 |
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| * | hw/dma/xlnx_csu_dma: Always expect 'dma' link property to be set | Philippe Mathieu-Daudé | 2021-08-26 | 1 | -11/+10 |
| * | hw/dma/xlnx_csu_dma: Run trivial checks early in realize() | Philippe Mathieu-Daudé | 2021-08-26 | 1 | -5/+5 |
| * | hw: Remove superfluous includes of hw/hw.h | Thomas Huth | 2021-05-02 | 1 | -1/+0 |
| * | hw/dma: Implement a Xilinx CSU DMA model | Xuzhou Cheng | 2021-03-08 | 1 | -0/+745 |