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path: root/hw/i2c/aspeed_i2c.c (follow)
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* qom: Have class_init() take a const data argumentPhilippe Mathieu-Daudé2025-04-251-8/+9
* include/hw/qdev-properties: Remove DEFINE_PROP_END_OF_LISTRichard Henderson2024-12-191-2/+0
* hw/i2c: Constify all PropertyRichard Henderson2024-12-151-2/+2
* hw/i2c/aspeed: Add support for 64 bit addressesJamin Lin2024-09-161-0/+14
* hw/i2c/aspeed: Add support for Tx/Rx buffer 64 bit addressesJamin Lin2024-09-161-0/+48
* hw/i2c/aspeed: Add AST2700 supportJamin Lin2024-09-161-0/+62
* hw/i2c/aspeed: Introduce a new dma_dram_offset attribute in AspeedI2CbusJamin Lin2024-09-161-19/+32
* hw/i2c/aspeed: Support discontinuous poll buffer memory region of I2C busJamin Lin2024-09-161-1/+2
* hw/i2c/aspeed: Introduce a new bus pool buffer attribute in AspeedI2CbusJamin Lin2024-09-161-18/+113
* hw/i2c/aspeed: Support discontinuous register memory region of I2C busJamin Lin2024-09-161-1/+2
* hw: Use device_class_set_legacy_reset() instead of opencodingPeter Maydell2024-09-131-2/+2
* hw/i2c/aspeed: rename the I2C class pool attribute to share_poolJamin Lin2024-07-211-18/+21
* hw/i2c/aspeed: support to set the different memory sizeJamin Lin2024-07-211-1/+5
* hw/i2c: Constify VMStateRichard Henderson2023-12-291-2/+2
* aspeed/i2c: Clean up local variable shadowingCédric Le Goater2023-09-291-1/+0
* hw/i2c/aspeed: Add support for buffer organizationHang Yu2023-09-011-0/+4
* hw/i2c/aspeed: Fix TXBUF transmission start position errorHang Yu2023-09-011-24/+6
* hw/i2c/aspeed: Fix Tx count and Rx size error in buffer pool modeHang Yu2023-09-011-4/+4
* hw/i2c: only schedule pending master when bus is idleKlaus Jensen2023-03-021-0/+2
* hw/i2c/aspeed: Fix old reg slave receivePeter Delevoryas2022-10-241-3/+5
* hw/i2c/aspeed: Add new-registers DMA slave mode RX supportPeter Delevoryas2022-06-301-12/+121
* hw/i2c/aspeed: add slave device in old register modeKlaus Jensen2022-06-301-9/+80
* hw/i2c/aspeed: Fix MASTER_EN missing error messagePeter Delevoryas2022-06-301-2/+2
* hw/i2c/aspeed: Fix DMA len write-enable bit handlingPeter Delevoryas2022-06-301-4/+4
* hw/i2c/aspeed: Fix R_I2CD_FUN_CTRL referencePeter Delevoryas2022-06-301-1/+1
* aspeed/i2c: Change trace event for NORMAL_STOP statesCédric Le Goater2022-06-301-1/+1
* aspeed/i2c: Enable SLAVE_ADDR_RX_MATCH alwaysCédric Le Goater2022-06-221-3/+10
* hw/i2c/aspeed: add DEV_ADDR in old register modeKlaus Jensen2022-06-221-2/+2
* hw/i2c/aspeed: rework raise interrupt trace eventKlaus Jensen2022-06-221-12/+22
* aspeed/i2c: Add ast1030 controller modelsCédric Le Goater2022-06-221-0/+24
* aspeed: i2c: Move regs and helpers to header fileJoe Komlodi2022-06-221-266/+0
* aspeed: i2c: Add PKT_DONE IRQ to traceJoe Komlodi2022-06-221-0/+3
* aspeed: i2c: Add new mode supportJoe Komlodi2022-06-221-194/+650
* aspeed: i2c: Use reg array instead of individual varsJoe Komlodi2022-06-221-155/+126
* aspeed: i2c: Migrate to registerfields APIJoe Komlodi2022-06-221-197/+196
* aspeed/i2c: QOMify AspeedI2CBusCédric Le Goater2021-10-121-18/+83
* aspeed/i2c: Rename DMA address spaceCédric Le Goater2021-05-011-1/+2
* aspeed/i2c: Fix DMA address maskCédric Le Goater2021-05-011-1/+1
* hw/i2c/aspeed_i2c: Simplify aspeed_i2c_get_bus()Philippe Mathieu-Daudé2020-07-161-2/+1
* aspeed/i2c: Prevent uninitialized warningMiroslav Rezanina2020-02-061-1/+1
* qdev: set properties with device_class_set_props()Marc-André Lureau2020-01-241-1/+1
* aspeed/i2c: Add trace eventsCédric Le Goater2019-12-161-13/+80
* aspeed/i2c: Add support for DMA transfersCédric Le Goater2019-12-161-3/+123
* aspeed/i2c: Check SRAM enablement on AST2500Cédric Le Goater2019-12-161-0/+37
* aspeed/i2c: Add support for pool buffer transfersCédric Le Goater2019-12-161-19/+178
* aspeed/i2c: Add AST2600 supportCédric Le Goater2019-10-151-2/+44
* aspeed/i2c: Introduce an object class per SoCCédric Le Goater2019-10-151-8/+52
* Include migration/vmstate.h lessMarkus Armbruster2019-08-161-0/+1
* Include hw/irq.h a lot lessMarkus Armbruster2019-08-161-0/+1
* Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster2019-06-121-0/+1