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path: root/hw/i386/intel_iommu.c (follow)
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* intel_iommu: Simplify caching mode check with VFIO deviceZhenzhong Duan2025-10-051-34/+6
* intel_iommu: Enable Enhanced Set Root Table Pointer Support (ESRTPS)Zhenzhong Duan2025-10-051-1/+1
* intel-iommu: Move dma_translation to x86-iommuJoao Martins2025-10-051-3/+2
* intel_iommu: Add PRI operations supportCLEMENT MATHIEU--DRIF2025-10-051-0/+274
* intel_iommu: Declare registers for PRICLEMENT MATHIEU--DRIF2025-10-051-0/+55
* intel_iommu: Bypass barrier wait descriptorCLEMENT MATHIEU--DRIF2025-10-051-1/+7
* intel_iommu: Allow both Status Write and Interrupt Flag in QI waitDavid Woodhouse2025-08-011-6/+9
* intel_iommu: Add support for ATSCLEMENT MATHIEU--DRIF2025-07-151-0/+63
* intel_iommu: Set address mask when a translation fails and adjust W permissionCLEMENT MATHIEU--DRIF2025-07-151-3/+9
* intel_iommu: Return page walk level even when the translation failsCLEMENT MATHIEU--DRIF2025-07-151-9/+8
* intel_iommu: Implement the PCIIOMMUOps callbacks related to invalidations of ...CLEMENT MATHIEU--DRIF2025-07-151-0/+35
* intel_iommu: Implement vtd_get_iotlb_info from PCIIOMMUOpsCLEMENT MATHIEU--DRIF2025-07-151-0/+10
* intel_iommu: Declare supported PASID sizeCLEMENT MATHIEU--DRIF2025-07-151-1/+1
* intel_iommu: Fill the PASID field when creating an IOMMUTLBEntryCLEMENT MATHIEU--DRIF2025-07-151-0/+3
* intel_iommu: Take locks when looking for and creating address spacesCLEMENT MATHIEU--DRIF2025-05-141-1/+24
* intel_iommu: Use BQL_LOCK_GUARD to manage cleanup automaticallyCLEMENT MATHIEU--DRIF2025-05-141-9/+1
* qom: Have class_init() take a const data argumentPhilippe Mathieu-Daudé2025-04-251-2/+2
* cleanup: Drop pointless return at end of functionMarkus Armbruster2025-04-241-2/+0
* Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu ...Stefan Hajnoczi2025-02-221-3/+9
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| * hw/i386/intel-iommu: Migrate to 3-phase resetEric Auger2025-02-211-3/+9
* | hw/i386: Have X86_IOMMU devices inherit from DYNAMIC_SYS_BUS_DEVICEPhilippe Mathieu-Daudé2025-02-161-2/+0
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* intel_iommu: Introduce a property to control FS1GP cap bit settingZhenzhong Duan2025-01-151-1/+4
* intel_iommu: Introduce a property x-flts for stage-1 translationZhenzhong Duan2025-01-151-9/+19
* intel_iommu: piotlb invalidation should notify unmapZhenzhong Duan2025-01-151-9/+34
* intel_iommu: Add support for PASID-based device IOTLB invalidationClément Mathieu--Drif2025-01-151-0/+50
* intel_iommu: Add an internal API to find an address space with PASIDClément Mathieu--Drif2025-01-151-15/+23
* intel_iommu: Process PASID-based iotlb invalidationZhenzhong Duan2025-01-151-0/+43
* intel_iommu: Flush stage-1 cache in iotlb invalidationZhenzhong Duan2025-01-151-6/+21
* intel_iommu: Set accessed and dirty bits during stage-1 translationClément Mathieu--Drif2025-01-151-1/+24
* intel_iommu: Check stage-1 translation result with interrupt rangeZhenzhong Duan2025-01-151-23/+25
* intel_iommu: Check if the input address is canonicalClément Mathieu--Drif2025-01-151-0/+23
* intel_iommu: Implement stage-1 translationYi Liu2025-01-151-4/+154
* intel_iommu: Rename slpte to pteYi Liu2025-01-151-64/+65
* intel_iommu: Flush stage-2 cache in PASID-selective PASID-based iotlb invalid...Zhenzhong Duan2025-01-151-1/+84
* intel_iommu: Add a placeholder variable for scalable mode stage-1 translationZhenzhong Duan2025-01-151-5/+18
* intel_iommu: Make pasid entry type check accurateZhenzhong Duan2025-01-151-8/+4
* intel_iommu: Use the latest fault reasons defined by specYu Zhang2025-01-151-9/+16
* Merge tag 'exec-20241220' of https://github.com/philmd/qemu into stagingStefan Hajnoczi2024-12-211-3/+3
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| * include: Rename sysemu/ -> system/Philippe Mathieu-Daudé2024-12-201-3/+3
* | include/hw/qdev-properties: Remove DEFINE_PROP_END_OF_LISTRichard Henderson2024-12-191-1/+0
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* hw/i386: Constify all PropertyRichard Henderson2024-12-151-1/+1
* intel_iommu: Add missed reserved bit check for IEC descriptorZhenzhong Duan2024-11-041-0/+8
* intel_iommu: Add missed sanity check for 256-bit invalidation queueZhenzhong Duan2024-11-041-22/+58
* intel_iommu: Send IQE event when setting reserved bit in IQT_TAILZhenzhong Duan2024-11-041-0/+1
* intel_iommu: Introduce property "stale-tm" to control Transient Mapping (TM) ...Zhenzhong Duan2024-11-041-3/+4
* hw: Use device_class_set_legacy_reset() instead of opencodingPeter Maydell2024-09-131-1/+1
* intel_iommu: Make PASID-cache and PIOTLB type invalid in legacy modeZhenzhong Duan2024-09-111-11/+11
* intel_iommu: Fix invalidation descriptor type fieldZhenzhong Duan2024-09-111-1/+1
* intel_iommu: Fix for IQA reg read dropped DW fieldyeeli2024-08-011-1/+3
* Merge tag 'hw-misc-20240723' of https://github.com/philmd/qemu into stagingRichard Henderson2024-07-241-24/+33
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