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path: root/hw/intc/pnv_xive2.c (follow)
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* ppc/pnv: Add PnvChipClass handler to get reference to interrupt controllerAditya Gupta2025-09-281-2/+2
* ppc/xive: Change presenter .match_nvt to match not presentNicholas Piggin2025-07-211-8/+8
* ppc/xive2: add interrupt priority configuration flagsGlenn Miles2025-07-211-4/+12
* pnv/xive2: Permit valid writes to VC/PC Flush Control registersMichael Kowal2025-07-211-4/+32
* pnv/xive2: VC_ENDC_WATCH_SPEC regs should read back WATCH_FULLNicholas Piggin2025-07-211-1/+0
* pnv/xive2: Print value in invalid register write loggingMichael Kowal2025-07-211-8/+16
* ppc/xive2: Use fair irq target search algorithmGlenn Miles2025-07-211-2/+16
* ppc/xive2: Reset Generation Flipped bit on END Cache WatchMichael Kowal2025-07-211-1/+2
* ppc/xive2: Remote VSDs need to match on forwarding addressMichael Kowal2025-07-211-8/+18
* qom: Make InterfaceInfo[] uses constPhilippe Mathieu-Daudé2025-04-251-1/+1
* qom: Have class_init() take a const data argumentPhilippe Mathieu-Daudé2025-04-251-1/+1
* ppc/xive2: Support crowd-matching when looking for targetFrederic Barrat2025-03-111-6/+6
* ppc/xive2: Add support for MMIO operations on the NVPG/NVC BARFrederic Barrat2025-03-111-14/+66
* ppc/xive2: Add undelivered group interrupt to backlogFrederic Barrat2025-03-111-0/+42
* ppc/xive2: Support group-matching when looking for targetFrederic Barrat2025-03-111-13/+25
* Merge tag 'exec-20241220' of https://github.com/philmd/qemu into stagingStefan Hajnoczi2024-12-211-4/+4
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| * include: Rename sysemu/ -> system/Philippe Mathieu-Daudé2024-12-201-4/+4
* | include/hw/qdev-properties: Remove DEFINE_PROP_END_OF_LISTRichard Henderson2024-12-191-1/+0
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* hw/intc: Constify all PropertyRichard Henderson2024-12-151-1/+1
* ppc/xive2: Dump the VP-group and crowd tables with 'info pic'Frederic Barrat2024-11-041-3/+41
* pnv/xive2: Move xive2_nvp_pic_print_info() to xive2.cFrederic Barrat2024-07-261-27/+0
* pnv/xive2: Fail VST entry address computation if table has no VSDFrederic Barrat2024-07-261-0/+5
* pnv/xive2: Set Translation Table for the NVC port spaceFrederic Barrat2024-07-261-0/+1
* pnv/xive2: Enable VST NVG and NVC index compressionFrederic Barrat2024-07-261-0/+20
* pnv/xive2: Configure Virtualization Structure Tables through the PCFrederic Barrat2024-07-261-9/+38
* pnv/xive2: Add NVG and NVC to cache watch facilityFrederic Barrat2024-07-261-11/+38
* pnv/xive: Support cache flush and queue sync inject with notificationsNicholas Piggin2024-07-261-2/+152
* pnv/xive2: Structure/define alignment changesMichael Kowal2024-07-261-15/+15
* pnv/xive2: XIVE2 Cache Watch, Cache Flush and Sync Injection supportFrederic Barrat2024-07-261-36/+215
* hw/ppc: Avoid using Monitor in pnv_xive2_pic_print_info()Philippe Mathieu-Daudé2024-06-191-8/+1
* hw/ppc: Avoid using Monitor in xive2_nvp_pic_print_info()Philippe Mathieu-Daudé2024-06-191-14/+15
* hw/ppc: Avoid using Monitor in xive2_end_pic_print_info()Philippe Mathieu-Daudé2024-06-191-4/+4
* hw/ppc: Avoid using Monitor in xive2_end_eas_pic_print_info()Philippe Mathieu-Daudé2024-06-191-5/+5
* hw/ppc: Avoid using Monitor in xive2_eas_pic_print_info()Philippe Mathieu-Daudé2024-06-191-8/+8
* hw/ppc: Avoid using Monitor in xive_source_pic_print_info()Philippe Mathieu-Daudé2024-06-191-1/+7
* ppc/xive: Use address_space routines to access the machine RAMCédric Le Goater2023-09-061-4/+23
* pnv/xive2: Always pass a presenter object when accessing the TIMAFrederic Barrat2023-07-071-2/+4
* pnv/xive2: Fix TIMA offset for indirect accessFrederic Barrat2023-07-071-2/+18
* pnv/xive2: Allow indirect TIMA accesses of all sizesFrederic Barrat2023-07-071-2/+2
* pnv/xive2: Check TIMA special ops against a dedicated array for P10Frederic Barrat2023-06-251-32/+0
* pnv/xive2: Add a get_config() method on the presenter classFrederic Barrat2023-06-251-0/+12
* pnv/xive2: Quiet down some error messagesFrederic Barrat2023-06-101-0/+4
* pnv/xive2: Handle TIMA access through all portsFrederic Barrat2023-06-101-0/+4
* pnv/xive2: Allow writes to the Physical Thread Enable registersFrederic Barrat2023-06-101-0/+1
* pnv/xive2: Add definition for the ESB cache configuration registerFrederic Barrat2023-06-101-0/+7
* pnv/xive2: Add definition for TCTXT Config registerFrederic Barrat2023-06-101-1/+7
* include/hw/ppc: Split pnv_chip.h off pnv.hMarkus Armbruster2023-01-201-0/+1
* ppc: Define SETFIELD for the ppc targetAlexey Kardashevskiy2022-07-061-20/+0
* pnv/xive2: Access direct mapped thread contexts from all chipsFrederic Barrat2022-06-201-4/+14
* pnv/xive2: Don't overwrite PC registers when writing TCTXT registersFrederic Barrat2022-05-261-3/+0