| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ppc: Define SETFIELD for the ppc target | Alexey Kardashevskiy | 2022-07-06 | 1 | -20/+0 |
| * | pnv/xive2: Access direct mapped thread contexts from all chips | Frederic Barrat | 2022-06-20 | 1 | -4/+14 |
| * | pnv/xive2: Don't overwrite PC registers when writing TCTXT registers | Frederic Barrat | 2022-05-26 | 1 | -3/+0 |
| * | pnv/xive2: Add support for 8bits thread id | Cédric Le Goater | 2022-03-02 | 1 | -0/+5 |
| * | pnv/xive2: Add support for automatic save&restore | Cédric Le Goater | 2022-03-02 | 1 | -1/+17 |
| * | xive2: Add a get_config() handler for the router configuration | Cédric Le Goater | 2022-03-02 | 1 | -0/+13 |
| * | pnv/xive2: Add support XIVE2 P9-compat mode (or Gen1) | Cédric Le Goater | 2022-03-02 | 1 | -5/+17 |
| * | ppc/pnv: add XIVE Gen2 TIMA support | Cédric Le Goater | 2022-03-02 | 1 | -2/+25 |
| * | pnv/xive2: Introduce new capability bits | Cédric Le Goater | 2022-03-02 | 1 | -2/+2 |
| * | ppc/xive: Add support for PQ state bits offload | Cédric Le Goater | 2022-03-02 | 1 | -3/+34 |
| * | ppc/pnv: Add a XIVE2 controller to the POWER10 chip | Cédric Le Goater | 2022-03-02 | 1 | -0/+2028 |