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path: root/hw/intc/riscv_aclint.c (follow)
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* hw/intc: Constify VMStateRichard Henderson2023-12-291-1/+1
* accel/tcg: Replace CPUState.env_ptr with cpu_env()Richard Henderson2023-10-041-6/+6
* hw/intc: Make rtc variable names consistentJason Chien2023-09-111-3/+3
* hw/intc: Fix upper/lower mtime write calculationJason Chien2023-09-111-2/+3
* hw: intc: Use cpu_by_arch_id to fetch CPU stateMayuresh Chitale2023-03-051-8/+8
* hw/intc: Move mtimer/mtimecmp to aclintAtish Patra2022-09-071-14/+34
* Fix 'writeable' typosPeter Maydell2022-06-081-1/+1
* hw/intc: Pass correct hartid while updating mtimecmpAtish Patra2022-05-241-1/+2
* hw/intc: riscv_aclint: Add reset function of ACLINT devicesJim Shu2022-04-221-0/+39
* hw/intc: Make RISC-V ACLINT mtime MMIO register writableFrank Chang2022-04-221-21/+50
* hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RISC-V ACLINTFrank Chang2022-04-221-15/+27
* hw/intc: Add .impl.[min|max]_access_size declaration in RISC-V ACLINTFrank Chang2022-04-221-0/+4
* Use g_new() & friends where that makes obvious senseMarkus Armbruster2022-03-211-3/+3
* hw/intc: Upgrade the SiFive CLINT implementation to RISC-V ACLINTAnup Patel2021-09-211-114/+259
* hw/intc: Rename sifive_clint sources to riscv_aclint sourcesAnup Patel2021-09-211-0/+315