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* hw/intc/ioapic: Update KVM routes before redelivering IRQ, on RTE updateDavid Woodhouse2023-03-151-2/+1
* hw/intc/i8259: Implement legacy LTIM Edge/Level Bank SelectDavid Woodhouse2023-03-082-7/+27
* hw/mips: Declare all length properties as unsignedPhilippe Mathieu-Daudé2023-03-081-2/+2
* hw: intc: Use cpu_by_arch_id to fetch CPU stateMayuresh Chitale2023-03-053-13/+13
* hw/intc/i8259: Document i8259_init()Philippe Mathieu-Daudé2023-02-271-2/+2
* hw: Move ioapic*.h to intc/Bernhard Beschow2023-02-274-5/+123
* hw/intc/armv7m_nvic: Use QOM cast CPU() macroPhilippe Mathieu-Daudé2023-02-271-3/+3
* target/arm: Wrap arm_rebuild_hflags calls with tcg_enabledFabiano Rosas2023-02-271-7/+13
* target/arm: Store CPUARMState::nvic as NVICState*Philippe Mathieu-Daudé2023-02-161-25/+13
* target/arm: Mark up sysregs for HFGRTR bits 36..63Peter Maydell2023-02-031-0/+2
* hvf: arm: Add support for GICv3Alexander Graf2023-02-031-1/+15
* Merge tag 'pull-include-2023-01-20' of https://repo.or.cz/qemu/armbru into st...Peter Maydell2023-01-202-0/+2
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| * include/hw/ppc: Split pnv_chip.h off pnv.hMarkus Armbruster2023-01-202-0/+2
* | Merge tag 'trivial-branch-for-8.0-pull-request' of https://gitlab.com/laurent...Peter Maydell2023-01-191-6/+6
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| * | hw/intc: Mark more interrupt-controller files as target independentThomas Huth2023-01-161-4/+4
| * | hw/intc: Move some files out of the target-specific source setPhilippe Mathieu-Daudé2023-01-161-2/+2
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* / bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plxPhilippe Mathieu-Daudé2023-01-184-20/+20
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* Merge tag 'mips-20230113' of https://github.com/philmd/qemu into stagingPeter Maydell2023-01-166-40/+68
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| * hw/intc: Extract the IRQ counting functions into a separate fileThomas Huth2023-01-135-33/+64
| * hw/intc/i8259: Make using the isa_pic singleton more type-safeBernhard Beschow2023-01-131-7/+4
* | hw/intc/xilinx_intc: Use 'XpsIntc' typedef instead of 'struct xlx_pic'Philippe Mathieu-Daudé2023-01-121-15/+13
* | hw/intc/omap_intc: Use CamelCase for TYPE_OMAP_INTC type namePhilippe Mathieu-Daudé2023-01-121-19/+19
* | hw/arm/omap: Drop useless casts from void * to pointerPhilippe Mathieu-Daudé2023-01-121-6/+6
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* Merge tag 'pull-loongarch-20230106' of https://gitlab.com/gaosong/qemu into s...Peter Maydell2023-01-072-7/+57
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| * hw/intc/loongarch_pch: Change default irq number of pch irq controllerTianrui Zhao2023-01-061-1/+2
| * hw/intc/loongarch_pch_pic: add irq number propertyTianrui Zhao2023-01-061-4/+30
| * hw/intc/loongarch_pch_msi: add irq number propertyTianrui Zhao2023-01-061-3/+26
* | hw/intc: sifive_plic: Fix the pending register range checkBin Meng2023-01-061-2/+3
* | hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0Bin Meng2023-01-061-2/+3
* | hw/intc: sifive_plic: Update "num-sources" property default valueBin Meng2023-01-061-1/+7
* | hw/intc: sifive_plic: Use error_setg() to propagate the error up via errp in ...Bin Meng2023-01-061-3/+4
* | hw/intc: sifive_plic: Improve robustness of the PLIC config parserBin Meng2023-01-061-8/+16
* | hw/intc: sifive_plic: Drop PLICMode_HBin Meng2023-01-061-1/+0
* | hw/intc: Select MSI_NONBROKEN in RISC-V AIA interrupt controllersBin Meng2023-01-061-0/+2
* | hw/riscv: Select MSI_NONBROKEN in SIFIVE_PLICBin Meng2023-01-061-0/+1
* | hw/intc: sifive_plic: fix out-of-bound access of source_priority arrayJim Shu2023-01-061-1/+11
* | hw/intc: sifive_plic: Renumber the S irqs for numa supportFrédéric Pétrot2023-01-061-2/+2
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* hw/intc/xics: Convert TYPE_ICS to 3-phase resetPeter Maydell2022-12-161-4/+5
* hw/intc/xics: Reset TYPE_ICS objects with device_cold_reset()Peter Maydell2022-12-161-1/+1
* hw/intc: Convert TYPE_KVM_ARM_ITS to 3-phase resetPeter Maydell2022-12-151-5/+9
* hw/intc: Convert TYPE_ARM_GICV3_ITS to 3-phase resetPeter Maydell2022-12-151-5/+9
* hw/intc: Convert TYPE_ARM_GICV3_ITS_COMMON to 3-phase resetPeter Maydell2022-12-151-3/+4
* hw/intc: Convert TYPE_KVM_ARM_GICV3 to 3-phase resetPeter Maydell2022-12-151-5/+9
* hw/intc: Convert TYPE_ARM_GICV3_COMMON to 3-phase resetPeter Maydell2022-12-151-3/+4
* hw/intc: Convert TYPE_ARM_GIC_KVM to 3-phase resetPeter Maydell2022-12-151-5/+9
* hw/intc: Convert TYPE_ARM_GIC_COMMON to 3-phase resetPeter Maydell2022-12-151-3/+4
* hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisementLuke Starrett2022-12-151-2/+2
* hw/intc: add implementation of GICD_IIDR to Arm GICAlex Bennée2022-11-211-1/+11
* hw/intc: clean-up access to GIC multi-byte registersAlex Bennée2022-11-211-6/+10
* hw/intc/arm_gicv3: fix prio masking on pmr writeJens Wiklander2022-11-141-2/+1