| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | hw/pci-bridge/cxl_upstream: Move defintion of device to header. | Jonathan Cameron | 2023-11-07 | 1 | -10/+1 |
| * | hw/cxl: CXLDVSECPortExtensions renamed to CXLDVSECPortExt | Jonathan Cameron | 2023-11-07 | 1 | -1/+1 |
| * | hw/pci-bridge/cxl-upstream: Add serial number extended capability support | Jonathan Cameron | 2023-10-04 | 1 | -2/+13 |
| * | hw/pci-bridge/cxl_upstream: Fix bandwidth entry base unit for SSLBIS | Dave Jiang | 2023-09-21 | 1 | -1/+1 |
| * | hw/pci-bridge/cxl_upstream.c: Use g_new0() in build_cdat_table() | Peter Maydell | 2023-08-03 | 1 | -4/+1 |
| * | hw/cxl: cdat: Fix failure to free buffer in erorr paths | Jonathan Cameron | 2023-05-19 | 1 | -0/+3 |
| * | pci: drop redundant PCIDeviceClass::is_bridge field | Igor Mammedov | 2022-12-21 | 1 | -1/+0 |
| * | hw/pci-bridge/cxl-upstream: Add a CDAT table access DOE | Jonathan Cameron | 2022-11-07 | 1 | -1/+194 |
| * | pci-bridge/cxl_upstream: Add a CXL switch upstream port | Jonathan Cameron | 2022-06-16 | 1 | -0/+216 |