| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | sysbus: Convert to sysbus_realize() etc. with Coccinelle | Markus Armbruster | 2020-06-15 | 1 | -1/+1 |
| * | qdev: Convert uses of qdev_create() with Coccinelle | Markus Armbruster | 2020-06-15 | 1 | -2/+3 |
| * | riscv: hw: Remove the unnecessary include of target/riscv/cpu.h | Bin Meng | 2019-09-17 | 1 | -1/+0 |
| * | riscv: hw: Change to use qemu_log_mask(LOG_GUEST_ERROR, ...) instead | Bin Meng | 2019-09-17 | 1 | -2/+3 |
| * | riscv: hw: Remove duplicated "hw/hw.h" inclusion | Bin Meng | 2019-09-17 | 1 | -1/+0 |
| * | riscv: sifive_test: Add reset functionality | Bin Meng | 2019-09-17 | 1 | -0/+4 |
| * | Include hw/qdev-properties.h less | Markus Armbruster | 2019-08-16 | 1 | -0/+1 |
| * | Include hw/hw.h exactly where needed | Markus Armbruster | 2019-08-16 | 1 | -0/+1 |
| * | Include qemu/module.h where needed, drop it from qemu-common.h | Markus Armbruster | 2019-06-12 | 1 | -0/+1 |
| * | SiFive RISC-V Test Finisher | Michael Clark | 2018-03-07 | 1 | -0/+93 |