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* | hw/xtensa/xtfpga: use qemu_create_nic_device()David Woodhouse2024-02-021-7/+6
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/sparc/sun4m: use qemu_find_nic_info()David Woodhouse2024-02-021-6/+14
| | | | | | | | | | | | | | | | Obtain the MAC address from the NIC configuration if there is one, or generate one explicitly so that it can be placed in the PROM. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/s390x/s390-virtio-ccw: use qemu_create_nic_device()David Woodhouse2024-02-021-9/+2
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Acked-by: Thomas Huth <thuth@redhat.com>
* | hw/riscv: use qemu_configure_nic_device()David Woodhouse2024-02-022-18/+3
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/openrisc/openrisc_sim: use qemu_create_nic_device()David Woodhouse2024-02-021-9/+9
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/net/lasi_i82596: use qemu_create_nic_device()David Woodhouse2024-02-022-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Create the device only if there is a corresponding NIC config for it. Remove the explicit check on nd_table[0].used from hw/hppa/machine.c which (since commit d8a3220005d7) tries to do the same thing. The lasi_82596 support has been disabled since it was first introduced, since enable_lasi_lan() has always been zero. This allows the user to enable it by explicitly requesting a NIC model 'lasi_82596' or just using the alias 'lasi'. Otherwise, it defaults to a PCI NIC as before. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/net/lasi_i82596: Re-enable buildDavid Woodhouse2024-02-022-1/+2
| | | | | | | | | | | | | | | | | | | | | | When converting to the shiny build-system-du-jour, a typo prevented the last_i82596 driver from being built. Correct the config option name to re-enable the build. And include "sysemu/sysemu.h" so it actually builds. Fixes: b1419fa66558 ("meson: convert hw/net") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2144 Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/mips/jazz: use qemu_find_nic_info()David Woodhouse2024-02-021-8/+7
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/mips/mipssim: use qemu_create_nic_device()David Woodhouse2024-02-021-6/+7
| | | | | | | | | | | | | | | | | | The MIPS SIM platform instantiates its NIC only if a corresponding configuration exists for it. Use qemu_create_nic_device() function for that. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/microblaze: use qemu_configure_nic_device()David Woodhouse2024-02-022-4/+2
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/m68k/q800: use qemu_find_nic_info()David Woodhouse2024-02-021-13/+16
| | | | | | | | | | | | | | | | | | | | | | | | If a corresponding NIC configuration was found, it will have a MAC address already assigned, so use that. Else, generate and assign a default one. Using qemu_find_nic_info() is simpler than the alternative of using qemu_configure_nic_device() and then having to fetch the "mac" property as a string and convert it. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/m68k/mcf5208: use qemu_create_nic_device()David Woodhouse2024-02-021-13/+6
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/net/etraxfs-eth: use qemu_configure_nic_device()David Woodhouse2024-02-022-8/+6
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/arm: use qemu_configure_nic_device()David Woodhouse2024-02-026-33/+10
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/arm/stellaris: use qemu_find_nic_info()David Woodhouse2024-02-021-8/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | Rather than just using qemu_configure_nic_device(), populate the MAC address in the system-registers device by peeking at the NICInfo before it's assigned to the device. Generate the MAC address early, if there is no matching -nic option. Otherwise the MAC address wouldn't be generated until net_client_init1() runs. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/arm/npcm7xx: use qemu_configure_nic_device, allow emc0/emc1 as aliasesDavid Woodhouse2024-02-021-7/+9
| | | | | | | | | | | | | | | | Also update the test to specify which device to attach the test socket to, and remove the comment lamenting the fact that we can't do so. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/arm/highbank: use qemu_create_nic_device()David Woodhouse2024-02-021-7/+5
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/net/lan9118: use qemu_configure_nic_device()David Woodhouse2024-02-025-12/+9
| | | | | | | | | | | | | | | | | | Some callers instantiate the device unconditionally, others will do so only if there is a NICInfo to go with it. This appears to be fairly random, but preseve the existing behaviour for now. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/net/smc91c111: use qemu_configure_nic_device()David Woodhouse2024-02-026-37/+22
| | | | | | | | | | | | | | | | | | Some callers instantiate the device unconditionally, others will do so only if there is a NICInfo to go with it. This appears to be fairly random, but preserve the existing behaviour of each caller for now. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/arm/fsl: use qemu_configure_nic_device()David Woodhouse2024-02-024-4/+4
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/arm/exynos4: use qemu_create_nic_device()David Woodhouse2024-02-021-4/+2
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/arm/aspeed: use qemu_configure_nic_device()David Woodhouse2024-02-021-5/+4
| | | | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Acked-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org>
* | hw/arm/allwinner: use qemu_configure_nic_device()David Woodhouse2024-02-023-35/+4
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/xtensa/virt: use pci_init_nic_devices()David Woodhouse2024-02-021-3/+1
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/sparc64/sun4u: use pci_init_nic_devices()David Woodhouse2024-02-021-19/+8
| | | | | | | | | | | | | | | | | | | | | | The first sunhme NIC gets placed a function 1 on slot 1 of PCI bus A, and the rest are dynamically assigned on PCI bus B. Previously, any PCI NIC would get the special treatment purely by virtue of being first in the list. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/sh4/r2d: use pci_init_nic_devices()David Woodhouse2024-02-021-4/+2
| | | | | | | | | | | | | | | | | | | | | | Previously, the first PCI NIC would be assigned to slot 2 even if the user override the model and made it something other than an rtl8139 which is the default. Everything else would be dynamically assigned. Now, the first rtl8139 gets slot 2 and everything else is dynamic. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
* | hw/ppc: use pci_init_nic_devices()David Woodhouse2024-02-024-18/+8
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/ppc/spapr: use qemu_get_nic_info() and pci_init_nic_devices()David Woodhouse2024-02-021-13/+5
| | | | | | | | | | | | | | | | | | | | | | Avoid directly referencing nd_table[] by first instantiating any spapr-vlan devices using a qemu_get_nic_info() loop, then calling pci_init_nic_devices() to do the rest. No functional change intended. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/ppc/prep: use pci_init_nic_devices()David Woodhouse2024-02-021-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, the first PCI NIC would be placed in PCI slot 3 and the rest would be dynamically assigned. Even if the user overrode the default NIC type and made it something other than PCNet. Now, the first PCNet NIC (that is, anything not explicitly specified to be anything different) will go to slot 3 even if it isn't the first NIC specified on the command line. And anything else will be dynamically assigned. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/mips/loongson3_virt: use pci_init_nic_devices()David Woodhouse2024-02-021-3/+1
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/mips/malta: use pci_init_nic_devices()David Woodhouse2024-02-021-12/+3
| | | | | | | | | | | | | | | | | | | | | | | | The Malta board setup code would previously place the first NIC into PCI slot 11 if was a PCNet card, and the rest (including the first if it was anything other than a PCNet card) would be dynamically assigned. Now it will place any PCNet NIC into slot 11, and then anything else will be dynamically assigned. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/mips/fuloong2e: use pci_init_nic_devices()David Woodhouse2024-02-021-13/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous behaviour was: *if* the first NIC specified on the command line was an RTL8139 (or unspecified model) then it gets assigned to PCI slot 7, which is where the Fuloong board had an RTL8139. All other devices (including the first, if it was specified as anything other than an rtl8319) get dynamically assigned on the bus. The new behaviour is subtly different: If the first NIC was given a specific model *other* than rtl8139, and a subsequent NIC was not, then the rtl8139 (or unspecified) NIC will go to slot 7 and the rest will be dynamically assigned. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/loongarch: use pci_init_nic_devices()David Woodhouse2024-02-021-3/+1
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Song Gao <gaosong@loongson.cn>
* | hw/hppa: use pci_init_nic_devices()David Woodhouse2024-02-021-5/+2
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/arm/virt: use pci_init_nic_devices()David Woodhouse2024-02-021-3/+1
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/arm/sbsa-ref: use pci_init_nic_devices()David Woodhouse2024-02-021-3/+1
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
* | hw/alpha/dp264: use pci_init_nic_devices()David Woodhouse2024-02-021-3/+1
| | | | | | | | | | Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | hw/xen: use qemu_create_nic_bus_devices() to instantiate Xen NICsDavid Woodhouse2024-02-026-49/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When instantiating XenBus itself, for each NIC which is configured with either the model unspecified, or set to to "xen" or "xen-net-device", create a corresponding xen-net-device for it. Now we can revert the previous more hackish version which relied on the platform code explicitly registering the NICs on its own XenBus, having returned the BusState* from xen_bus_init() itself. This also fixes the setup for Xen PV guests, which was previously broken in various ways and never actually managed to peer with the netdev. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Paul Durrant <paul@xen.org>
* | hw/i386/pc: use qemu_get_nic_info() and pci_init_nic_devices()David Woodhouse2024-02-021-12/+19
| | | | | | | | | | | | | | | | | | Eliminate direct access to nd_table[] and nb_nics by processing the the Xen and ISA NICs first and then calling pci_init_nic_devices() for the rest. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Paul Durrant <paul@xen.org>
* | hw/pci: add pci_init_nic_devices(), pci_init_nic_in_slot()David Woodhouse2024-02-021-0/+45
|/ | | | | | | | | | | | The loop over nd_table[] to add PCI NICs is repeated in quite a few places. Add a helper function to do it. Some platforms also try to instantiate a specific model in a specific slot, to match the real hardware. Add pci_init_nic_in_slot() for that purpose. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Paul Durrant <paul@xen.org>
* Merge tag 'pull-aspeed-20240201' of https://github.com/legoater/qemu into ↵Peter Maydell2024-02-0117-48/+1031
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging aspeed queue: * Update of buildroot images to 2023.11 (6.6.3 kernel) * Check of the valid CPU type supported by aspeed machines * Simplified models for the IBM's FSI bus and the Aspeed controller bridge # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmW7Sa8ACgkQUaNDx8/7 # 7KG7mw/8DbMJY6aqgq5YANszzem1ktJphPCNxq081cbczCOUpCNX4aL+0/ANvxxD # lbJQB+SZeIRmuFbxYPhq68rtzB4vG7tsQpns4H33EPKT4vuzF70lq4fgptMiun3q # 1ZJ2LF3jonvQWdhbC17wzAQz0FFb4F7XOxz++UL4okPsgzsYItnd+TWs8q7+erRb # 84UwN+eBTBAl/FiNk679/tBTqAfCVGgQ7dzotr4f3tg5POvrGOrlEjAn0O+dGGDj # wgILmpEBsTsilRB1tz8Kw0j/v/VkHz1DJu45lRAV9CIrN22iKcjMilNGgNDT8kcI # yAlxAw3iN+hVFqDov8wFPjDYd/Qw2oRAPy2Kd14hW9xL8zBOTms1JK5L0PS2+Feo # ZjMJ2cOJq3t4Wt1ZXRhgHfF4ANwP0OZ/y9bHCy3CkBljEeiTQbikHP9gVV4qHXZH # 4Q0HnDZQwAgobw3CmZ8jVx1dQueqy3ycuvkhCyv3S0l/tdbtXDtr5pNNu3dAP/PJ # 3nifLdRImhDvxxO9GKaCdUVLzELzMJl0GrgAsVJPKVnKHA4IiVKmB+XcW9IUbfy/ # 3zA2wHJLrEF+MF6MsuNcEYCCqUvyNLm7rUrXk1wNLXpCJ35bbW5IYy7Ty/8E2GHb # D5Cv/EPNhMBiNA4+HqQlMOTC13Ozv2qwCuWYCh2Ik8mnzaEiyTo= # =0C5S # -----END PGP SIGNATURE----- # gpg: Signature made Thu 01 Feb 2024 07:35:11 GMT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20240201' of https://github.com/legoater/qemu: hw/fsi: Update MAINTAINER list hw/fsi: Added FSI documentation hw/fsi: Added qtest hw/arm: Hook up FSI module in AST2600 hw/fsi: Aspeed APB2OPB & On-chip peripheral bus hw/fsi: Introduce IBM's FSI master hw/fsi: Introduce IBM's cfam hw/fsi: Introduce IBM's fsi-slave model hw/fsi: Introduce IBM's FSI Bus hw/fsi: Introduce IBM's scratchpad device hw/fsi: Introduce IBM's Local bus hw/arm/aspeed: Check for CPU types in machine_run_board_init() hw/arm/aspeed: Introduce aspeed_soc_cpu_type() helper hw/arm/aspeed: Init CPU defaults in a common helper hw/arm/aspeed: Set default CPU count using aspeed_soc_num_cpus() hw/arm/aspeed: Remove dead code tests/avocado/machine_aspeed.py: Update buildroot images to 2023.11 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm: Hook up FSI module in AST2600Ninad Palsule2024-02-011-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patchset introduces IBM's Flexible Service Interface(FSI). Time for some fun with inter-processor buses. FSI allows a service processor access to the internal buses of a host POWER processor to perform configuration or debugging. FSI has long existed in POWER processes and so comes with some baggage, including how it has been integrated into the ASPEED SoC. Working backwards from the POWER processor, the fundamental pieces of interest for the implementation are: 1. The Common FRU Access Macro (CFAM), an address space containing various "engines" that drive accesses on buses internal and external to the POWER chip. Examples include the SBEFIFO and I2C masters. The engines hang off of an internal Local Bus (LBUS) which is described by the CFAM configuration block. 2. The FSI slave: The slave is the terminal point of the FSI bus for FSI symbols addressed to it. Slaves can be cascaded off of one another. The slave's configuration registers appear in address space of the CFAM to which it is attached. 3. The FSI master: A controller in the platform service processor (e.g. BMC) driving CFAM engine accesses into the POWER chip. At the hardware level FSI is a bit-based protocol supporting synchronous and DMA-driven accesses of engines in a CFAM. 4. The On-Chip Peripheral Bus (OPB): A low-speed bus typically found in POWER processors. This now makes an appearance in the ASPEED SoC due to tight integration of the FSI master IP with the OPB, mainly the existence of an MMIO-mapping of the CFAM address straight onto a sub-region of the OPB address space. 5. An APB-to-OPB bridge enabling access to the OPB from the ARM core in the AST2600. Hardware limitations prevent the OPB from being directly mapped into APB, so all accesses are indirect through the bridge. The implementation appears as following in the qemu device tree: (qemu) info qtree bus: main-system-bus type System ... dev: aspeed.apb2opb, id "" gpio-out "sysbus-irq" 1 mmio 000000001e79b000/0000000000001000 bus: opb.1 type opb dev: fsi.master, id "" bus: fsi.bus.1 type fsi.bus dev: cfam.config, id "" dev: cfam, id "" bus: fsi.lbus.1 type lbus dev: scratchpad, id "" address = 0 (0x0) bus: opb.0 type opb dev: fsi.master, id "" bus: fsi.bus.0 type fsi.bus dev: cfam.config, id "" dev: cfam, id "" bus: fsi.lbus.0 type lbus dev: scratchpad, id "" address = 0 (0x0) The LBUS is modelled to maintain the qdev bus hierarchy and to take advantage of the object model to automatically generate the CFAM configuration block. The configuration block presents engines in the order they are attached to the CFAM's LBUS. Engine implementations should subclass the LBusDevice and set the 'config' member of LBusDeviceClass to match the engine's type. CFAM designs offer a lot of flexibility, for instance it is possible for a CFAM to be simultaneously driven from multiple FSI links. The modeling is not so complete; it's assumed that each CFAM is attached to a single FSI slave (as a consequence the CFAM subclasses the FSI slave). As for FSI, its symbols and wire-protocol are not modelled at all. This is not necessary to get FSI off the ground thanks to the mapping of the CFAM address space onto the OPB address space - the models follow this directly and map the CFAM memory region into the OPB's memory region. Future work includes supporting more advanced accesses that drive the FSI master directly rather than indirectly via the CFAM mapping, which will require implementing the FSI state machine and methods for each of the FSI symbols on the slave. Further down the track we can also look at supporting the bitbanged SoftFSI drivers in Linux by extending the FSI slave model to resolve sequences of GPIO IRQs into FSI symbols, and calling the associated symbol method on the slave to map the access onto the CFAM. Testing: Tested by reading cfam config address 0 on rainier machine type. root@p10bmc:~# pdbg -a getcfam 0x0 p0: 0x0 = 0xc0022d15 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * hw/fsi: Aspeed APB2OPB & On-chip peripheral busNinad Palsule2024-02-015-0/+376
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a part of patchset where IBM's Flexible Service Interface is introduced. An APB-to-OPB bridge enabling access to the OPB from the ARM core in the AST2600. Hardware limitations prevent the OPB from being directly mapped into APB, so all accesses are indirect through the bridge. The On-Chip Peripheral Bus (OPB): A low-speed bus typically found in POWER processors. This now makes an appearance in the ASPEED SoC due to tight integration of the FSI master IP with the OPB, mainly the existence of an MMIO-mapping of the CFAM address straight onto a sub-region of the OPB address space. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [ clg: - moved FSIMasterState under AspeedAPB2OPBState - modified fsi_opb_fsi_master_address() and fsi_opb_opb2fsi_address() - instroduced fsi_aspeed_apb2opb_init() - reworked fsi_aspeed_apb2opb_realize() - removed FSIMasterState object and fsi_opb_realize() - simplified OPBus - introduced fsi_aspeed_apb2opb_rw to fix endianness issue ] Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * hw/fsi: Introduce IBM's FSI masterNinad Palsule2024-02-013-1/+173
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a part of patchset where IBM's Flexible Service Interface is introduced. This commit models the FSI master. CFAM is hanging out of FSI master which is a bus controller. The FSI master: A controller in the platform service processor (e.g. BMC) driving CFAM engine accesses into the POWER chip. At the hardware level FSI is a bit-based protocol supporting synchronous and DMA-driven accesses of engines in a CFAM. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [ clg: - move FSICFAMState object under FSIMasterState - introduced fsi_master_init() - reworked fsi_master_realize() - dropped FSIBus definition ] Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * hw/fsi: Introduce IBM's cfamNinad Palsule2024-02-013-1/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a part of patchset where IBM's Flexible Service Interface is introduced. The Common FRU Access Macro (CFAM), an address space containing various "engines" that drive accesses on busses internal and external to the POWER chip. Examples include the SBEFIFO and I2C masters. The engines hang off of an internal Local Bus (LBUS) which is described by the CFAM configuration block. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [ clg: - moved object FSIScratchPad under FSICFAMState - moved FSIScratchPad code under cfam.c - introduced fsi_cfam_instance_init() - reworked fsi_cfam_realize() ] Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * hw/fsi: Introduce IBM's fsi-slave modelNinad Palsule2024-02-012-2/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a part of patchset where IBM's Flexible Service Interface is introduced. The FSI slave: The slave is the terminal point of the FSI bus for FSI symbols addressed to it. Slaves can be cascaded off of one another. The slave's configuration registers appear in address space of the CFAM to which it is attached. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * hw/fsi: Introduce IBM's FSI BusNinad Palsule2024-02-012-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a part of patchset where FSI bus is introduced. The FSI bus is a simple bus where FSI master is attached. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [ clg: - removed include/hw/fsi/engine-scratchpad.h and hw/fsi/engine-scratchpad.c - dropped FSI_SCRATCHPAD - included FSIBus definition - dropped hw/fsi/trace-events changes ] Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * hw/fsi: Introduce IBM's scratchpad deviceNinad Palsule2024-02-012-2/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a part of patchset where IBM's Flexible Service Interface is introduced. The scratchpad provides a set of non-functional registers. The firmware is free to use them, hardware does not support any special management support. The scratchpad registers can be read or written from LBUS slave. The scratch pad is managed under FSI CFAM state. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [ clg: - moved object FSIScratchPad under FSICFAMState - moved FSIScratchPad code under cfam.c ] Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * hw/fsi: Introduce IBM's Local busNinad Palsule2024-02-017-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a part of patchset where IBM's Flexible Service Interface is introduced. The LBUS is modelled to maintain mapped memory for the devices. The memory is mapped after CFAM config, peek table and FSI slave registers. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Ninad Palsule <ninad@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [ clg: - removed lbus_add_device() bc unused - removed lbus_create_device() bc used only once - removed "address" property - updated meson.build to build fsi dir - included an empty hw/fsi/trace-events ] Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * hw/arm/aspeed: Check for CPU types in machine_run_board_init()Philippe Mathieu-Daudé2024-02-015-5/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Aspeed SoCs use a single CPU type (set as AspeedSoCClass::cpu_type). Convert it to a NULL-terminated array (of a single non-NULL element). Set MachineClass::valid_cpu_types[] to use the common machine code to provide hints when the requested CPU is invalid (see commit e702cbc19e ("machine: Improve is_cpu_type_supported()"). Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Gavin Shan <gshan@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>