summary refs log tree commit diff stats
path: root/include/exec/cpu-all.h (follow)
Commit message (Collapse)AuthorAgeFilesLines
* exec: Restrict inclusion of 'user/guest-base.h'Philippe Mathieu-Daudé2024-04-261-3/+0
| | | | | | | | | | | | | | | | Declare 'have_guest_base' in "user/guest-base.h". Very few files require this header, so explicitly include it there instead of "exec/cpu-all.h" which is used in many source files. Assert this user-specific header is only included from user emulation. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231211212003.21686-23-philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng>
* exec: Rename 'exec/user/guest-base.h' as 'user/guest-base.h'Philippe Mathieu-Daudé2024-04-261-1/+1
| | | | | | | | | The include/user/ directory contains the user-emulation specific headers. Move guest-base.h there too. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20240418192525.97451-15-philmd@linaro.org>
* exec: Move [b]tswapl() declarations to 'exec/user/tswap-target.h'Philippe Mathieu-Daudé2024-04-261-8/+0
| | | | | | | | | | | tswapl() and bswaptls() are target-dependent and only used by user emulation. Move their definitions to a new header: "exec/user/tswap-target.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-17-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* exec/cpu-all: Remove unused tswapls() definitionsPhilippe Mathieu-Daudé2024-04-261-2/+0
| | | | | | | | | | Last use of tswapls() was removed 2 years ago in commit aee14c77f4 ("linux-user: Rewrite do_getdents, do_getdents64"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-15-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* exec/cpu-all: Remove unused 'qemu/thread.h' headerPhilippe Mathieu-Daudé2024-04-261-1/+0
| | | | | | | | | Nothing is required from "qemu/thread.h" in "exec/cpu-all.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20231212123401.37493-13-philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* exec/cpu-all: Reduce 'qemu/rcu.h' header inclusionPhilippe Mathieu-Daudé2024-04-261-1/+0
| | | | | | | | | "exec/cpu-all.h" doesn't need definitions from "qemu/rcu.h", however "exec/ram_addr.h" does. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231211212003.21686-17-philmd@linaro.org>
* exec: Include 'cpu.h' before validating CPUArchState placementPhilippe Mathieu-Daudé2024-04-261-0/+1
| | | | | | | | | CPUArchState 'env' field is defined within the ArchCPU structure, so we need to include each target "cpu.h" header which defines it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Message-Id: <20231211212003.21686-2-philmd@linaro.org>
* accel/tcg: Add TLB_CHECK_ALIGNEDRichard Henderson2024-03-051-1/+3
| | | | | | | | | This creates a per-page method for checking of alignment. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240301204110.656742-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* include/exec: Change cpu_mmu_index argument to CPUStateRichard Henderson2024-02-031-1/+1
| | | | | Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* include/exec: Implement cpu_mmu_index genericallyRichard Henderson2024-02-031-0/+4
| | | | | | | | For user-only mode, use MMU_USER_IDX. For system mode, use CPUClass.mmu_index. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* include/exec: Move cpu_*()/cpu_env() to common headerAnton Johansson2024-01-291-25/+0
| | | | | | | | | | Functions are target independent. Signed-off-by: Anton Johansson <anjo@rev.ng> Message-Id: <20240119144024.14289-17-anjo@rev.ng> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* include/exec: Move PAGE_* macros to common headerAnton Johansson2024-01-291-24/+0
| | | | | | | | | | These don't vary across targets and are used in soon-to-be common code (cputlb.c). Signed-off-by: Anton Johansson <anjo@rev.ng> Message-Id: <20240119144024.14289-15-anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Restrict dump_exec_info() declarationPhilippe Mathieu-Daudé2023-10-041-5/+0
| | | | | | | | | | | In commit 00c9a5c2c3 ("accel/tcg: Restrict 'qapi-commands-machine.h' to system emulation") we moved the definition to accel/tcg/ which is where this function is called. No need to expose it outside. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230914185718.76241-4-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* exec: Make EXCP_FOO definitions target agnosticPhilippe Mathieu-Daudé2023-10-041-7/+0
| | | | | | | | | | The EXCP_* definitions don't need to be target specific, move them to "exec/cpu-common.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230914185718.76241-2-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Remove env_tlb()Anton Johansson2023-10-041-11/+0
| | | | | | | | | | | | The function is no longer used to access the TLB, and has been replaced by cpu->neg.tlb. Signed-off-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230912153428.17816-9-anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> [rth: Merge comment update patch] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Remove env_neg()Richard Henderson2023-10-041-12/+1
| | | | | | | | Replace the single use within env_tlb() and remove. Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Remove cpu_set_cpustate_pointersRichard Henderson2023-10-041-10/+0
| | | | | | | | | This function is now empty, so remove it. In the case of m68k and tricore, this empties the class instance initfn, so remove those as well. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Replace CPUState.env_ptr with cpu_env()Richard Henderson2023-10-041-1/+0
| | | | | Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Remove cpu_neg()Richard Henderson2023-10-031-11/+0
| | | | | | | | Now that CPUNegativeOffsetState is part of CPUState, we can reference it directly. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Remove CPUState.icount_decr_ptrRichard Henderson2023-10-031-1/+0
| | | | | | | We can now access icount_decr directly. Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Move CPUNegativeOffsetState into CPUStateRichard Henderson2023-10-031-13/+9
| | | | | | | | Retain the separate structure to emphasize its importance. Enforce CPUArchState always follows CPUState without padding. Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Validate placement of CPUNegativeOffsetStateRichard Henderson2023-10-031-0/+6
| | | | | | | | Verify that the distance between CPUNegativeOffsetState and CPUArchState is no greater than any alignment requirements. Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Restrict tcg_exec_[un]realizefn() to TCGPhilippe Mathieu-Daudé2023-10-031-2/+0
| | | | | | | | | | | We don't need to expose these TCG-specific methods to the whole code base. Register them as AccelClass handlers, they will be called by the generic accel_cpu_[un]realize() methods. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20231003123026.99229-8-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Have tcg_exec_realizefn() return a booleanPhilippe Mathieu-Daudé2023-10-031-1/+1
| | | | | | | | | | | Following the example documented since commit e3fe3988d7 ("error: Document Error API usage rules"), have tcg_exec_realizefn() return a boolean indicating whether an error is set or not. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20231003123026.99229-7-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* include/exec: Widen tlb_hit/tlb_hit_page()Anton Johansson2023-08-241-2/+2
| | | | | | | | | | tlb_addr is changed from target_ulong to uint64_t to match the type of a CPUTLBEntry value, and the addressed is changed to vaddr. Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230807155706.9580-8-anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Return bool from page_check_rangeRichard Henderson2023-07-151-1/+12
| | | | | | | | | Replace the 0/-1 result with true/false. Invert the sense of the test of all callers. Document the function. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230707204054.8792-25-richard.henderson@linaro.org>
* accel/tcg: Introduce page_find_range_emptyRichard Henderson2023-07-151-0/+15
| | | | | | | Use the interval tree to locate an unused range in the VM. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230707204054.8792-17-richard.henderson@linaro.org>
* accel/tcg: Introduce page_check_range_emptyRichard Henderson2023-07-151-0/+12
| | | | | | | | | Examine the interval tree to validate that a region has no existing mappings. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230707204054.8792-10-richard.henderson@linaro.org>
* plugins: force slow path when plugins instrument memory opsAlex Bennée2023-07-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lack of SVE memory instrumentation has been an omission in plugin handling since it was introduced. Fortunately we can utilise the probe_* functions to force all all memory access to follow the slow path. We do this by checking the access type and presence of plugin memory callbacks and if set return the TLB_MMIO flag. We have to jump through a few hoops in user mode to re-use the flag but it was the desired effect: ./qemu-system-aarch64 -display none -serial mon:stdio \ -M virt -cpu max -semihosting-config enable=on \ -kernel ./tests/tcg/aarch64-softmmu/memory-sve \ -plugin ./contrib/plugins/libexeclog.so,ifilter=st1w,afilter=0x40001808 -d plugin gives (disas doesn't currently understand st1w): 0, 0x40001808, 0xe54342a0, ".byte 0xa0, 0x42, 0x43, 0xe5", store, 0x40213010, RAM, store, 0x40213014, RAM, store, 0x40213018, RAM And for user-mode: ./qemu-aarch64 \ -plugin contrib/plugins/libexeclog.so,afilter=0x4007c0 \ -d plugin \ ./tests/tcg/aarch64-linux-user/sha512-sve gives: 1..10 ok 1 - do_test(&tests[i]) 0, 0x4007c0, 0xa4004b80, ".byte 0x80, 0x4b, 0x00, 0xa4", load, 0x5500800370, load, 0x5500800371, load, 0x5500800372, load, 0x5500800373, load, 0x5500800374, load, 0x5500800375, load, 0x5500800376, load, 0x5500800377, load, 0x5500800378, load, 0x5500800379, load, 0x550080037a, load, 0x550080037b, load, 0x550080037c, load, 0x550080037d, load, 0x550080037e, load, 0x550080037f, load, 0x5500800380, load, 0x5500800381, load, 0x5500800382, load, 0x5500800383, load, 0x5500800384, load, 0x5500800385, load, 0x5500800386, lo ad, 0x5500800387, load, 0x5500800388, load, 0x5500800389, load, 0x550080038a, load, 0x550080038b, load, 0x550080038c, load, 0x550080038d, load, 0x550080038e, load, 0x550080038f, load, 0x5500800390, load, 0x5500800391, load, 0x5500800392, load, 0x5500800393, load, 0x5500800394, load, 0x5500800395, load, 0x5500800396, load, 0x5500800397, load, 0x5500800398, load, 0x5500800399, load, 0x550080039a, load, 0x550080039b, load, 0x550080039c, load, 0x550080039d, load, 0x550080039e, load, 0x550080039f, load, 0x55008003a0, load, 0x55008003a1, load, 0x55008003a2, load, 0x55008003a3, load, 0x55008003a4, load, 0x55008003a5, load, 0x55008003a6, load, 0x55008003a7, load, 0x55008003a8, load, 0x55008003a9, load, 0x55008003aa, load, 0x55008003ab, load, 0x55008003ac, load, 0x55008003ad, load, 0x55008003ae, load, 0x55008003af (4007c0 is the ld1b in the sha512-sve) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Cc: Robert Henry <robhenry@microsoft.com> Cc: Aaron Lindsay <aaron@os.amperecomputing.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230630180423.558337-20-alex.bennee@linaro.org>
* accel/tcg: Renumber TLB_DISCARD_WRITERichard Henderson2023-06-261-2/+2
| | | | | | | | Move to fill a hole in the set of bits. Reduce the total number of tlb bits by 1. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Move TLB_WATCHPOINT to TLB_SLOW_FLAGS_MASKRichard Henderson2023-06-261-4/+4
| | | | | | | | This frees up one bit of the primary tlb flags without impacting the TLB_NOTDIRTY logic. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Store some tlb flags in CPUTLBEntryFullRichard Henderson2023-06-261-4/+17
| | | | | | | | | | | | | | | We have run out of bits we can use within the CPUTLBEntry comparators, as TLB_FLAGS_MASK cannot overlap alignment. Store slow_flags[] in CPUTLBEntryFull, and merge with the flags from the comparator. A new TLB_FORCE_SLOW bit is set within the comparator as an indication that the slow path must be used. Move TLB_BSWAP to TLB_SLOW_FLAGS_MASK. Since we are out of bits, we cannot create a new bit without moving an old one. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Move TLB_FLAGS_MASK check out of get_alignment_bitsRichard Henderson2023-06-051-0/+3
| | | | | | | | | | The replacement isn't ideal, as the raw count of bits is not easily synced with exec/cpu-all.h, but it does remove from tcg.h the target dependency on TARGET_PAGE_BITS_MIN which is built into TLB_FLAGS_MASK. Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Split out exec/user/guest-base.hRichard Henderson2023-05-161-4/+1
| | | | | | | | TCG will need this declaration, without all of the other bits that come with cpu-all.h. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* include/exec: Provide the tswap() functions for target independent code, tooThomas Huth2023-04-201-63/+1
| | | | | | | | | | | | | | In some cases of target independent code, it would be useful to have access to the functions that swap endianess in case it differs between guest and host. Thus re-implement the tswapXX() functions in a new header that can be included separately. The check whether the swapping is needed continues to be done at compile-time for target specific code, while it is done at run-time in target-independent code. Message-Id: <20230411183418.1640500-3-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
* include/exec: Change reserved_va semantics to last byteRichard Henderson2023-03-281-1/+10
| | | | | | | | Change the semantics to be the last byte of the guest va, rather than the following byte. This avoids some overflow conditions. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Pass last not end to page_reset_target_dataRichard Henderson2023-03-281-1/+1
| | | | | | | | | Pass the address of the last byte to be changed, rather than the first address past the last byte. This avoids overflow when the last page of the address space is involved. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Pass last not end to page_set_flagsRichard Henderson2023-03-281-1/+1
| | | | | | | | | | Pass the address of the last byte to be changed, rather than the first address past the last byte. This avoids overflow when the last page of the address space is involved. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1528 Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* replace TABs with spacesYeqi Fu2023-03-201-1/+1
| | | | | | | | | | | Bring the files in line with the QEMU coding style, with spaces for indentation. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/378 Signed-off-by: Yeqi Fu <fufuyqqqqqq@gmail.com> Message-Id: <20230315032649.57568-1-fufuyqqqqqq@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* accel/tcg: Simplify page_get/alloc_target_dataRichard Henderson2022-10-261-15/+6
| | | | | | | | | | Since the only user, Arm MTE, always requires allocation, merge the get and alloc functions to always produce a non-null result. Also assume that the user has already checked page validity. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Make page_alloc_target_data allocation constantRichard Henderson2022-10-261-5/+4
| | | | | | | | | | Use a constant target data allocation size for all pages. This will be necessary to reduce overhead of page tracking. Since TARGET_PAGE_DATA_SIZE is now required, we can use this to omit data tracking for targets that don't require it. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Passthrough MADV_DONTNEED for certain file mappingsIlya Leoshkevich2022-09-271-0/+6
| | | | | | | | | | | | | | | | | | | This is a follow-up for commit 892a4f6a750a ("linux-user: Add partial support for MADV_DONTNEED"), which added passthrough for anonymous mappings. File mappings can be handled in a similar manner. In order to do that, mark pages, for which mmap() was passed through, with PAGE_PASSTHROUGH, and then allow madvise() passthrough for these pages. Drop the explicit PAGE_ANON check, since anonymous mappings are expected to have PAGE_PASSTHROUGH anyway. Add PAGE_PASSTHROUGH to PAGE_STICKY in order to keep it on mprotect(). Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220725125043.43048-1-iii@linux.ibm.com> Message-Id: <20220906000839.1672934-5-iii@linux.ibm.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/aarch64: Reset target data on MADV_DONTNEEDVitaly Buka2022-08-111-0/+1
| | | | | | | | | | | aarch64 stores MTE tags in target_date, and they should be reset by MADV_DONTNEED. Signed-off-by: Vitaly Buka <vitalybuka@google.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220711220028.2467290-1-vitalybuka@google.com> [lv: fix code style issues] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* accel/tcg: Inline dump_opcount_info() and remove itBernhard Beschow2022-06-111-1/+0
| | | | | | | | | | | dump_opcount_info() is a one-line wrapper around tcg_dump_op_count() which is also exported. So use the latter directly. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220520180109.8224-10-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* accel/tcg/cpu-exec: Unexport dump_drift_info()Bernhard Beschow2022-06-111-2/+0
| | | | | | | | | | | | | Commit 3a841ab53f165910224dc4bebabf1a8f1d04200c 'qapi: introduce x-query-jit QMP command' basically moved the only function using dump_drift_info() to cpu-exec.c. Therefore, dump_drift_info() doesn't need to be exported any longer. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220520180109.8224-9-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* Replace TARGET_WORDS_BIGENDIANMarc-André Lureau2022-04-061-4/+3
| | | | | | | | | | | | Convert the TARGET_WORDS_BIGENDIAN macro, similarly to what was done with HOST_BIG_ENDIAN. The new TARGET_BIG_ENDIAN macro is either 0 or 1, and thus should always be defined to prevent misuse. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Suggested-by: Halil Pasic <pasic@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220323155743.1585078-8-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau2022-04-061-3/+4
| | | | | | | | | | | | | | | | | | | Replace a config-time define with a compile time condition define (compatible with clang and gcc) that must be declared prior to its usage. This avoids having a global configure time define, but also prevents from bad usage, if the config header wasn't included before. This can help to make some code independent from qemu too. gcc supports __BYTE_ORDER__ from about 4.6 and clang from 3.2. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> [ For the s390x parts I'm involved in ] Acked-by: Halil Pasic <pasic@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220323155743.1585078-7-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* exec: Make cpu_memory_rw_debug() target agnosticPhilippe Mathieu-Daudé2022-03-061-4/+0
| | | | | | | | | | | | | | | | cpu_memory_rw_debug() is declared in "exec/cpu-all.h" which contains target-specific declarations. To be able to use it from target agnostic source, move the declaration to the generic "exec/cpu-common.h" header. Replace the target-specific 'target_ulong' type by 'vaddr' which better reflects the argument type, and is target agnostic. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220207075426.81934-5-f4bug@amsat.org>
* exec/cpu: Make host pages variables / macros 'target agnostic'Philippe Mathieu-Daudé2022-01-271-9/+0
| | | | | | | | | | | | "host" pages are related to the *host* not the *target*, thus the qemu_host_page_size / qemu_host_page_mask variables and the HOST_PAGE_ALIGN() / REAL_HOST_PAGE_ALIGN() macros can be moved to "exec/cpu-common.h" which is target agnostic. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220120000836.229419-1-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* cpu: remove unnecessary #ifdef CONFIG_TCGPaolo Bonzini2021-12-181-2/+0
| | | | | | | | "if (tcg_enabled())" allows elision of the code inside it; we only need the prototype to exist, so that the code compile even for the --disable-tcg case. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>