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* accel/tcg: Replace CPUState.env_ptr with cpu_env()Richard Henderson2023-10-041-1/+0
| | | | | Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Remove cpu_neg()Richard Henderson2023-10-031-11/+0
| | | | | | | | Now that CPUNegativeOffsetState is part of CPUState, we can reference it directly. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Remove CPUState.icount_decr_ptrRichard Henderson2023-10-031-1/+0
| | | | | | | We can now access icount_decr directly. Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Move CPUNegativeOffsetState into CPUStateRichard Henderson2023-10-031-13/+9
| | | | | | | | Retain the separate structure to emphasize its importance. Enforce CPUArchState always follows CPUState without padding. Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Validate placement of CPUNegativeOffsetStateRichard Henderson2023-10-031-0/+6
| | | | | | | | Verify that the distance between CPUNegativeOffsetState and CPUArchState is no greater than any alignment requirements. Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Restrict tcg_exec_[un]realizefn() to TCGPhilippe Mathieu-Daudé2023-10-031-2/+0
| | | | | | | | | | | We don't need to expose these TCG-specific methods to the whole code base. Register them as AccelClass handlers, they will be called by the generic accel_cpu_[un]realize() methods. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20231003123026.99229-8-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Have tcg_exec_realizefn() return a booleanPhilippe Mathieu-Daudé2023-10-031-1/+1
| | | | | | | | | | | Following the example documented since commit e3fe3988d7 ("error: Document Error API usage rules"), have tcg_exec_realizefn() return a boolean indicating whether an error is set or not. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20231003123026.99229-7-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* include/exec: Widen tlb_hit/tlb_hit_page()Anton Johansson2023-08-241-2/+2
| | | | | | | | | | tlb_addr is changed from target_ulong to uint64_t to match the type of a CPUTLBEntry value, and the addressed is changed to vaddr. Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230807155706.9580-8-anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Return bool from page_check_rangeRichard Henderson2023-07-151-1/+12
| | | | | | | | | Replace the 0/-1 result with true/false. Invert the sense of the test of all callers. Document the function. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230707204054.8792-25-richard.henderson@linaro.org>
* accel/tcg: Introduce page_find_range_emptyRichard Henderson2023-07-151-0/+15
| | | | | | | Use the interval tree to locate an unused range in the VM. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230707204054.8792-17-richard.henderson@linaro.org>
* accel/tcg: Introduce page_check_range_emptyRichard Henderson2023-07-151-0/+12
| | | | | | | | | Examine the interval tree to validate that a region has no existing mappings. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230707204054.8792-10-richard.henderson@linaro.org>
* plugins: force slow path when plugins instrument memory opsAlex Bennée2023-07-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lack of SVE memory instrumentation has been an omission in plugin handling since it was introduced. Fortunately we can utilise the probe_* functions to force all all memory access to follow the slow path. We do this by checking the access type and presence of plugin memory callbacks and if set return the TLB_MMIO flag. We have to jump through a few hoops in user mode to re-use the flag but it was the desired effect: ./qemu-system-aarch64 -display none -serial mon:stdio \ -M virt -cpu max -semihosting-config enable=on \ -kernel ./tests/tcg/aarch64-softmmu/memory-sve \ -plugin ./contrib/plugins/libexeclog.so,ifilter=st1w,afilter=0x40001808 -d plugin gives (disas doesn't currently understand st1w): 0, 0x40001808, 0xe54342a0, ".byte 0xa0, 0x42, 0x43, 0xe5", store, 0x40213010, RAM, store, 0x40213014, RAM, store, 0x40213018, RAM And for user-mode: ./qemu-aarch64 \ -plugin contrib/plugins/libexeclog.so,afilter=0x4007c0 \ -d plugin \ ./tests/tcg/aarch64-linux-user/sha512-sve gives: 1..10 ok 1 - do_test(&tests[i]) 0, 0x4007c0, 0xa4004b80, ".byte 0x80, 0x4b, 0x00, 0xa4", load, 0x5500800370, load, 0x5500800371, load, 0x5500800372, load, 0x5500800373, load, 0x5500800374, load, 0x5500800375, load, 0x5500800376, load, 0x5500800377, load, 0x5500800378, load, 0x5500800379, load, 0x550080037a, load, 0x550080037b, load, 0x550080037c, load, 0x550080037d, load, 0x550080037e, load, 0x550080037f, load, 0x5500800380, load, 0x5500800381, load, 0x5500800382, load, 0x5500800383, load, 0x5500800384, load, 0x5500800385, load, 0x5500800386, lo ad, 0x5500800387, load, 0x5500800388, load, 0x5500800389, load, 0x550080038a, load, 0x550080038b, load, 0x550080038c, load, 0x550080038d, load, 0x550080038e, load, 0x550080038f, load, 0x5500800390, load, 0x5500800391, load, 0x5500800392, load, 0x5500800393, load, 0x5500800394, load, 0x5500800395, load, 0x5500800396, load, 0x5500800397, load, 0x5500800398, load, 0x5500800399, load, 0x550080039a, load, 0x550080039b, load, 0x550080039c, load, 0x550080039d, load, 0x550080039e, load, 0x550080039f, load, 0x55008003a0, load, 0x55008003a1, load, 0x55008003a2, load, 0x55008003a3, load, 0x55008003a4, load, 0x55008003a5, load, 0x55008003a6, load, 0x55008003a7, load, 0x55008003a8, load, 0x55008003a9, load, 0x55008003aa, load, 0x55008003ab, load, 0x55008003ac, load, 0x55008003ad, load, 0x55008003ae, load, 0x55008003af (4007c0 is the ld1b in the sha512-sve) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Cc: Robert Henry <robhenry@microsoft.com> Cc: Aaron Lindsay <aaron@os.amperecomputing.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230630180423.558337-20-alex.bennee@linaro.org>
* accel/tcg: Renumber TLB_DISCARD_WRITERichard Henderson2023-06-261-2/+2
| | | | | | | | Move to fill a hole in the set of bits. Reduce the total number of tlb bits by 1. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Move TLB_WATCHPOINT to TLB_SLOW_FLAGS_MASKRichard Henderson2023-06-261-4/+4
| | | | | | | | This frees up one bit of the primary tlb flags without impacting the TLB_NOTDIRTY logic. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Store some tlb flags in CPUTLBEntryFullRichard Henderson2023-06-261-4/+17
| | | | | | | | | | | | | | | We have run out of bits we can use within the CPUTLBEntry comparators, as TLB_FLAGS_MASK cannot overlap alignment. Store slow_flags[] in CPUTLBEntryFull, and merge with the flags from the comparator. A new TLB_FORCE_SLOW bit is set within the comparator as an indication that the slow path must be used. Move TLB_BSWAP to TLB_SLOW_FLAGS_MASK. Since we are out of bits, we cannot create a new bit without moving an old one. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Move TLB_FLAGS_MASK check out of get_alignment_bitsRichard Henderson2023-06-051-0/+3
| | | | | | | | | | The replacement isn't ideal, as the raw count of bits is not easily synced with exec/cpu-all.h, but it does remove from tcg.h the target dependency on TARGET_PAGE_BITS_MIN which is built into TLB_FLAGS_MASK. Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tcg: Split out exec/user/guest-base.hRichard Henderson2023-05-161-4/+1
| | | | | | | | TCG will need this declaration, without all of the other bits that come with cpu-all.h. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* include/exec: Provide the tswap() functions for target independent code, tooThomas Huth2023-04-201-63/+1
| | | | | | | | | | | | | | In some cases of target independent code, it would be useful to have access to the functions that swap endianess in case it differs between guest and host. Thus re-implement the tswapXX() functions in a new header that can be included separately. The check whether the swapping is needed continues to be done at compile-time for target specific code, while it is done at run-time in target-independent code. Message-Id: <20230411183418.1640500-3-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
* include/exec: Change reserved_va semantics to last byteRichard Henderson2023-03-281-1/+10
| | | | | | | | Change the semantics to be the last byte of the guest va, rather than the following byte. This avoids some overflow conditions. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Pass last not end to page_reset_target_dataRichard Henderson2023-03-281-1/+1
| | | | | | | | | Pass the address of the last byte to be changed, rather than the first address past the last byte. This avoids overflow when the last page of the address space is involved. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Pass last not end to page_set_flagsRichard Henderson2023-03-281-1/+1
| | | | | | | | | | Pass the address of the last byte to be changed, rather than the first address past the last byte. This avoids overflow when the last page of the address space is involved. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1528 Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* replace TABs with spacesYeqi Fu2023-03-201-1/+1
| | | | | | | | | | | Bring the files in line with the QEMU coding style, with spaces for indentation. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/378 Signed-off-by: Yeqi Fu <fufuyqqqqqq@gmail.com> Message-Id: <20230315032649.57568-1-fufuyqqqqqq@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* accel/tcg: Simplify page_get/alloc_target_dataRichard Henderson2022-10-261-15/+6
| | | | | | | | | | Since the only user, Arm MTE, always requires allocation, merge the get and alloc functions to always produce a non-null result. Also assume that the user has already checked page validity. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* accel/tcg: Make page_alloc_target_data allocation constantRichard Henderson2022-10-261-5/+4
| | | | | | | | | | Use a constant target data allocation size for all pages. This will be necessary to reduce overhead of page tracking. Since TARGET_PAGE_DATA_SIZE is now required, we can use this to omit data tracking for targets that don't require it. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user: Passthrough MADV_DONTNEED for certain file mappingsIlya Leoshkevich2022-09-271-0/+6
| | | | | | | | | | | | | | | | | | | This is a follow-up for commit 892a4f6a750a ("linux-user: Add partial support for MADV_DONTNEED"), which added passthrough for anonymous mappings. File mappings can be handled in a similar manner. In order to do that, mark pages, for which mmap() was passed through, with PAGE_PASSTHROUGH, and then allow madvise() passthrough for these pages. Drop the explicit PAGE_ANON check, since anonymous mappings are expected to have PAGE_PASSTHROUGH anyway. Add PAGE_PASSTHROUGH to PAGE_STICKY in order to keep it on mprotect(). Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220725125043.43048-1-iii@linux.ibm.com> Message-Id: <20220906000839.1672934-5-iii@linux.ibm.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* linux-user/aarch64: Reset target data on MADV_DONTNEEDVitaly Buka2022-08-111-0/+1
| | | | | | | | | | | aarch64 stores MTE tags in target_date, and they should be reset by MADV_DONTNEED. Signed-off-by: Vitaly Buka <vitalybuka@google.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220711220028.2467290-1-vitalybuka@google.com> [lv: fix code style issues] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* accel/tcg: Inline dump_opcount_info() and remove itBernhard Beschow2022-06-111-1/+0
| | | | | | | | | | | dump_opcount_info() is a one-line wrapper around tcg_dump_op_count() which is also exported. So use the latter directly. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220520180109.8224-10-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* accel/tcg/cpu-exec: Unexport dump_drift_info()Bernhard Beschow2022-06-111-2/+0
| | | | | | | | | | | | | Commit 3a841ab53f165910224dc4bebabf1a8f1d04200c 'qapi: introduce x-query-jit QMP command' basically moved the only function using dump_drift_info() to cpu-exec.c. Therefore, dump_drift_info() doesn't need to be exported any longer. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220520180109.8224-9-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* Replace TARGET_WORDS_BIGENDIANMarc-André Lureau2022-04-061-4/+3
| | | | | | | | | | | | Convert the TARGET_WORDS_BIGENDIAN macro, similarly to what was done with HOST_BIG_ENDIAN. The new TARGET_BIG_ENDIAN macro is either 0 or 1, and thus should always be defined to prevent misuse. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Suggested-by: Halil Pasic <pasic@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220323155743.1585078-8-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau2022-04-061-3/+4
| | | | | | | | | | | | | | | | | | | Replace a config-time define with a compile time condition define (compatible with clang and gcc) that must be declared prior to its usage. This avoids having a global configure time define, but also prevents from bad usage, if the config header wasn't included before. This can help to make some code independent from qemu too. gcc supports __BYTE_ORDER__ from about 4.6 and clang from 3.2. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> [ For the s390x parts I'm involved in ] Acked-by: Halil Pasic <pasic@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220323155743.1585078-7-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* exec: Make cpu_memory_rw_debug() target agnosticPhilippe Mathieu-Daudé2022-03-061-4/+0
| | | | | | | | | | | | | | | | cpu_memory_rw_debug() is declared in "exec/cpu-all.h" which contains target-specific declarations. To be able to use it from target agnostic source, move the declaration to the generic "exec/cpu-common.h" header. Replace the target-specific 'target_ulong' type by 'vaddr' which better reflects the argument type, and is target agnostic. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220207075426.81934-5-f4bug@amsat.org>
* exec/cpu: Make host pages variables / macros 'target agnostic'Philippe Mathieu-Daudé2022-01-271-9/+0
| | | | | | | | | | | | "host" pages are related to the *host* not the *target*, thus the qemu_host_page_size / qemu_host_page_mask variables and the HOST_PAGE_ALIGN() / REAL_HOST_PAGE_ALIGN() macros can be moved to "exec/cpu-common.h" which is target agnostic. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220120000836.229419-1-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* cpu: remove unnecessary #ifdef CONFIG_TCGPaolo Bonzini2021-12-181-2/+0
| | | | | | | | "if (tcg_enabled())" allows elision of the code inside it; we only need the prototype to exist, so that the code compile even for the --disable-tcg case. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* qapi: introduce x-query-opcount QMP commandDaniel P. Berrangé2021-11-021-1/+1
| | | | | | | | | | | This is a counterpart to the HMP "info opcount" command. It is being added with an "x-" prefix because this QMP command is intended as an ad hoc debugging tool and will thus not be modelled in QAPI as fully structured data, nor will it have long term guaranteed stability. The existing HMP command is rewritten to call the QMP command. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
* qapi: introduce x-query-jit QMP commandDaniel P. Berrangé2021-11-021-2/+2
| | | | | | | | | | | This is a counterpart to the HMP "info jit" command. It is being added with an "x-" prefix because this QMP command is intended as an ad hoc debugging tool and will thus not be modelled in QAPI as fully structured data, nor will it have long term guaranteed stability. The existing HMP command is rewritten to call the QMP command. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
* exec: Fix overlap of PAGE_ANON and PAGE_TARGET_1Richard Henderson2021-04-121-2/+2
| | | | | | | | | | | | | | | | Unfortuately, the elements of PAGE_* were not in numerical order and so PAGE_ANON was added to an "unused" bit. As an arbitrary choice, move PAGE_TARGET_{1,2} together. Cc: Laurent Vivier <laurent@vivier.eu> Fixes: 26bab757d41b ("linux-user: Introduce PAGE_ANON") Buglink: https://bugs.launchpad.net/bugs/1922617 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* exec: Build page-vary-common.c with -fno-ltoRichard Henderson2021-03-231-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In bbc17caf81f, we used an alias attribute to allow target_page to be declared const, and yet be initialized late. This fails when using LTO with several versions of gcc. The compiler looks through the alias and decides that the const variable is statically initialized to zero, then propagates that zero to many uses of the variable. This can be avoided by compiling one object file with -fno-lto. In this way, any initializer cannot be seen, and the constant propagation does not occur. Since we are certain to have this separate compilation unit, we can drop the alias attribute as well. We simply have differing declarations for target_page in different compilation units. Drop the use of init_target_page, and drop the configure detection for CONFIG_ATTRIBUTE_ALIAS. In order to change the compilation flags for a file with meson, we must use a static_library. This runs into specific_ss, where we would need to create many static_library instances. Fix this by splitting page-vary.c: the page-vary-common.c part is compiled once as a static_library, while the page-vary.c part is left in specific_ss in order to handle the target-specific value of TARGET_PAGE_BITS_MIN. Reported-by: Gavin Shan <gshan@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210321211534.2101231-1-richard.henderson@linaro.org> [PMD: Fix typo in subject, split original patch in 3] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Gavin Shan <gshan@redhat.com> Message-Id: <20210322112427.4045204-4-f4bug@amsat.org> [rth: Update MAINTAINERS] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* exec: Extract 'page-vary.h' headerRichard Henderson2021-03-231-7/+4
| | | | | | | | | | | | | | | In the next commit we will extract the generic code out of page-vary.c, only keeping the target specific code. Both files will use the same TargetPageBits structure, so make its declaration in a shared header. As the common header can not use target specific types, use a uint64_t to hold the page mask value, and add a cast back to target_long in the TARGET_PAGE_MASK definitions. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210322112427.4045204-3-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* linux-user/aarch64: Implement PROT_MTERichard Henderson2021-02-161-0/+1
| | | | | | | | | | Remember the PROT_MTE bit as PAGE_MTE/PAGE_TARGET_2. Otherwise this does not yet have effect. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-25-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* exec: Use uintptr_t for guest_baseRichard Henderson2021-02-161-1/+1
| | | | | | | | | | | This is more descriptive than 'unsigned long'. No functional change, since these match on all linux+bsd hosts. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210212184902.1251044-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user: Introduce PAGE_ANONRichard Henderson2021-02-161-0/+2
| | | | | | | | | | | | | | | | | | | Record whether the backing page is anonymous, or if it has file backing. This will allow us to get close to the Linux AArch64 ABI for MTE, which allows tag memory only on ram-backed VMAs. The real ABI allows tag memory on files, when those files are on ram-backed filesystems, such as tmpfs. We will not be able to implement that in QEMU linux-user. Thankfully, anonymous memory for malloc arenas is the primary consumer of this feature, so this restricted version should still be of use. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* tcg: Introduce target-specific page data for user-onlyRichard Henderson2021-02-161-6/+36
| | | | | | | | | | | | This data can be allocated by page_alloc_target_data() and released by page_set_flags(start, end, prot | PAGE_RESET). This data will be used to hold tag memory for AArch64 MTE. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* bswap.h: Remove unused float-access functionsPeter Maydell2021-02-151-8/+0
| | | | | | | | | | | | | The float-access functions stfl_*, stfq*, ldfl* and ldfq* are now unused; remove them. (Accesses to float64 and float32 types can be made with the ldl/stl/ldq/stq functions, as float64 and float32 are guaranteed to be typedefs for normal integer types.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210208113428.7181-6-peter.maydell@linaro.org> Message-Id: <20210211122750.22645-15-alex.bennee@linaro.org>
* accel/tcg: split TCG-only code from cpu_exec_realizefnClaudio Fontana2021-02-051-2/+9
| | | | | | | | | | | move away TCG-only code, make it compile only on TCG. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [claudio: moved the prototypes from hw/core/cpu.h to exec/cpu-all.h] Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210204163931.7358-4-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* overall/alpha tcg cpus|hppa: Fix Lesser GPL version numberChetan Pant2020-11-151-1/+1
| | | | | | | | | | | | There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Message-Id: <20201023123353.19796-1-chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* linux-user: Set PAGE_TARGET_1 for TARGET_PROT_BTIRichard Henderson2020-10-271-0/+2
| | | | | | | | | | Transform the prot bit to a qemu internal page bit, and save it in the page tables. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201021173749.111103-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* cpu-timers, icount: new modulesClaudio Fontana2020-10-051-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | refactoring of cpus.c continues with cpu timer state extraction. cpu-timers: responsible for the softmmu cpu timers state, including cpu clocks and ticks. icount: counts the TCG instructions executed. As such it is specific to the TCG accelerator. Therefore, it is built only under CONFIG_TCG. One complication is due to qtest, which uses an icount field to warp time as part of qtest (qtest_clock_warp). In order to solve this problem, provide a separate counter for qtest. This requires fixing assumptions scattered in the code that qtest_enabled() implies icount_enabled(), checking each specific case. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [remove redundant initialization with qemu_spice_init] Reviewed-by: Alex Bennée <alex.bennee@linaro.org> [fix lingering calls to icount_get] Signed-off-by: Claudio Fontana <cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* meson: rename .inc.h files to .h.incPaolo Bonzini2020-08-211-5/+5
| | | | | | Make it consistent with '.c.inc' and '.rst.inc'. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* osdep: Make MIN/MAX evaluate arguments only onceEric Blake2020-06-261-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I'm not aware of any immediate bugs in qemu where a second runtime evaluation of the arguments to MIN() or MAX() causes a problem, but proactively preventing such abuse is easier than falling prey to an unintended case down the road. At any rate, here's the conversation that sparked the current patch: https://lists.gnu.org/archive/html/qemu-devel/2018-12/msg05718.html Update the MIN/MAX macros to only evaluate their argument once at runtime; this uses typeof(1 ? (a) : (b)) to ensure that we are promoting the temporaries to the same type as the final comparison (we have to trigger type promotion, as typeof(bitfield) won't compile; and we can't use typeof((a) + (b)) or even typeof((a) + 0), as some of our uses of MAX are on void* pointers where such addition is undefined). However, we are unable to work around gcc refusing to compile ({}) in a constant context (such as the array length of a static variable), even when only used in the dead branch of a __builtin_choose_expr(), so we have to provide a second macro pair MIN_CONST and MAX_CONST for use when both arguments are known to be compile-time constants and where the result must also be usable as a constant; this second form evaluates arguments multiple times but that doesn't matter for constants. By using a void expression as the expansion if a non-constant is presented to this second form, we can enlist the compiler to ensure the double evaluation is not attempted on non-constants. Alas, as both macros now rely on compiler intrinsics, they are no longer usable in preprocessor #if conditions; those will just have to be open-coded or the logic rewritten into #define or runtime 'if' conditions (but where the compiler dead-code-elimination will probably still apply). I tested that both gcc 10.1.1 and clang 10.0.0 produce errors for all forms of macro mis-use. As the errors can sometimes be cryptic, I'm demonstrating the gcc output: Use of MIN when MIN_CONST is needed: In file included from /home/eblake/qemu/qemu-img.c:25: /home/eblake/qemu/include/qemu/osdep.h:249:5: error: braced-group within expression allowed only inside a function 249 | ({ \ | ^ /home/eblake/qemu/qemu-img.c:92:12: note: in expansion of macro ‘MIN’ 92 | char array[MIN(1, 2)] = ""; | ^~~ Use of MIN_CONST when MIN is needed: /home/eblake/qemu/qemu-img.c: In function ‘is_allocated_sectors’: /home/eblake/qemu/qemu-img.c:1225:15: error: void value not ignored as it ought to be 1225 | i = MIN_CONST(i, n); | ^ Use of MIN in the preprocessor: In file included from /home/eblake/qemu/accel/tcg/translate-all.c:20: /home/eblake/qemu/accel/tcg/translate-all.c: In function ‘page_check_range’: /home/eblake/qemu/include/qemu/osdep.h:249:6: error: token "{" is not valid in preprocessor expressions 249 | ({ \ | ^ Fix the resulting callsites that used #if or computed a compile-time constant min or max to use the new macros. cpu-defs.h is interesting, as CPU_TLB_DYN_MAX_BITS is sometimes used as a constant and sometimes dynamic. It may be worth improving glib's MIN/MAX definitions to be saner, but that is a task for another day. Signed-off-by: Eric Blake <eblake@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200625162602.700741-1-eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* exec: Propagate cpu_memory_rw_debug() errorPhilippe Mathieu-Daudé2020-06-101-0/+1
| | | | | | | | Do not ignore the MemTxResult error type returned by the address_space_rw() API. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>