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* fpu: Make floatx80 invalid encoding settable at runtimePeter Maydell2025-02-251-32/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because floatx80 has an explicit integer bit, this permits some odd encodings where the integer bit is not set correctly for the floating point value type. In In Intel terminology the categories are: exp == 0, int = 0, mantissa == 0 : zeroes exp == 0, int = 0, mantissa != 0 : denormals exp == 0, int = 1 : pseudo-denormals 0 < exp < 0x7fff, int = 0 : unnormals 0 < exp < 0x7fff, int = 1 : normals exp == 0x7fff, int = 0, mantissa == 0 : pseudo-infinities exp == 0x7fff, int = 1, mantissa == 0 : infinities exp == 0x7fff, int = 0, mantissa != 0 : pseudo-NaNs exp == 0x7fff, int = 1, mantissa == 0 : NaNs The usual IEEE cases of zero, denormal, normal, inf and NaN are always valid. x87 permits as input also pseudo-denormals. m68k permits all those and also pseudo-infinities, pseudo-NaNs and unnormals. Currently we have an ifdef in floatx80_invalid_encoding() to select the x86 vs m68k behaviour. Add new floatx80_behaviour flags to select whether pseudo-NaN and unnormal are valid, and use these (plus the existing pseudo_inf_valid flag) to decide whether these encodings are invalid at runtime. We leave pseudo-denormals as always-valid, since both x86 and m68k accept them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250224111524.1101196-8-peter.maydell@linaro.org Message-id: 20250217125055.160887-6-peter.maydell@linaro.org
* fpu: Pass float_status to floatx80_invalid_encoding()Peter Maydell2025-02-251-1/+1
| | | | | | | | | | | | | | | The definition of which floatx80 encodings are invalid is target-specific. Currently we handle this with an ifdef, but we would like to defer this decision to runtime. In preparation, pass a float_status argument to floatx80_invalid_encoding(). We will change the implementation from ifdef to looking at the status argument in the following commit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250224111524.1101196-7-peter.maydell@linaro.org
* fpu: Make targets specify whether floatx80 Inf can have Int bit clearPeter Maydell2025-02-251-7/+11
| | | | | | | | | | | | | | | | | | | In Intel terminology, a floatx80 Infinity with the explicit integer bit clear is a "pseudo-infinity"; for x86 these are not valid infinity values. m68k is looser and does not care whether the Integer bit is set or clear in an infinity. Move this setting to runtime rather than using an ifdef in floatx80_is_infinity(). Since this was the last use of the floatx80_infinity global constant, we remove it and its definition here. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250224111524.1101196-6-peter.maydell@linaro.org Message-id: 20250217125055.160887-5-peter.maydell@linaro.org
* fpu: Pass float_status to floatx80_is_infinity()Peter Maydell2025-02-251-1/+1
| | | | | | | | | | | | | | | | | | | | Unlike the other float formats, whether a floatx80 value is considered to be an Infinity is target-dependent. (On x86 if the explicit integer bit is clear this is a "pseudo-infinity" and not a valid infinity; m68k does not care about the value of the integer bit.) Currently we select this target-specific logic at compile time with an ifdef. We're going to want to do this at runtime, so change the floatx80_is_infinity() function to take a float_status. This commit doesn't change any logic; we'll do that in the next commit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250224111524.1101196-5-peter.maydell@linaro.org
* fpu: Make targets specify floatx80 default Inf at runtimePeter Maydell2025-02-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we hardcode at compile time whether the floatx80 default Infinity value has the explicit integer bit set or not (x86 sets it; m68k does not). To be able to compile softfloat once for all targets we'd like to move this setting to runtime. Define a new FloatX80Behaviour enum which is a set of flags that define the target's floatx80 handling. Initially we define just one flag, for whether the default Infinity has the Integer bit set or not, but we will expand this in future commits to cover the other floatx80 target specifics that we currently make compile-time settings. Define a new function floatx80_default_inf() which returns the appropriate default Infinity value of the given sign, and use it in the code that was previously directly using the compile-time constant floatx80_infinity_{low,high} values when packing an infinity into a floatx80. Since floatx80 is highly unlikely to be supported in any new architecture, and the existing code is generally written as "default to like x87, with an ifdef for m68k", we make the default value for the floatx80 behaviour flags be "what x87 does". This means we only need to change the m68k target to specify the behaviour flags. (Other users of floatx80 are the Arm NWFPE emulation, which is obsolete and probably not actually doing the right thing anyway, and the PPC xsrqpxp insn. Making the default be "like x87" avoids our needing to review and test for behaviour changes there.) We will clean up the remaining uses of the floatx80_infinity global constant in subsequent commits. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250224111524.1101196-2-peter.maydell@linaro.org Message-id: 20250217125055.160887-2-peter.maydell@linaro.org
* softfloat: Add float_muladd_suppress_add_product_zeroRichard Henderson2024-12-241-0/+5
| | | | | | | Certain Hexagon instructions suppress changes to the result when the product of fma() is a true zero. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Remove float_muladd_halve_resultRichard Henderson2024-12-241-3/+0
| | | | | | | All uses have been convered to float*_muladd_scalbn. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Add float{16,32,64}_muladd_scalbnRichard Henderson2024-12-241-0/+6
| | | | | | | | We currently have a flag, float_muladd_halve_result, to scale the result by 2**-1. Extend this to handle arbitrary scaling. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu: Add conversions between bfloat16 and [u]int8LIU Zhiwei2023-09-161-0/+12
| | | | | | | | We missed these functions when upstreaming the bfloat16 support. Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Message-Id: <20230531065458.2082-1-zhiwei_liu@linux.alibaba.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu: Add float64_to_int{32,64}_moduloRichard Henderson2023-07-011-0/+3
| | | | | | | | | | Add versions of float64_to_int* which do not saturate the result. Reviewed-by: Christoph Muellner <christoph.muellner@vrull.eu> Tested-by: Christoph Muellner <christoph.muellner@vrull.eu> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230527141910.1885950-2-richard.henderson@linaro.org>
* softfloat: add float128_to_int128Matheus Ferst2022-04-201-0/+2
| | | | | | | | | Implements float128_to_int128 based on parts_float_to_int logic. Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220330175932.6995-7-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
* softfloat: add float128_to_uint128Matheus Ferst2022-04-201-0/+2
| | | | | | | | | Implements float128_to_uint128 based on parts_float_to_uint logic. Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220330175932.6995-6-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
* softfloat: add int128_to_float128Matheus Ferst2022-04-201-0/+1
| | | | | | | | | Based on parts_sint_to_float, implements int128_to_float128 to convert a signed 128-bit value received through an Int128 argument. Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20220330175932.6995-5-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
* softfloat: add uint128_to_float128Matheus Ferst2022-04-201-0/+2
| | | | | | | | | | Based on parts_uint_to_float, implements uint128_to_float128 to convert an unsigned 128-bit value received through an Int128 argument. Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220330175932.6995-4-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
* softfloat: Add float64r32 arithmetic routinesRichard Henderson2021-12-171-0/+12
| | | | | | | | | | | | | These variants take a float64 as input, compute the result to infinite precision (as we do with FloatParts), round the result to the precision and dynamic range of float32, and then return the result in the format of float64. This is the operation PowerPC requires for its float32 operations. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211119160502.17432-28-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
* softfloat: Extend float_exception_flags to 16 bitsRichard Henderson2021-12-171-1/+1
| | | | | | | | | | We will shortly have more than 8 bits of exceptions. Repack the existing flags into low bits and reformat to hex. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211119160502.17432-2-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
* softfloat: add APIs to handle alternative sNaN propagation for fmax/fminChih-Min Chao2021-10-291-0/+10
| | | | | | | | | | | | | | | | | | | | | | For "fmax/fmin ft0, ft1, ft2" and if one of the inputs is sNaN, The original logic: Return NaN and set invalid flag if ft1 == sNaN || ft2 == sNan. The alternative path: Set invalid flag if ft1 == sNaN || ft2 == sNaN. Return NaN only if ft1 == NaN && ft2 == NaN. The IEEE 754 spec allows both implementation and some architecture such as riscv choose different defintions in two spec versions. (riscv-spec-v2.2 use original version, riscv-spec-20191213 changes to alternative) Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211021160847.2748577-2-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* softfloat: Introduce Floatx80RoundPrecRichard Henderson2021-06-031-2/+2
| | | | | | | Use an enumeration instead of raw 32/64/80 values. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Implement float128_(min|minnum|minnummag|max|maxnum|maxnummag)David Hildenbrand2021-06-031-0/+6
| | | | | | | | | | The float128 implementation is straight-forward. Unfortuantely, we don't have any tests we can simply adjust/unlock. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210517142739.38597-24-david@redhat.com> [rth: Update for changed parts_minmax return value] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Move muladd_floats to softfloat-parts.c.incRichard Henderson2021-05-161-0/+2
| | | | | | | | Rename to parts$N_muladd. Implement float128_muladd with FloatParts128. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Inline float_raiseRichard Henderson2021-05-161-1/+4
| | | | | | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Define comparison operations for bfloat16Richard Henderson2020-08-291-0/+41
| | | | | Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Define misc operations for bfloat16LIU Zhiwei2020-08-281-0/+48
| | | | | | | | Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200813071421.2509-4-zhiwei_liu@c-sky.com> [rth: Fix merge conflict with NO_SIGNALING_NANS; use bool for predicates.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Define convert operations for bfloat16LIU Zhiwei2020-08-281-0/+54
| | | | | | | | Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200813071421.2509-3-zhiwei_liu@c-sky.com> [rth: Use FloatRoundMode for conversion functions.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Define operations for bfloat16LIU Zhiwei2020-08-281-0/+38
| | | | | | | | | | | | This patch implements operations for bfloat16 except conversion and some misc operations. We also add FloatFmt and pack/unpack interfaces for bfloat16. As they are both static fields, we can't make a sperate patch for them. Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200813071421.2509-2-zhiwei_liu@c-sky.com> [rth: Use FloatRelation for comparison operations.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Add float16_is_normalStephen Long2020-08-281-0/+5
| | | | | | | This float16 predicate was missing from the normal set. Signed-off-by: Stephen Long <steplong@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Add fp16 and uint8/int8 conversion functionsFrank Chang2020-08-281-0/+8
| | | | | | | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Frank Chang <frank.chang@sifive.com> Message-Id: <1596102747-20226-4-git-send-email-chihmin.chao@sifive.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Implement the full set of comparisons for float16Kito Cheng2020-08-281-0/+41
| | | | | | | | | | | Implement them in softfloat and remove the local versions in riscv. Signed-off-by: Kito Cheng <kito.cheng@sifive.com> Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1596102747-20226-2-git-send-email-chihmin.chao@sifive.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/i386: floatx80: avoid compound literals in static initializersLaszlo Ersek2020-07-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Quoting ISO C99 6.7.8p4, "All the expressions in an initializer for an object that has static storage duration shall be constant expressions or string literals". The compound literal produced by the make_floatx80() macro is not such a constant expression, per 6.6p7-9. (An implementation may accept it, according to 6.6p10, but is not required to.) Therefore using "floatx80_zero" and make_floatx80() for initializing "f2xm1_table" and "fpatan_table" is not portable. And gcc-4.8 in RHEL-7.6 actually chokes on them: > target/i386/fpu_helper.c:871:5: error: initializer element is not constant > { make_floatx80(0xbfff, 0x8000000000000000ULL), > ^ We've had the make_floatx80_init() macro for this purpose since commit 3bf7e40ab914 ("softfloat: fix for C99", 2012-03-17), so let's use that macro again. Fixes: eca30647fc0 ("target/i386: reimplement f2xm1 using floatx80 operations") Fixes: ff57bb7b632 ("target/i386: reimplement fpatan using floatx80 operations") Signed-off-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Joseph Myers <joseph@codesourcery.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Maydell <peter.maydell@linaro.org> Link: https://lists.gnu.org/archive/html/qemu-devel/2017-08/msg06566.html Link: https://lists.gnu.org/archive/html/qemu-devel/2020-07/msg04714.html Message-Id: <20200716144251.23004-1-lersek@redhat.com> Message-Id: <20200724064509.331-8-alex.bennee@linaro.org>
* softfloat,m68k: disable floatx80_invalid_encoding() for m68kLaurent Vivier2020-07-061-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the comment, this definition of invalid encoding is given by intel developer's manual, and doesn't comply with 680x0 FPU. With m68k, the explicit integer bit can be zero in the case of: - zeros (exp == 0, mantissa == 0) - denormalized numbers (exp == 0, mantissa != 0) - unnormalized numbers (exp != 0, exp < 0x7FFF) - infinities (exp == 0x7FFF, mantissa == 0) - not-a-numbers (exp == 0x7FFF, mantissa != 0) For infinities and NaNs, the explicit integer bit can be either one or zero. The IEEE 754 standard does not define a zero integer bit. Such a number is an unnormalized number. Hardware does not directly support denormalized and unnormalized numbers, but implicitly supports them by trapping them as unimplemented data types, allowing efficient conversion in software. See "M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL", "1.6 FLOATING-POINT DATA TYPES" We will implement in the m68k TCG emulator the FP_UNIMP exception to trap into the kernel to normalize the number. In case of linux-user, the number will be normalized by QEMU. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200612140400.2130118-1-laurent@vivier.eu>
* softfloat: return low bits of quotient from floatx80_modremJoseph Myers2020-06-261-1/+2
| | | | | | | | | | | | | | | | | | | | Both x87 and m68k need the low parts of the quotient for their remainder operations. Arrange for floatx80_modrem to track those bits and return them via a pointer. The architectures using float32_rem and float64_rem do not appear to need this information, so the *_rem interface is left unchanged and the information returned only from floatx80_modrem. The logic used to determine the low 7 bits of the quotient for m68k (target/m68k/fpu_helper.c:make_quotient) appears completely bogus (it looks at the result of converting the remainder to integer, the quotient having been discarded by that point); this patch does not change that, but the m68k maintainers may wish to do so. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <alpine.DEB.2.21.2006081656500.23637@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softfloat: merge floatx80_mod and floatx80_remJoseph Myers2020-06-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | The m68k-specific softfloat code includes a function floatx80_mod that is extremely similar to floatx80_rem, but computing the remainder based on truncating the quotient toward zero rather than rounding it to nearest integer. This is also useful for emulating the x87 fprem and fprem1 instructions. Change the floatx80_rem implementation into floatx80_modrem that can perform either operation, with both floatx80_rem and floatx80_mod as thin wrappers available for all targets. There does not appear to be any use for the _mod operation for other floating-point formats in QEMU (the only other architectures using _rem at all are linux-user/arm/nwfpe, for FPA emulation, and openrisc, for instructions that have been removed in the latest version of the architecture), so no change is made to the code for other formats. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <alpine.DEB.2.21.2006081654280.23637@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softfloat: Return bool from all classification predicatesRichard Henderson2020-05-191-33/+33
| | | | | | | | This includes *_is_any_nan, *_is_neg, *_is_inf, etc. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Inline floatx80 compare specializationsRichard Henderson2020-05-191-8/+41
| | | | | | | | | Replace the floatx80 compare specializations with inline functions that call the standard floatx80_compare{,_quiet} functions. Use bool as the return type. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Inline float128 compare specializationsRichard Henderson2020-05-191-8/+41
| | | | | | | | | Replace the float128 compare specializations with inline functions that call the standard float128_compare{,_quiet} functions. Use bool as the return type. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Inline float64 compare specializationsRichard Henderson2020-05-191-8/+41
| | | | | | | | | Replace the float64 compare specializations with inline functions that call the standard float64_compare{,_quiet} functions. Use bool as the return type. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Inline float32 compare specializationsRichard Henderson2020-05-191-8/+41
| | | | | | | | | Replace the float32 compare specializations with inline functions that call the standard float32_compare{,_quiet} functions. Use bool as the return type. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Name compare relation enumRichard Henderson2020-05-191-12/+13
| | | | | | | | | | Give the previously unnamed enum a typedef name. Use it in the prototypes of compare functions. Use it to hold the results of the compare functions. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Name rounding mode enumRichard Henderson2020-05-191-18/+21
| | | | | | | | | | | | Give the previously unnamed enum a typedef name. Use the packed attribute so that we do not affect the layout of the float_status struct. Use it in the prototypes of relevant functions. Adjust switch statements as necessary to avoid compiler warnings. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Replace flag with boolRichard Henderson2020-05-191-5/+5
| | | | | | | | We have had this on the to-do list for quite some time. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu: move inline helpers into a separate headerAlex Bennée2019-08-191-62/+1
| | | | | | | | | | | There are a bunch of users of the inline helpers who do not need access to the entire softfloat API. Move those inline helpers into a new header file which can be included without bringing in the rest of the world. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* fpu: remove the LIT64 macroAlex Bennée2019-08-191-2/+0
| | | | | | | Now the rest of the code has been cleaned up we can remove this. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Implement float128_to_uint32David Hildenbrand2019-02-261-0/+1
| | | | | | | | | | | Handling it just like float128_to_uint32_round_to_zero, that hopefully is free of bugs :) Documentation basically copied from float128_to_uint64 Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* softfloat: add float128_is_{normal,denormal}David Hildenbrand2019-02-261-2/+12
| | | | | | | | | | | | | | | | Needed on s390x, to test for the data class of a number. So it will gain soon a user. A number is considered normal if the exponent is neither 0 nor all 1's. That can be checked by adding 1 to the exponent, and comparing against >= 2 after dropping an eventual overflow into the sign bit. While at it, convert the other floatXX_is_normal functions to use a similar, less error prone calculation, as suggested by Richard H. Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* softfloat: add float{32,64}_is_zero_or_normalEmilio G. Cota2018-12-171-0/+10
| | | | | | | | These will gain some users very soon. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* softfloat: add float{32,64}_is_{de,}normalEmilio G. Cota2018-12-171-0/+20
| | | | | | | | | This paves the way for upcoming work. Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* softfloat: remove float64_trunc_to_intEmilio G. Cota2018-10-051-1/+0
| | | | | | | | | | | It has not had users since f83311e476 ("target-m68k: use floatx80 internally", 2017-06-21). Note that no other bit-width has floatX_trunc_to_int. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: Add scaling float-to-int routinesRichard Henderson2018-08-241-20/+59
| | | | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180814002653.12828-3-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* softfloat: Add scaling int-to-float routinesRichard Henderson2018-08-241-13/+39
| | | | | | | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180814002653.12828-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* fpu/softfloat: Remove floatX_maybe_silence_nanRichard Henderson2018-05-171-5/+0
| | | | | | | | | These functions are now unused. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>