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path: root/include/hw/misc/mips_itu.h (follow)
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* hw/misc/mips_itu: Remove MIPSITUState::saar fieldPhilippe Mathieu-Daudé2024-02-151-3/+0
* hw/misc/mips_itu: Remove MIPSITUState::cpu0 fieldPhilippe Mathieu-Daudé2024-02-151-1/+0
* hw/misc/mips: Reduce itc_reconfigure() scopePhilippe Mathieu-Daudé2024-02-151-2/+0
* hw/misc/mips_itu: Make MIPSITUState target agnosticPhilippe Mathieu-Daudé2023-10-191-1/+1
* hw/misc/mips_itu: Declare itc_reconfigure() in 'hw/misc/mips_itu.h'Philippe Mathieu-Daudé2023-10-191-0/+2
* hw/mips/itu: Pass SAAR using QOM link propertyPhilippe Mathieu-Daudé2023-03-081-3/+2
* hw/mips: Declare all length properties as unsignedPhilippe Mathieu-Daudé2023-03-081-2/+2
* hw/mips: Fix Lesser GPL version numberChetan Pant2020-11-031-1/+1
* Use OBJECT_DECLARE_SIMPLE_TYPE when possibleEduardo Habkost2020-09-181-3/+1
* Use DECLARE_*CHECKER* macrosEduardo Habkost2020-09-091-1/+2
* Move QOM typedefs and add missing includesEduardo Habkost2020-09-091-2/+4
* target/mips: Update ITU to utilize SAARI and SAAR CP0 registersYongbok Kim2019-01-181-0/+4
* target/mips: Add field and R/W access to ITU control register ICR0Yongbok Kim2019-01-181-0/+4
* hw/misc/mips_itu: Cleanup includesPhilippe Mathieu-Daudé2018-06-011-0/+2
* hw/mips: implement ITC Configuration Tags and Storage CellsLeon Alrae2016-03-301-0/+72