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| * | include/hw/dma/xlnx_dpdma: Remove dependency on console.hThomas Huth2025-05-141-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | console.h brings a dependency on the <epoxy/opengl.h> and the pixman header file (if available), so we should avoid to include this file if it is not really necessary. console.h does not seem to be necessary for the xlnx_dpdma code, so drop the include here. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250508144120.163009-2-thuth@redhat.com>
| * | hw/s390x: Remove the obsolete hpage_1m_allowed switchThomas Huth2025-05-141-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The s390-ccw-virtio-3.0 machine was the last one that used the hpage_1m_allowed switch. Since we removed this machine type, we can now remove the switch and the related code, too. This allows us to get rid of the get_machine_class() hack and the big fat warning comment there. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250506062148.306084-8-thuth@redhat.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* | | hw/intc/loongarch_pch: Merge three memory region into oneBibo Mao2025-05-141-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since memory region iomem supports memory access size with 1/2/4/8, it can be used for memory region iomem8 and iomem32_high. Now remove memory region iomem8 and iomem32_high, merge them into iomem together. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250507023754.1877445-5-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
* | | hw/intc/loongarch_pch: Rename memory region iomem32_low with iomemBibo Mao2025-05-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename memory region iomem32_low with iomem, also change ops name as follows: loongarch_pch_pic_reg32_low_ops --> loongarch_pch_pic_ops loongarch_pch_pic_low_readw --> loongarch_pch_pic_read loongarch_pch_pic_low_writew --> loongarch_pch_pic_write Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250507023754.1877445-3-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
* | | hw/intc/loongarch_pch: Set version information at initial stageBibo Mao2025-05-141-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register PCH_PIC_INT_ID constains version and supported irq number information, and it is read only register. The detailed value can be set at initial stage, rather than read callback. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250507023148.1877287-5-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
* | | hw/intc/loongarch_pch: Remove some duplicate macroBibo Mao2025-05-141-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The meaning of macro definition STATUS_LO_START is simliar with PCH_PIC_INT_STATUS, only that offset is different, the same for macro POL_LO_START. Now remove these duplicated macro definitions. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250507023148.1877287-4-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
* | | hw/intc/loongarch_pch: Modify register name PCH_PIC_xxx_OFFSET with PCH_PIC_xxxBibo Mao2025-05-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Macro PCH_PIC_HTMSI_VEC_OFFSET and PCH_PIC_ROUTE_ENTRY_OFFSET is renamed as PCH_PIC_HTMSI_VEC and PCH_PIC_ROUTE_ENTRY separately, it is easier to understand. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250507023148.1877287-3-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
* | | hw/intc/loongarch_pch: Modify name of some registersBibo Mao2025-05-141-18/+9
|/ / | | | | | | | | | | | | | | | | | | | | | | | | For some registers with width 8 bytes, its name is something like PCH_PIC_INT_ID_LO and PCH_PIC_INT_ID_HI. From hardware manual, register name is PCH_PIC_INT_ID instead. Here name PCH_PIC_INT_ID is used, and PCH_PIC_INT_ID + 4 is used for PCH_PIC_INT_ID_HI. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20250507023148.1877287-2-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
* | Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into stagingStefan Hajnoczi2025-05-122-2/+2
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | trivial patches for 2025-05-09 # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEZKoqtTHVaQM2a/75gqpKJDselHgFAmgeawQACgkQgqpKJDse # lHgRcg/+LmwJJvMViRD/OJFRqp60zBnPyuXFyJJQ3q7lBsE5Vr8xdZUkrGUrQ0p+ # ef6KRnqesaYFH6lEZIJIYXLPalHDIJg6NCHnOphXYoexYQ61e8Y07lmTJlCXK+T8 # rTf230ZC0Jzuy6BM5cmk7cMnNtVp8gPgK5SOK4u5OJSQTBMDb/XZZkLdnjj5ChGJ # aX4qZ9fDLOWJoteXA4QWx6F8K1ONvooS5IMYB6AFJI2xMASq8nVETPXIuSComBDY # 2+krw8hLu6PoPd9yWjlnsE8y4NvNWyRAc2CVm3SI30PEIchvDiQuVJpUD5Q3xZy5 # 2OLD9nv9PqezERbD2ZdSa08VlbEeoyrRinBtZJv7m9qkiU8B4TGDn7hx23MAu6Zx # POF+P1Bc4kixL46pDMll5ETcRr6k184anTvpPWhOynJZBZusc4rX3UHSrVJMsfTx # DPjToUwRw50prtHyuYWWyoxZ+i9BOHAgiT/zOor2tte3xT/mvc8my9m2+YgDHnqE # u8wTnH3zYqexOwLctC3aslSbR1sqqrCsKOA8ZXQ33Ac6kV1q2T4Om4stmRbewjMG # ROsNky2iiKbPsSJsmZHVuv0vy3sHRVWyyp8ClSP5S+gNysEVu/Oka3E0KQ/vg72y # lDA3kNKS2t7ZSPXoLFaSWI6aOnSpKZgNW09wSVDh/AjKV+LbC6c= # =EoxT # -----END PGP SIGNATURE----- # gpg: Signature made Fri 09 May 2025 16:52:20 EDT # gpg: using RSA key 64AA2AB531D56903366BFEF982AA4A243B1E9478 # gpg: Good signature from "Michael Tokarev <mjt@debian.org>" [unknown] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [unknown] # gpg: aka "Michael Tokarev <mjt@tls.msk.ru>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 9D8B E14E 3F2A 9DD7 9199 28F1 61AD 3D98 ECDF 2C8E # Subkey fingerprint: 64AA 2AB5 31D5 6903 366B FEF9 82AA 4A24 3B1E 9478 * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: (21 commits) docs/devel/testing/functional: Fix typo docs: replace `-hda` with `-drive` & update `root=` kernel parameter qapi/machine-target.json: fix "in in" typo in comment hw/display/apple-gfx.m: fix "in in" typo in comment qapi/qom.json: fix "the the" typo in comment include/hw/xen/interface/io/blkif.h: fix "the the" typo in comment include/exec/cpu-common.h: fix "the the" typo in comment hw/xen/xen-hvm-common.c: fix "the the" typo in comment block.c: fix "the the" typo in comment linux-user/mmap.c: fix "of of" typo in comment hw/acpi/pcihp: Fix typo in function name hw/pci-host/gpex-acpi: Fix typo in comment hw/net/e1000: Remove stray empty comment in header qom/object: Fix typo in comment hw/core/machine: Fix indentation hw/i386/acpi-build: Fix typo in function name hw/acpi/ich9: Remove ICH9_DEBUG macro hw/i386/acpi-build: Update document reference hw/i386/acpi-build: Fix typo and grammar in comment hw/isa/ich9: Remove stray empty comment ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * include/hw/xen/interface/io/blkif.h: fix "the the" typo in commentMichael Tokarev2025-05-091-1/+1
| | | | | | | | | | Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * hw/acpi/pcihp: Fix typo in function nameGustavo Romero2025-05-091-1/+1
| | | | | | | | | | | | | | | | | | | | Fix typo in QEMU's ACPI PCI hotplug API function name that checks whether a given bus is hotplug-capable. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* | Merge tag 'pull-vfio-20250509' of https://github.com/legoater/qemu into stagingStefan Hajnoczi2025-05-092-2/+97
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vfio queue: * Preparatory changes for the introduction of CPR support * Automatic enablement of OpRegion for IGD device passthrough * Linux headers update * Preparatory changes for the introduction of vfio-user # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmgd/0kACgkQUaNDx8/7 # 7KHRmRAArw1PXMCmoVBBeLcZ8BZPGjBZHtsvRzwS1yhVnNQadlpDlq4wd9HrfDFK # BTr7//Ag2Q1dKgibesh0A8hSjorXHUGQCmdkcCuGGTFnEwC86q5jCH1lUxgI0cs5 # 3bVwc43zhXGoKqmo07g4f2UFbjDYHe89LgWz2c7TFFGz7Tda/LCOdhnmXlXcIwz+ # v1ocutXd7VbDWvUzN7uZbf0SIH3Zj3p96dwmpLDtdzdliDA0JidNvS27+Z5gtvWe # O+1NW9MDzNfd6zLXCxL3GLeT61WZCe1dRCHEPX4cBo+DhnrifsC25DtJwYlDFvi2 # NMFfGzdKcEVSpeDp7WeM6MJgCZsGHC7ytmAKOKgN2M2kFSj3SI3sTFNlE1rzUhe6 # yjjCa59HzNLIi7L7xYCrVtCLGC/VXOp9kh67Sjs7FY7v778QUEdiudFBdBki7Bwh # bpRhdFJgCLHuKc6XrM7hsMnsRyM28MywyfHDo3M/pRSFNKfeImW6zSMXnyncZztK # W8e8OIz2DBMfH8pIu8hPw9Gsm5VAAs4aVmVFNa0CLl0oBko0Ew2YXcA5pTK5gGqv # x24uc/BhbLcfFUtK0OnP4N/B4rcoADebPV2u4eWoUK3aF5u4+7BY235bFuoTj+sb # 55DPDyWm5cmkX58Tdq46tD39dbD1hlUYkcydPbANH51wYx/lPpc= # =OqYP # -----END PGP SIGNATURE----- # gpg: Signature made Fri 09 May 2025 09:12:41 EDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-vfio-20250509' of https://github.com/legoater/qemu: (28 commits) vfio/container: pass listener_begin/commit callbacks vfio: add vfio-pci-base class vfio: add read/write to device IO ops vector vfio: add region info cache vfio: add device IO ops vector vfio: implement unmap all for DMA unmap callbacks vfio: add unmap_all flag to DMA unmap callback vfio: add vfio_pci_config_space_read/write() vfio: add strread/writeerror() vfio: consistently handle return value for helpers vfio: add vfio_device_get_irq_info() helper vfio: add vfio_attach_device_by_iommu_type() vfio: add vfio_device_unprepare() vfio: add vfio_device_prepare() linux-headers: Update to Linux v6.15-rc3 linux-header: update-linux-header script changes vfio/igd: Remove generation limitation for IGD passthrough vfio/igd: Only emulate GGC register when x-igd-gms is set vfio/igd: Allow overriding GMS with 0xf0 to 0xfe on Gen9+ vfio/igd: Enable OpRegion by default ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * | vfio/container: pass listener_begin/commit callbacksJohn Levon2025-05-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vfio-user container will later need to hook into these callbacks; set up vfio to use them, and optionally pass them through to the container. Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: John Levon <john.levon@nutanix.com> Link: https://lore.kernel.org/qemu-devel/20250507152020.1254632-15-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
| * | vfio: add read/write to device IO ops vectorJohn Levon2025-05-091-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now we have the region info cache, add ->region_read/write device I/O operations instead of explicit pread()/pwrite() system calls. Signed-off-by: John Levon <john.levon@nutanix.com> Link: https://lore.kernel.org/qemu-devel/20250507152020.1254632-13-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
| * | vfio: add region info cacheJohn Levon2025-05-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of requesting region information on demand with VFIO_DEVICE_GET_REGION_INFO, maintain a cache: this will become necessary for performance for vfio-user, where this call becomes a message over the control socket, so is of higher overhead than the traditional path. We will also need it to generalize region accesses, as that means we can't use ->config_offset for configuration space accesses, but must look up the region offset (if relevant) each time. Originally-by: John Johnson <john.g.johnson@oracle.com> Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250507152020.1254632-12-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
| * | vfio: add device IO ops vectorJohn Levon2025-05-091-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For vfio-user, device operations such as IRQ handling and region read/writes are implemented in userspace over the control socket, not ioctl() to the vfio kernel driver; add an ops vector to generalize this, and implement vfio_device_io_ops_ioctl for interacting with the kernel vfio driver. Originally-by: John Johnson <john.g.johnson@oracle.com> Signed-off-by: Elena Ufimtseva <elena.ufimtseva@oracle.com> Signed-off-by: Jagannathan Raman <jag.raman@oracle.com> Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250507152020.1254632-11-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
| * | vfio: add unmap_all flag to DMA unmap callbackJohn Levon2025-05-091-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | We'll use this parameter shortly; this just adds the plumbing. Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250507152020.1254632-9-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
| * | vfio: add strread/writeerror()John Levon2025-05-091-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add simple helpers to correctly report failures from read/write routines using the return -errno style. Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250507152020.1254632-7-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
| * | vfio: add vfio_device_get_irq_info() helperJohn Levon2025-05-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a helper similar to vfio_device_get_region_info() and use it everywhere. Replace a couple of needless allocations with stack variables. As a side-effect, this fixes a minor error reporting issue in the call from vfio_msix_early_setup(). Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: John Levon <john.levon@nutanix.com> Link: https://lore.kernel.org/qemu-devel/20250507152020.1254632-5-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
| * | vfio: add vfio_attach_device_by_iommu_type()John Levon2025-05-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow attachment by explicitly passing a TYPE_VFIO_IOMMU_* string; vfio-user will use this later. Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: John Levon <john.levon@nutanix.com> Link: https://lore.kernel.org/qemu-devel/20250507152020.1254632-4-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
| * | vfio: add vfio_device_unprepare()John Levon2025-05-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a helper that's the inverse of vfio_device_prepare(). Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: John Levon <john.levon@nutanix.com> Link: https://lore.kernel.org/qemu-devel/20250507152020.1254632-3-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
| * | vfio: add vfio_device_prepare()John Levon2025-05-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commonize some initialization code shared by the legacy and iommufd vfio implementations. Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: John Levon <john.levon@nutanix.com> Link: https://lore.kernel.org/qemu-devel/20250507152020.1254632-2-john.levon@nutanix.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* | | Merge tag 'docs-dep-pull-request' of https://gitlab.com/berrange/qemu into ↵Stefan Hajnoczi2025-05-091-20/+38
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging Enable automated removal of deprecated versioned machine types * Remove test relying on 4.1 machine type that is about to be disabled * Fix off-by-1 in deprecation/removal logic for versioned machine types to cope with dev/rc versions * Enable logic for disabling registration of versioned machine types which have exceeded the 6 year lifetime policy. * Add automated version information to documentation about which versioned machine types are deprecated and removed # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE2vOm/bJrYpEtDo4/vobrtBUQT98FAmgc2GwACgkQvobrtBUQ # T9+gpA/+K08Np6taoY3XNYPc6CPxEVXJziR/4JT8wzVHKlz5aNjfWW4LewluRpNg # E+fnUaBWfdwvi2utRG/O+QvVFR5cHATpCBhGzJlAyKymQ7d4jyEjOqgW/euahmrb # A1KuLMmSNOUG5DiDKXnYpJxnfG/Vq36F4JRXlD+wbTtHImZnwkTGpOcaGcbnNQpn # CGC0ih1u1JWVlEWNzgR3pgJNoF5qd++aW6p2Nhl9shRRXs+ocIibkPVI733WwJCM # F11aRuwEAnCxxsS7BU6iSpToTByUQBvWihBJrisg+NvjkTzOG8uu1TBDUCabAU7v # TfjC6prVZPlt1U7tXZLFrw9bk6ldkA7ZiYp5xqCYXSX1pL1USLzwzfjsCglKTAmn # FV0Hn4Dk+TpiQ3KGEZsuRJ/PeRpYQTPlJAjUoC7xNmP1kSGo9yrZtMfOFUwf0MFe # N91N8XyhKiKhxr+CnAoVRiDAvZOts6Se8ELE4mGVXZevP7qd19pMyTQ0V/n6vPHB # GT84bJIcwoBBLjyM2ySOZsMnYTgRuYs1SdrjUaGrwfUnyBE0Sk1j/gTy02s3PdIM # Xcbbt2q4uuCfPF/Iu6ExROMooie8P13J0K13+njYDP6DSr+eG1YESN+qsQefNJYG # Vcf8Nct2LW1KNxt0NV2HkbCnTQu34JT4aw4yyFVTLPDlOFl0++E= # =fKhx # -----END PGP SIGNATURE----- # gpg: Signature made Thu 08 May 2025 12:14:36 EDT # gpg: using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104FDF # gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full] # gpg: aka "Daniel P. Berrange <berrange@redhat.com>" [full] # Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF * tag 'docs-dep-pull-request' of https://gitlab.com/berrange/qemu: include/hw/boards: add warning about changing deprecation logic docs/about/removed-features: auto-generate a note for versioned machine types docs/about/deprecated: auto-generate a note for versioned machine types include/hw/boards: cope with dev/rc versions in deprecation checks Revert "include/hw: temporarily disable deletion of versioned machine types" tests/qtest/q35-test: Remove the obsolete test_without_smram_base test Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * | | include/hw/boards: add warning about changing deprecation logicDaniel P. Berrangé2025-05-081-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we change the deprecation logic in include/hw/boards.h, we must make a corresponding change to docs/conf.py and docs/about/deprecated.rst. Add comments to these files as a warning to future maintainers to keep these files in sync. Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
| * | | include/hw/boards: cope with dev/rc versions in deprecation checksDaniel P. Berrangé2025-05-081-1/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When VERSION is set to a development snapshot (micro >= 50), or a release candidate (micro >= 90) we have an off-by-1 in determining deprecation and deletion thresholds for versioned machine types. In such cases we need to use the next major/minor version in threshold checks. This adapts the deprecation macros to do "next version" prediction when seeing a dev/rc version number. This ensures users of release candidates get an accurate view of machines that will be deprecated/deleted in the final release. This requires hardcoding our current release policy of 3 releases per year, with a major bump at the start of each year, and that dev/rc versions have micro >= 50. Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
| * | | Revert "include/hw: temporarily disable deletion of versioned machine types"Daniel P. Berrangé2025-05-081-18/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit c9fd2d9a48ee3c195cf83cc611b87b09f02f0013. When we introduced the specialized machine type deprecation policy, we allow automatic deprecation to take effect immediately, but blocked the automatic deletion of machine types for 2 releases. This ensured we complied with the historical deprecation policy during the transition window. Startnig with the 10.1.0 dev cycle, the old machine types would be candidates for removal under both the old and new deprecation policies. Thus we can now enable automatic deletion of old machine types, which takes effect by skipping the QOM type registration. This prevents the machine types being listed with '-machine help', and blocks their creation. The actual code can be purged at a convenient time of the maintainer's choosing. In the case of the x86_64 target, this change results in the blocking of the following machine types: pc-i440fx-4.0 Standard PC (i440FX + PIIX, 1996) (deprecated) pc-i440fx-3.1 Standard PC (i440FX + PIIX, 1996) (deprecated) pc-i440fx-3.0 Standard PC (i440FX + PIIX, 1996) (deprecated) pc-i440fx-2.9 Standard PC (i440FX + PIIX, 1996) (deprecated) pc-i440fx-2.8 Standard PC (i440FX + PIIX, 1996) (deprecated) pc-i440fx-2.7 Standard PC (i440FX + PIIX, 1996) (deprecated) pc-i440fx-2.6 Standard PC (i440FX + PIIX, 1996) (deprecated) pc-i440fx-2.5 Standard PC (i440FX + PIIX, 1996) (deprecated) pc-i440fx-2.4 Standard PC (i440FX + PIIX, 1996) (deprecated) pc-i440fx-2.12 Standard PC (i440FX + PIIX, 1996) (deprecated) pc-i440fx-2.11 Standard PC (i440FX + PIIX, 1996) (deprecated) pc-i440fx-2.10 Standard PC (i440FX + PIIX, 1996) (deprecated) pc-q35-4.0.1 Standard PC (Q35 + ICH9, 2009) (deprecated) pc-q35-4.0 Standard PC (Q35 + ICH9, 2009) (deprecated) pc-q35-3.1 Standard PC (Q35 + ICH9, 2009) (deprecated) pc-q35-3.0 Standard PC (Q35 + ICH9, 2009) (deprecated) pc-q35-2.9 Standard PC (Q35 + ICH9, 2009) (deprecated) pc-q35-2.8 Standard PC (Q35 + ICH9, 2009) (deprecated) pc-q35-2.7 Standard PC (Q35 + ICH9, 2009) (deprecated) pc-q35-2.6 Standard PC (Q35 + ICH9, 2009) (deprecated) pc-q35-2.5 Standard PC (Q35 + ICH9, 2009) (deprecated) pc-q35-2.4 Standard PC (Q35 + ICH9, 2009) (deprecated) pc-q35-2.12 Standard PC (Q35 + ICH9, 2009) (deprecated) pc-q35-2.11 Standard PC (Q35 + ICH9, 2009) (deprecated) pc-q35-2.10 Standard PC (Q35 + ICH9, 2009) (deprecated) Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
* | | hw/hyperv/hyperv.h: header cleanupPierrick Bouvier2025-05-081-1/+2
| | | | | | | | | | | | | | | | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-ID: <20250424232829.141163-3-pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
* | | target/migration: Inline VMSTATE_CPU()Philippe Mathieu-Daudé2025-05-081-12/+0
|/ / | | | | | | | | | | | | | | | | | | | | | | VMSTATE_CPU() is only used in 4 places and doesn't provide much, directly inline it using VMSTATE_STRUCT(). This removes the last COMPILING_PER_TARGET in "hw/core/cpu.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Peter Xu <peterx@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250429085148.11876-1-philmd@linaro.org>
* | Merge tag 'pull-target-arm-20250506' of ↵Stefan Hajnoczi2025-05-072-6/+2
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC * arm/hvf: fix crashes when using gdbstub * target/arm/ptw: fix arm_cpu_get_phys_page_attrs_debug * hw/arm/virt: Remove deprecated old versions of 'virt' machine * tests/functional: Add test for imx8mp-evk board with USDHC coverage * hw/arm: Attach PSPI module to NPCM8XX SoC * target/arm: Don't assert() for ISB/SB inside IT block * docs: Don't define duplicate label in qemu-block-drivers.rst.inc * target/arm/kvm: Drop support for kernels without KVM_ARM_PREFERRED_TARGET * hw/pci-host/designware: Fix viewport configuration * hw/gpio/imx_gpio: Fix interpretation of GDIR polarity # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmgaH50ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3l4ED/0QOV6oev1ILqA1INBjY7Ct # VrjzjsynFnUkyU0MLKyuK+mBRYmeR1OWtIRTkbgIsRA23XqV4de/BhGsVCGrRA0r # VS/hV2kTQM0GYU2dCr9LpOC3jX0dDzft5uW9GjW/sW9infAwXRwKhGgkIV6q/G5V # Y6cMN7UXrOnomF8Spk5VvK8HH9OHV/fuSlWenk9X1bXPpVQ3jymqZ1eRSDXOzDdM # uP6lVdI3oHCpRPeXKa1EA8cfQa9M/y9XSzDIrF8OTZKVcIzbX8/XR+y74e4UMIvK # DD3nAuAXcezy3286Pu7OfciRBJfq3eFHZVXOKfQWFI3MStPmexKqoHm8JtQxXJOT # uJdaugItLahlPtNk41nAydYzYimK/MBKCWAfTqecEhZ9Cd64jeOPM9zXwRkXwyuu # n9XQUhm5Ll22urd4q2M8cCxKBP2OoaEBFS4Hn9uDpVDcWpRMLe2DP7ywzZjdLU9b # jLSlana5+wpMuwIasXlNzWgT37RA+xlDE2Snaz7K/Z3JV/XNZAZD6WXV72zTzhFs # EI10edHI+JXXlbT1Ev/yVv4cN9h/Kr3hyoOKat2ySaomW26H27wNPuvPTto4rCYU # 6VQJmJvwPSBWELI5eRbcN269K0ar1UXUsvDsy97cq35me3gFvfAZFksLpnPWKef6 # pvwwPuxLWQXs+chepuQyXA== # =c21p # -----END PGP SIGNATURE----- # gpg: Signature made Tue 06 May 2025 10:41:33 EDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250506' of https://git.linaro.org/people/pmaydell/qemu-arm: (32 commits) hw/arm/virt: Remove deprecated virt-4.0 machine hw/arm/virt: Remove deprecated virt-3.1 machine hw/arm/virt: Remove deprecated virt-3.0 machine hw/arm/virt: Update comment about Multiprocessor Affinity Register hw/gpio/imx_gpio: Fix interpretation of GDIR polarity hw/pci-host/designware: Fix viewport configuration hw/pci-host/designware: Remove unused include target/arm/kvm: Drop support for kernels without KVM_ARM_PREFERRED_TARGET docs: Don't define duplicate label in qemu-block-drivers.rst.inc target/arm: Don't assert() for ISB/SB inside IT block hw/arm: Attach PSPI module to NPCM8XX SoC tests/functional: Add test for imx8mp-evk board with USDHC coverage hw/arm/virt: Remove VirtMachineClass::no_highmem_ecam field hw/arm/virt: Remove deprecated virt-2.12 machine hw/arm/virt: Remove VirtMachineClass::smbios_old_sys_ver field hw/arm/virt: Remove deprecated virt-2.11 machine hw/arm/virt: Remove deprecated virt-2.10 machine hw/arm/virt: Remove deprecated virt-2.9 machine hw/arm/virt: Remove VirtMachineClass::claim_edge_triggered_timers field hw/arm/virt: Remove deprecated virt-2.8 machine ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * hw/arm: Attach PSPI module to NPCM8XX SoCTim Lee2025-05-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nuvoton's PSPI is a general purpose SPI module which enables connections to SPI-based peripheral devices. Attach it to the NPCM8XX. Tested: NPCM8XX PSPI driver probed successfully from dmesg log. Signed-off-by: Tim Lee <timlee660101@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Message-id: 20250414020629.1867106-1-timlee660101@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/virt: Remove VirtMachineClass::no_highmem_ecam fieldPhilippe Mathieu-Daudé2025-05-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | The VirtMachineClass::no_highmem_ecam field was only used by virt-2.12 machine, which got removed. Remove it and simplify virt_instance_init(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/virt: Remove VirtMachineClass::smbios_old_sys_ver fieldPhilippe Mathieu-Daudé2025-05-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | The VirtMachineClass::smbios_old_sys_ver field was only used by virt-2.11 machine, which got removed. Remove it and simplify virt_build_smbios(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/virt: Remove VirtMachineClass::claim_edge_triggered_timers fieldPhilippe Mathieu-Daudé2025-05-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | The VirtMachineClass::claim_edge_triggered_timers field was only used by virt-2.8 machine, which got removed. Remove it and simplify fdt_add_timer_nodes() and build_gtdt(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/virt: Remove VirtMachineClass::no_its fieldPhilippe Mathieu-Daudé2025-05-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | The VirtMachineClass::no_its field was only used by virt-2.7 machine, which got removed. Remove it and simplify virt_instance_init() and virt_acpi_build(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/virt: Remove VirtMachineClass::disallow_affinity_adjustmentPhilippe Mathieu-Daudé2025-05-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | The VirtMachineClass::disallow_affinity_adjustment field was only used by virt-2.6 machine, which got removed. Remove it and simplify virt_cpu_mp_affinity(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> [PMM: Remove now-unused variable] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/virt: Remove VirtMachineClass::no_pmu fieldPhilippe Mathieu-Daudé2025-05-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | The VirtMachineClass::no_pmu field was only used by virt-2.6 machine, which got removed. Remove it and simplify machvirt_init(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | Merge tag 'pull-loongarch-20250506' of https://github.com/bibo-mao/qemu into ↵Stefan Hajnoczi2025-05-065-0/+5
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging loongarch queue # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQQNhkKjomWfgLCz0aQfewwSUazn0QUCaBljTgAKCRAfewwSUazn # 0cSzAPoCbqppm5lUPgFAacD4m1sUI6jLk5pJGMsQTQHkMZ34yQD7BswZhMWPL44Z # LmrZgO7NfqAv96AF1mpRawV9ZXSOGAQ= # =3itp # -----END PGP SIGNATURE----- # gpg: Signature made Mon 05 May 2025 21:18:06 EDT # gpg: using EDDSA key 0D8642A3A2659F80B0B3D1A41F7B0C1251ACE7D1 # gpg: Good signature from "bibo mao <maobibo@loongson.cn>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 7044 3A00 19C0 E97A 31C7 13C4 8E86 8FB7 A176 9D4C # Subkey fingerprint: 0D86 42A3 A265 9F80 B0B3 D1A4 1F7B 0C12 51AC E7D1 * tag 'pull-loongarch-20250506' of https://github.com/bibo-mao/qemu: hw/loongarch/virt: Allow user to customize OEM ID and OEM table ID hw/loongarch/virt: Replace RSDT with XSDT table hw/loongarch/virt: Get physical entry address with elf file hw/intc/loongarch_pch: Replace legacy reset callback with new api hw/intc/loongarch_pch: Add reset support hw/intc/loongarch_extioi: Replace legacy reset callback with new api hw/intc/loongarch_extioi: Add reset support hw/intc/loongarch_ipi: Add reset support Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * hw/intc/loongarch_pch: Replace legacy reset callback with new apiBibo Mao2025-05-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Replace legacy reset callback register device_class_set_legacy_reset() with new function resettable_class_set_parent_phases(). With new API, it will call reset callback of parent object. The internal state has been cleared in parent object LOONGARCH_PIC_COMMON, here parent_phases.hold() is directly called. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
| * hw/intc/loongarch_pch: Add reset supportBibo Mao2025-05-061-0/+1
| | | | | | | | | | | | | | | | | | Add reset support with LoongArch pci irqchip, and register reset callback support with new API resettable_class_set_parent_phases(). Clear internal HW registers and SW state when virt machine resets. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
| * hw/intc/loongarch_extioi: Replace legacy reset callback with new apiBibo Mao2025-05-061-0/+1
| | | | | | | | | | | | | | | | | | Replace legacy reset callback register device_class_set_legacy_reset() with new function resettable_class_set_parent_phases(). With new API, it will call reset callback of parent object and then itself. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
| * hw/intc/loongarch_extioi: Add reset supportBibo Mao2025-05-061-0/+1
| | | | | | | | | | | | | | | | | | Add reset support with extioi irqchip, and register reset callback support with new API resettable_class_set_parent_phases(). Clear internal HW registers and SW state when virt machine resets. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
| * hw/intc/loongarch_ipi: Add reset supportBibo Mao2025-05-061-0/+1
| | | | | | | | | | | | | | | | Add reset support with ipi object, register reset callback and clear internal registers when virt machine resets. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
* | hw/arm/aspeed_ast27x0-tsp: Introduce AST27x0 A1 TSP SoCSteven Lee2025-05-051-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AST2700 TSP(Tertiary Service Processor) is a Cortex-M4 coprocessor The patch adds support for TSP with following update: - Introduce Aspeed27x0TSPSoCState structure in aspeed_soc.h - Implement initialization and realization functions - Add support for UART, INTC, and SCU devices - Map unimplemented devices for IPC and SCUIO - Defined memory map and IRQ maps for AST27x0 A1 TSP SoC The IRQ mapping is similar to AST2700 CA35 SoC, featuring a two-level interrupt controller. Difference from AST2700: - AST2700 - Support GICINT128 to GICINT136 in INTC - The INTCIO GIC_192_201 has 10 output pins, mapped as follows: Bit 0 -> GIC 192 Bit 1 -> GIC 193 Bit 2 -> GIC 194 Bit 3 -> GIC 195 Bit 4 -> GIC 196 - AST2700-tsp - Support TSPINT128 to TSPINT136 in INTC - The INTCIO TSPINT_160_169 has 10 output pins, mapped as follows: Bit 0 -> TSPINT 160 Bit 1 -> TSPINT 161 Bit 2 -> TSPINT 162 Bit 3 -> TSPINT 163 Bit 4 -> TSPINT 164 Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Change-Id: I69eec2b68b26ef04187b2922c5f2e584b9076c66 Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-7-steven_lee@aspeedtech.com [ clg: removed local 'Error* err' in aspeed_soc_ast27x0tsp_realize() ] Signed-off-by: Cédric Le Goater <clg@redhat.com>
* | hw/arm/aspeed_ast27x0-ssp: Introduce AST27x0 A1 SSP SoCSteven Lee2025-05-051-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AST2700 SSP (Secondary Service Processor) is a Cortex-M4 coprocessor. This patch adds support for A1 SSP with the following updates: - Introduce Aspeed27x0SSPSoCState structure in aspeed_soc.h - Define memory map and IRQ map for AST27x0 A1 SSP SoC - Implement initialization and realization functions - Add support for UART, INTC, and SCU devices - Map unimplemented devices for IPC and SCUIO The IRQ mapping is similar to AST2700 CA35 SoC, featuring a two-level interrupt controller. Difference from AST2700: - AST2700 - Support GICINT128 to GICINT136 in INTC - The INTCIO GIC_192_201 has 10 output pins, mapped as follows: Bit 0 -> GIC 192 Bit 1 -> GIC 193 Bit 2 -> GIC 194 Bit 3 -> GIC 195 Bit 4 -> GIC 196 - AST2700-ssp - Support SSPINT128 to SSPINT136 in INTC - The INTCIO SSPINT_160_169 has 10 output pins, mapped as follows: Bit 0 -> SSPINT 160 Bit 1 -> SSPINT 161 Bit 2 -> SSPINT 162 Bit 3 -> SSPINT 163 Bit 4 -> SSPINT 164 Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Change-Id: I924bf1a657f1e83f9e16d6673713f4a06ecdb496 Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-6-steven_lee@aspeedtech.com [ clg: removed local 'Error* err' in aspeed_soc_ast27x0ssp_realize() ] Signed-off-by: Cédric Le Goater <clg@redhat.com>
* | hw/intc/aspeed: Add support for AST2700 TSP INTCSteven Lee2025-05-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Define new types for ast2700tsp INTC and INTCIO - Add register definitions for TSP INTC and INTCIO - Implement write handlers for TSP INTC and INTCIO - Register new types in aspeed_intc_register_types The design of the TSP INTC and INTCIO controllers is similar to AST2700, with the following differences: - AST2700 Support GICINT128 to GICINT136 in INTC The INTCIO GIC_192_201 has 10 output pins, mapped as follows: Bit 0 -> GIC 192 Bit 1 -> GIC 193 Bit 2 -> GIC 194 Bit 3 -> GIC 195 Bit 4 -> GIC 196 - AST2700-tsp Support TSPINT128 to TSPINT136 in INTC The INTCIO TSPINT_160_169 has 10 output pins, mapped as follows: Bit 0 -> TSPINT 160 Bit 1 -> TSPINT 161 Bit 2 -> TSPINT 162 Bit 3 -> TSPINT 163 Bit 4 -> TSPINT 164 Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Change-Id: I3f3aca4b90129640369cf4a92deb4b9a12df5b70 Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-5-steven_lee@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* | hw/intc/aspeed: Add support for AST2700 SSP INTCSteven Lee2025-05-051-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Define new types for ast2700ssp INTC and INTCIO - Add register definitions for SSP INTC and INTCIO - Implement write handlers for SSP INTC and INTCIO - Register new types in aspeed_intc_register_types The design of the SSP INTC and INTCIO controllers is similar to AST2700, with the following differences: - AST2700 Support GICINT128 to GICINT136 in INTC The INTCIO GIC_192_201 has 10 output pins, mapped as follows: Bit 0 -> GIC 192 Bit 1 -> GIC 193 Bit 2 -> GIC 194 Bit 3 -> GIC 195 Bit 4 -> GIC 196 - AST2700-ssp Support SSPINT128 to SSPINT136 in INTC The INTCIO SSPINT_160_169 has 10 output pins, mapped as follows: Bit 0 -> SSPINT 160 Bit 1 -> SSPINT 161 Bit 2 -> SSPINT 162 Bit 3 -> SSPINT 163 Bit 4 -> SSPINT 164 Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Change-Id: Ib8cb0e264505cef48e17f173e057f3b2d1ea35c4 Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-4-steven_lee@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* | aspeed: ast27x0: Map unimplemented devices in SoC memorySteven Lee2025-05-051-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Maps following unimplemented devices in SoC memory - dpmcu - iomem - iomem0 - iomem1 - ltpi Iomem, Iomem0 and Iomem1 include unimplemented controllers in the memory ranges 0x0 - 0x1000000, 0x120000000 - 0x121000000 and 0x14000000 - 0x141000000. For instance: - USB hub at 0x12010000 - eSPI at 0x14C5000 - PWM at 0x140C0000 DPMCU stands for Display Port MCU controller. LTPI is used to connect to AST1700. AST1700 is an I/O expander that supports the DC-SCM 2.1 LTPI protocol. It provides AST2700 with additional GPIO, UART, I3C, and other interfaces. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Change-Id: Iae4db49a4818af3e2c43c16a27fc76329d2405d6 Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250502103449.3091642-2-steven_lee@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* | hw/arm/aspeed: Add support for loading vbootrom image via "-bios"Jamin Lin2025-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce "aspeed_load_vbootrom()" to support loading a virtual boot ROM image into the vbootrom memory region, using the "-bios" command-line option. Introduce a new "vbootrom" field in the AspeedMachineClass to indicate whether a machine supports the virtual boot ROM region. Set this field to true by default for the AST2700-A0 and AST2700-A1 EVB machines. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Nabih Estefan <nabihestefan@google.com> Tested-by: Nabih Estefan <nabihestefan@google.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250424075135.3715128-4-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* | hw/arm/aspeed_ast27x0 Introduce vbootrom memory regionJamin Lin2025-05-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a new vbootrom memory region. The region is mapped at address "0x00000000" and has a size of 128KB, identical to the SRAM region size. This memory region is intended for loading a vbootrom image file as part of the boot process. The vbootrom registered in the SoC's address space using the ASPEED_DEV_VBOOTROM index. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Nabih Estefan <nabihestefan@google.com> Tested-by: Nabih Estefan <nabihestefan@google.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250424075135.3715128-2-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
* | hw/arm: ast27x0: Wire up EHCI controllersTroy Lee2025-05-051-1/+3
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AST27x0 has 4 EHCI controllers, where each CPU and I/O die has 2 instances. This patch use existing TYPE_PLATFORM_EHCI. After wiring up the EHCI controller, the ast2700a1-evb can find up to 4 USB EHCI interfaces. ehci-platform 12061000.usb: EHCI Host Controller ehci-platform 12061000.usb: new USB bus registered, assigned bus number 2 ehci-platform 12063000.usb: EHCI Host Controller ehci-platform 12063000.usb: new USB bus registered, assigned bus number 3 ehci-platform 12061000.usb: irq 88, io mem 0x12061000 ehci-platform 12063000.usb: irq 90, io mem 0x12063000 ehci-platform 14121000.usb: EHCI Host Controller ehci-platform 14123000.usb: EHCI Host Controller ehci-platform 12061000.usb: USB 2.0 started, EHCI 1.00 ehci-platform 14121000.usb: new USB bus registered, assigned bus number 5 ehci-platform 14123000.usb: new USB bus registered, assigned bus number 6 ehci-platform 14121000.usb: irq 91, io mem 0x14121000 ehci-platform 14123000.usb: irq 92, io mem 0x14123000 ehci-platform 12063000.usb: USB 2.0 started, EHCI 1.00 usb usb2: Manufacturer: Linux 6.6.78-dirty-bafd2830c17c-gbafd2830c17c-dirty ehci_hcd usb usb3: Manufacturer: Linux 6.6.78-dirty-bafd2830c17c-gbafd2830c17c-dirty ehci_hcd ehci-platform 14121000.usb: USB 2.0 started, EHCI 1.00 usb usb5: Manufacturer: Linux 6.6.78-dirty-bafd2830c17c-gbafd2830c17c-dirty ehci_hcd ehci-platform 14123000.usb: USB 2.0 started, EHCI 1.00 usb usb6: Manufacturer: Linux 6.6.78-dirty-bafd2830c17c-gbafd2830c17c-dirty ehci_hcd Note that, AST27x0A0 only has 2 EHCI controllers due to hw issue. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250317065938.1902272-2-troy_lee@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>