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| * hw/char/serial.h: Extract serial-isa.hBernhard Beschow2024-10-032-9/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The includes where updated based on compile errors. Now, the inclusion of the header roughly matches Kconfig dependencies: # grep -r -e "select SERIAL_ISA" hw/ppc/Kconfig: select SERIAL_ISA hw/isa/Kconfig: select SERIAL_ISA hw/sparc64/Kconfig: select SERIAL_ISA hw/i386/Kconfig: select SERIAL_ISA hw/i386/Kconfig: select SERIAL_ISA # for serial_hds_isa_init() Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Link: https://lore.kernel.org/r/20240905073832.16222-3-shentey@gmail.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into stagingPeter Maydell2024-10-046-9/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | trivial patches for 2024-10-04 # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEZKoqtTHVaQM2a/75gqpKJDselHgFAmcAEU0ACgkQgqpKJDse # lHgJlhAAmDwxXcHIeNgyOxSmopgKC5VKmux1qvi3PNmM46CGYTDG3s4MIUIRPNhi # zoLQhSdjcFNQi133WoXAWZInTwYCeEe4JbWev7bTDZxoJvZFss6P/DhmSY7tCnaf # QU+XeNl86Iy28glZjiL9EFZi7SM9+OWVF5Dqxd2NlCNA6OlnAtHoVp3bHUqkVgr1 # Lhq+0GRsxhU9bg3eO+yGXVquuOtSMa5LjEqP6kUe6ajo1E4/+GqO9hvfaj8K35Da # B5wa39/MnSN0alnNS8rJUJXxBp2hZt8VamntL86v4kMLQCVGR+KL5FmApZzxzM/r # fY8Ky4b5w8U0BDXnwCcr3A2bYlurC7FhDgBJw3YCQNwbxQbbG7PfbMATD86nfZPd # HTjDjn874reGXgdXt15+3q1zm8kDylMZxEJpRdmsB+uYFVDlNCimPcCPe1YSjVcW # AR5/NubrigpuX8qM5tSiLhjoeAZ0vQjoapGs5zi2dQtg4MltRgi32HPIRq3ooUUg # T2XBhDUElrwwftGQuDN6Vt5Z0EQPP6HDoFLz0VhzWvlsR5DOLjxK4oLsDmQoV34n # 9I4wSmFzwX0Vy0QJIjL6LFec/Ky8uO7QAX5PCLcsEnZy+/q2GsSdwXCPT+SPJ1AL # bEfqLw7U6CSv/eiGOpScCnCLENrw3GXrN31SqtOtgxDPj2lVEsU= # =HYZX # -----END PGP SIGNATURE----- # gpg: Signature made Fri 04 Oct 2024 17:01:17 BST # gpg: using RSA key 64AA2AB531D56903366BFEF982AA4A243B1E9478 # gpg: Good signature from "Michael Tokarev <mjt@debian.org>" [full] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full] # gpg: aka "Michael Tokarev <mjt@tls.msk.ru>" [full] # Primary key fingerprint: 9D8B E14E 3F2A 9DD7 9199 28F1 61AD 3D98 ECDF 2C8E # Subkey fingerprint: 64AA 2AB5 31D5 6903 366B FEF9 82AA 4A24 3B1E 9478 * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: (23 commits) MAINTAINERS: Add myself as maintainer of e500 machines docs/devel: Mention post_load hook restrictions where we document the hook tests/functional: Fix hash validation hw/mips: Build fw_cfg.c once tests/tcg/plugins: Remove remainder of the cris target block-backend: Remove deadcode hw/net/rocker: Remove unused rocker_fp_ports hw/pci: Remove unused pcie_chassis_find_slot replay: Remove unused replay_disable_events remote: Remove unused remote_iohub_finalize vhost: Remove unused vhost_dev_{load|save}_inflight ui/cursor: remove cursor_get_mono_image hw: Remove unused fw_cfg_init_io linux-user: Remove unused handle_vm86_fault hw/char: Remove unused serial_set_frequency hw/net/net_rx_pkt: Remove deadcode net: Remove deadcode q35: Remove unused mch_mcfg_base hw/xen: Remove deadcode MAINTAINERS: remove gensyscalls.sh from the linux-user section ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | hw/pci: Remove unused pcie_chassis_find_slotDr. David Alan Gilbert2024-10-031-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pcie_chassis_find_slot has been unused since it was added. Remove it. Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * | remote: Remove unused remote_iohub_finalizeDr. David Alan Gilbert2024-10-031-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | remote_iohub_finalize has never been used. Remove it. Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org> Reviewed-by: Jagannathan Raman <jag.raman@oracle.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * | vhost: Remove unused vhost_dev_{load|save}_inflightDr. David Alan Gilbert2024-10-031-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vhost_dev_load_inflight and vhost_dev_save_inflight have been unused since they were added in 2019 by: 5ad204bf2a ("vhost-user: Support transferring inflight buffer between qemu and backend") Remove them, and their helper vhost_dev_resize_inflight. Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * | hw: Remove unused fw_cfg_init_ioDr. David Alan Gilbert2024-10-031-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fw_cfg_init_io has been unused since 918a7f706b ("i386: load kernel on xen using DMA") Remove it. Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * | hw/char: Remove unused serial_set_frequencyDr. David Alan Gilbert2024-10-031-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | serial_set_frequnecy has been unused since it was added in 2009: 038eaf82c8 ("serial: Add interface to set reference oscillator frequency") It looks like the 'baudbase' is now a property anyway so the wrapper isn't needed. Remove it. Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * | q35: Remove unused mch_mcfg_baseDr. David Alan Gilbert2024-10-031-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mch_mcfg_base has been unused since it was added by 6f1426ab0f ("ich9: APIs for pc guest info") back in 2013. Remove it. Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org> Reviewed-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * | hw/xen: Remove deadcodeDr. David Alan Gilbert2024-10-031-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xen_be_copy_grant_refs is unused since 2019's 19f87870ba ("xen: remove the legacy 'xen_disk' backend") xen_config_dev_console is unused since 2018's 6d7c06c213 ("Remove broken Xen PV domain builder") Remove them. Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org> Acked-by: Anthony PERARD <anthony.perard@vates.tech> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* | | hw/xen: xenpvh: Disable buffered IOREQs for ARMEdgar E. Iglesias2024-10-031-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a way to enable/disable buffered IOREQs for PVH machines and disable them for ARM. ARM does not support buffered IOREQ's nor the legacy way to map IOREQ info pages. See the following for more details: https://xenbits.xen.org/gitweb/?p=xen.git;a=commitdiff;h=2fbd7e609e1803ac5e5c26e22aa8e4b5a6cddbb1 https://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/ioreq.c;h=2e829d2e7f3760401b96fa7c930e2015fb1cf463;hb=HEAD#l138 Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
* | | hw/xen: Expose handle_bufioreq in xen_register_ioreqEdgar E. Iglesias2024-10-032-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Expose handle_bufioreq in xen_register_ioreq(). This is to allow machines to enable or disable buffered ioreqs. No functional change since all callers still set it to HVM_IOREQSRV_BUFIOREQ_ATOMIC. Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
* | | hw/xen: Remove deadcodeDr. David Alan Gilbert2024-10-031-5/+0
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xen_be_copy_grant_refs is unused since 2019's 19f87870ba ("xen: remove the legacy 'xen_disk' backend") xen_config_dev_console is unused since 2018's 6d7c06c213 ("Remove broken Xen PV domain builder") Remove them. Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org> Acked-by: Anthony PERARD <anthony.perard@vates.tech> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
* | Merge tag 'pull-riscv-to-apply-20241002' of ↵Peter Maydell2024-10-021-2/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/alistair23/qemu into staging RISC-V PR for 9.2 * Add a property to set vl to ceil(AVL/2) * Enable numamem testing for RISC-V * Consider MISA bit choice in implied rule * Fix the za64rs priv spec requirements * Enable Bit Manip for OpenTitan Ibex CPU * Fix the group bit setting of AIA with KVM * Stop timer with infinite timecmp * Add 'fcsr' register to QEMU log as a part of F extension * Fix riscv64 build on musl libc * Add preliminary textra trigger CSR functions * RISC-V bsd-user support * Respect firmware ELF entry point * Add Svvptc extension support * Fix masking of rv32 physical address * Fix linking problem with semihosting disabled * Fix IMSIC interrupt state updates # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEaukCtqfKh31tZZKWr3yVEwxTgBMFAmb83lYACgkQr3yVEwxT # gBNndBAAmh66yWt9TeTHlQ/rgBhx2nUMBbfICBWQyNGvPlslffwrNoLkh8jpkuiP # PD0RQArAAGeM09cgCZCu14JzIBmmNiGgUxsUnqOZvUw18uIlLFlpt/tiT7iGw/Xb # pfI7waF66/FPXBErY2yiw9/RGQLlkiGNBC9FNYrD/kCahf9MSIobv85tOgSQ2qjH # nOJ+UBN0TQ1x0Z5lJMj9Pzl1WDvelRnCkYI5nXg1heKG73Hm7GmHt99QpTV2Okqn # T3jFzEfMTQeHO4nC/X2pbaesE62K+mTg/FZpId2iV8lMCSm1zKof+xJ4boKM9RB2 # 0HjXAT+MveLuLUNtgfbV9C+VgU25M+wnfy5tH0l801Y/Gez8Q1fbK2uykuiyiUSy # MNNk/KzmOYuffwItuyeL3mmWHXsN+izUIeMmMxfL9X9nssZXRsrDXc+MByS7w0fk # QOeZmXHTxXwxFymr0t0DLK2eKEG6cqQty1KWp6iLx3uwnMTGo+576P41Q+boj64s # VllWzmuR0Ta0xuSR4sDvEFCO7OCFEgVdn1j0FvhRFskPEDrbQgXRLq8i3awtU6z1 # NIh+A30XeK+EZLv0sEje6gav5lZHWMfAeCOKJstVzOl8+NQibuKTUrsqLgTrBK6K # plw8qwvZYjSnYErzHfywlq9ArufIvOHYcx9Nb76tLNy9E+y01yo= # =15Hm # -----END PGP SIGNATURE----- # gpg: Signature made Wed 02 Oct 2024 06:47:02 BST # gpg: using RSA key 6AE902B6A7CA877D6D659296AF7C95130C538013 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6AE9 02B6 A7CA 877D 6D65 9296 AF7C 9513 0C53 8013 * tag 'pull-riscv-to-apply-20241002' of https://github.com/alistair23/qemu: (35 commits) bsd-user: Add RISC-V 64-bit Target Configuration and Debug XML Files bsd-user: Implement set_mcontext and get_ucontext_sigreturn for RISCV bsd-user: Implement 'get_mcontext' for RISC-V bsd-user: Implement RISC-V signal trampoline setup functions bsd-user: Define RISC-V signal handling structures and constants bsd-user: Add generic RISC-V64 target definitions bsd-user: Define RISC-V system call structures and constants bsd-user: Define RISC-V VM parameters and helper functions bsd-user: Add RISC-V thread setup and initialization support bsd-user: Implement RISC-V sysarch system call emulation bsd-user: Add RISC-V signal trampoline setup function bsd-user: Define RISC-V register structures and register copying bsd-user: Add RISC-V ELF definitions and hardware capability detection bsd-user: Implement RISC-V TLS register setup bsd-user: Implement RISC-V CPU register cloning and reset functions bsd-user: Add RISC-V CPU execution loop and syscall handling bsd-user: Implement RISC-V CPU initialization and main loop hw/intc: riscv-imsic: Fix interrupt state updates. target/riscv/cpu_helper: Fix linking problem with semihosting disabled target/riscv32: Fix masking of physical address ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | hw/riscv: Respect firmware ELF entry pointSamuel Holland2024-10-021-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When riscv_load_firmware() loads an ELF, the ELF segment addresses are used, not the passed-in firmware_load_addr. The machine models assume the firmware entry point is what they provided for firmware_load_addr, and use that address to generate the boot ROM, so if the ELF is linked at any other address, the boot ROM will jump to empty memory. Pass back the ELF entry point to use when generating the boot ROM, so the boot ROM can jump to firmware loaded anywhere in RAM. For example, on the virt machine, this allows using an OpenSBI fw_dynamic.elf built with FW_TEXT_START values other than 0x80000000. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240817002651.3209701-1-samuel.holland@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* | hw: Remove omap2 specific defines and enumsPeter Maydell2024-10-011-207/+0
| | | | | | | | | | | | | | | | | | | | Remove some defines and enums that are OMAP2 specific and no longer used anywhere. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-54-peter.maydell@linaro.org
* | hw/dma: Remove omap_dma4 devicePeter Maydell2024-10-011-1/+0
| | | | | | | | | | | | | | | | | | | | The omap_dma4 device was only used in the OMAP2 SoC, which has been removed. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-53-peter.maydell@linaro.org
* | hw/misc: Remove omap_l4 devicePeter Maydell2024-10-011-42/+0
| | | | | | | | | | | | | | | | | | The omap_l4 device is OMAP2 only, so we can remove it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-51-peter.maydell@linaro.org
* | hw/display: Remove omap_dssPeter Maydell2024-10-011-19/+0
| | | | | | | | | | | | | | The omap_dss device is OMAP2 only, and we are removing it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240903160751.4100218-50-peter.maydell@linaro.org
* | hw/misc: Remove omap_tap devicePeter Maydell2024-10-011-3/+0
| | | | | | | | | | | | | | | | | | The omap_tap device is OMAP2 only, and we are removing it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-49-peter.maydell@linaro.org
* | hw/ssi: Remove omap_mcspiPeter Maydell2024-10-011-11/+0
| | | | | | | | | | | | | | | | The omap_mcspi device is used only in the OMAP2 SoC, which we are removing. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240903160751.4100218-48-peter.maydell@linaro.org
* | hw/timer: Remove omap_synctimerPeter Maydell2024-10-011-8/+0
| | | | | | | | | | | | | | | | | | Remove the omap_synctimer device, which is only in the OMAP2 SoC. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-46-peter.maydell@linaro.org
* | hw/timer: Remove omap_gptimerPeter Maydell2024-10-011-8/+0
| | | | | | | | | | | | | | | | | | | | The omap_gptimer device is only in the OMAP2 SoC, which we are removing. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-45-peter.maydell@linaro.org
* | hw/misc: Remove omap_gpmcPeter Maydell2024-10-011-11/+0
| | | | | | | | | | | | | | | | | | The omap_gpmc device is only in OMAP2, which we are removing. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-44-peter.maydell@linaro.org
* | hw/misc: Remove omap_sdrc devicePeter Maydell2024-10-011-7/+0
| | | | | | | | | | | | | | | | | | The omap_sdrc device is only in OMAP2, which we are removing. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-43-peter.maydell@linaro.org
* | hw/sd: Remove omap2_mmc devicePeter Maydell2024-10-011-5/+0
| | | | | | | | | | | | | | | | | | Remove the OMAP2 specific code from omap_mmc.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-42-peter.maydell@linaro.org
* | hw/char: Remove omap2_uartPeter Maydell2024-10-011-5/+0
| | | | | | | | | | | | | | | | | | Remove the OMAP2 specific code from omap_uart.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-40-peter.maydell@linaro.org
* | hw/gpio: Remove TYPE_OMAP2_GPIOPeter Maydell2024-10-011-8/+0
| | | | | | | | | | | | | | | | | | | | | | We've removed the OMAP2 SoC, so we can remove the OMAP2 GPIO device. (The source file remains, as it also has the model of the OMAP1 GPIO device.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-39-peter.maydell@linaro.org
* | hw/arm: Remove omap2.cPeter Maydell2024-10-011-8/+0
| | | | | | | | | | | | | | | | | | | | The users of the OMAP2 SoC emulation have been removed, so we can delete omap2.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-38-peter.maydell@linaro.org
* | hw/usb: Remove MUSB USB host controllerPeter Maydell2024-10-011-49/+0
| | | | | | | | | | | | | | | | | | | | Remove the MUSB USB2.0 OTG-compliant USB host controller device model. This was only used by the tusb6010 USB controller in the n800/n810 machines. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20240903160751.4100218-35-peter.maydell@linaro.org
* | hw/block: Remove OneNAND devicePeter Maydell2024-10-011-3/+0
| | | | | | | | | | | | | | | | | | The OneNAND devices were only used by n800/n810, so they can be removed now. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20240903160751.4100218-33-peter.maydell@linaro.org
* | hw/input: Remove lm832x devicePeter Maydell2024-10-011-28/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the lm832x keyboard-and-pwm i2c device model. This was only used by the n800 and n810 machines. (Although this is an i2c device and so in theory available to create on the command line, in practice it has an outbound IRQ line that the machine model needs to wire up, and the only way to inject keys events into it is to call the lm832x_key_event() function, so it isn't in practice possible to use it separately from the n800/n810.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20240903160751.4100218-32-peter.maydell@linaro.org
* | hw/input: Remove tsc210x devicePeter Maydell2024-10-012-37/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the tsc210x touchscreen controller device, which was only used by the n800 and n810 and cheetah. The uWireSlave struct is still used in omap1.c (at least for compilation purposes -- nothing any longer calls omap_uwire_attach() and so the struct's members will not be used at runtime), so we move it into omap.h so we can delete tsc2xxx.h. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20240903160751.4100218-30-peter.maydell@linaro.org
* | hw/input: Remove tsc2005 touchscreen controllerPeter Maydell2024-10-011-5/+0
| | | | | | | | | | | | | | | | | | Remove the tsc2005 touchscreen controller, which was only used by the n800 and n810 machines. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20240903160751.4100218-29-peter.maydell@linaro.org
* | hw/display: Remove Blizzard display devicePeter Maydell2024-10-011-21/+0
| | | | | | | | | | | | | | | | | | Remove the blizzard display device, which was only used with the n800 and n810 machines. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20240903160751.4100218-28-peter.maydell@linaro.org
* | hw/misc: Remove cbusPeter Maydell2024-10-011-31/+0
| | | | | | | | | | | | | | | | | | | | | | The devices in hw/misc/cbus.c were used only by the now-removed nseries machine types, so they can be removed. As this is the last use of the CONFIG_NSERIES define we can remove that from KConfig now. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240903160751.4100218-27-peter.maydell@linaro.org
* | hw/arm: Remove pxa2xx_picPeter Maydell2024-10-011-74/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the pxa2xx-specific interrupt controller device. As this is the last user of the pxa.h header file and the CONFIG_PXA2XX define we can remove those too. This completes the removal of the pxa2xx specific code. We leave: * pxa2xx_timer -- still used by the Collie board (strongarm) * the definitions of the CPUs themselves in target/arm (still usable by linux-user mode) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240903160751.4100218-23-peter.maydell@linaro.org
* | hw/arm: Remove pxa2xx_gpioPeter Maydell2024-10-011-5/+0
| | | | | | | | | | | | | | | | Remove the pxa2xx-specific GPIO device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-22-peter.maydell@linaro.org
* | hw/pcmcia: Remove pxa2xx pcmcia devicePeter Maydell2024-10-011-8/+0
| | | | | | | | | | | | | | | | Remove the pxa2xx specific pcmcia device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-21-peter.maydell@linaro.org
* | hw/dma: Remove pxa2xx_dmaPeter Maydell2024-10-011-4/+0
| | | | | | | | | | | | | | | | Remove the pxa2xx-specific pxa2xx_dma device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-20-peter.maydell@linaro.org
* | hw/display: Remove pxa2xx_lcd.cPeter Maydell2024-10-011-6/+0
| | | | | | | | | | | | | | Remove the pxa2xx-specific pxa2xx_lcd device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240903160751.4100218-19-peter.maydell@linaro.org
* | hw/input: Remove pxa2xx_keypadPeter Maydell2024-10-011-12/+0
| | | | | | | | | | | | | | | | | | Remove the pxa2xx-specific pxa2xx_keypad device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-18-peter.maydell@linaro.org
* | hw/sd: Remove pxa2xx_mmci.cPeter Maydell2024-10-011-10/+0
| | | | | | | | | | | | | | | | | | Remove the pxa2xx-specific pxa2xx_mmci device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-17-peter.maydell@linaro.org
* | hw/arm: Remove pxa2xx.cPeter Maydell2024-10-011-78/+0
| | | | | | | | | | | | | | | | | | | | | | All the callers of pxa270_init() and pxa255_init() have now been removed, so we can remove pxa2xx.c. This also removes the only uses of a lot of pxa2xx specific devices, which will be removed in subsequent commits. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-16-peter.maydell@linaro.org
* | hw/display: Remove tc6393xb devicePeter Maydell2024-10-011-21/+0
| | | | | | | | | | | | | | | | The tc6393xb was used only by the XScale-based Zaurus machine types. Now they have been removed we can remove this device too. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240903160751.4100218-7-peter.maydell@linaro.org
* | hw/arm/xlnx: Connect secondary CGEM IRQsKinsey Moore2024-10-012-0/+2
|/ | | | | | | | | | | | | | | The Cadence GEM peripherals as configured for Zynq MPSoC and Versal platforms have two priority queues with separate interrupt sources for each. If the interrupt source for the second priority queue is not connected, they work in polling mode only. This change connects the second interrupt source for platforms where it is available. This patch has been tested using the lwIP stack with a Xilinx-supplied driver from their embeddedsw repository. Signed-off-by: Kinsey Moore <kinsey.moore@oarcorp.com> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* Merge tag 'mem-2024-09-24' of https://github.com/davidhildenbrand/qemu into ↵Peter Maydell2024-09-263-1/+8
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging Hi, "Host Memory Backends" and "Memory devices" queue ("mem"): - Kconfig fix for virtio-based memory devices - virtio-mem support for suspend+wake-up with plugged memory - hostmem fix when specifying "merge=off" # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEG9nKrXNcTDpGDfzKTd4Q9wD/g1oFAmbyikMRHGRhdmlkQHJl # ZGhhdC5jb20ACgkQTd4Q9wD/g1q6MBAAitNST73Shc+j327WvRLHQDkzkAlIYm+M # E8NqtDiV11h7A0eNVu+5BkY/ejtY0Fduae3nxIkrHjK20eHHpiNPUp3hBNIhkKs3 # vlSaU8FLGdt58CteMGcLYsP2E32WNNTckaFGwGjDmyUEfk+Gug4r/rJAZXDfuuLV # 083I0/MuUF+ozPA0c2MrOwhoBPerg3a5aflVpbgPwGNrT9BHMjo62Q5QzG3U7mxr # HnlLAScSXsYg2z+d5XLXkKLAiZ4C7UN4vfUAOZwqkfs7IFUTtFO/ev6e7VZI747n # XhAqOAKzLqPu7tBPZJIC6jwZAUIv5yM0/v5qhVvVVdu7H0ZMtSCXyvCVtnT25Rsn # yiA+XvCOb7yQ3hRbBIi60IzjNYfWbvw+oTVIDfXkG35TeNf4ZdjWtAiUmw9s5U9Q # z0tINsD7VlSkbh5h3PkFw1+xagIuJAVkp673HHTtQsg+xgYK2ur5jhhWJdJlnpzA # 77CAu07UaqU39ssnC2zeGG1eNRA4uzjwQtREzqH2jMfkw/7UuUeXMF+v/fEuLn6w # JneSMq/a0gmD42HNae0Y40cn2Akfj6+wFu1rW3djF8F6TeLUSssQhbQSHCMwGoOg # qX7O/3SeSRzlnp3Zyx9Tr7s+BkMz0EGGDe17GQwTQUX2t5wR5iXoGqpKZgOBA8En # 6uUIcjBUckc= # =PExj # -----END PGP SIGNATURE----- # gpg: Signature made Tue 24 Sep 2024 10:45:39 BST # gpg: using RSA key 1BD9CAAD735C4C3A460DFCCA4DDE10F700FF835A # gpg: issuer "david@redhat.com" # gpg: Good signature from "David Hildenbrand <david@redhat.com>" [marginal] # gpg: aka "David Hildenbrand <davidhildenbrand@gmail.com>" [full] # gpg: aka "David Hildenbrand <hildenbr@in.tum.de>" [unknown] # Primary key fingerprint: 1BD9 CAAD 735C 4C3A 460D FCCA 4DDE 10F7 00FF 835A * tag 'mem-2024-09-24' of https://github.com/davidhildenbrand/qemu: hostmem: Apply merge property after the memory region is initialized virtio-mem: Add support for suspend+wake-up with plugged memory virtio-mem: Use new Resettable framework instead of LegacyReset reset: Add RESET_TYPE_WAKEUP reset: Use ResetType for qemu_devices_reset() and MachineClass::reset() virtio: kconfig: memory devices are PCI only Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * virtio-mem: Use new Resettable framework instead of LegacyResetJuraj Marcin2024-09-241-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LegacyReset does not pass ResetType to the reset callback method, which the new Resettable framework uses. Due to this, virtio-mem cannot use the new RESET_TYPE_WAKEUP to skip the reset during wake-up from a suspended state. This patch adds overrides Resettable interface methods in VirtIOMEMClass to use the new Resettable framework and replaces qemu_[un]register_reset() calls with qemu_[un]register_resettable(). Message-ID: <20240904103722.946194-4-jmarcin@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Juraj Marcin <jmarcin@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
| * reset: Add RESET_TYPE_WAKEUPJuraj Marcin2024-09-241-0/+2
| | | | | | | | | | | | | | | | | | | | | | Some devices need to distinguish cold start reset from waking up from a suspended state. This patch adds new value to the enum, and updates the i386 wakeup method to use this new reset type. Message-ID: <20240904103722.946194-3-jmarcin@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Juraj Marcin <jmarcin@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
| * reset: Use ResetType for qemu_devices_reset() and MachineClass::reset()Juraj Marcin2024-09-241-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, both qemu_devices_reset() and MachineClass::reset() use ShutdownCause for the reason of the reset. However, the Resettable interface uses ResetState, so ShutdownCause needs to be translated to ResetType somewhere. Translating it qemu_devices_reset() makes adding new reset types harder, as they cannot always be matched to a single ShutdownCause here, and devices may need to check the ResetType to determine what to reset and if to reset at all. This patch moves this translation up in the call stack to qemu_system_reset() and updates all MachineClass children to use the ResetType instead. Message-ID: <20240904103722.946194-2-jmarcin@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Juraj Marcin <jmarcin@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com>
* | Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into stagingPeter Maydell2024-09-254-4/+3
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | trivial patches for 2024-09-20 # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEZKoqtTHVaQM2a/75gqpKJDselHgFAmbtJJUACgkQgqpKJDse # lHjduhAAoZSS5+n2f8C4w4oboH9e5JSa6UAuVqGgju10SHm+VNgg2rQeeTD+J8uU # vXL5lZKIb/jPNfHmsS5Q8CsuzV0M+A0wCcZJHaK5clVc1pZWMqwPPT4g4BUyjURi # ptvQXWtTM049DDWZZXo+AHPQtko7f58EThn9fLBo/1yJe2UlBwhZwahKm3h66kkb # aO9TI9UVt06DmXAvPBK9IfgFjYzkUJRQnLLmJDXiLx6YbuixX+J2PjKav5NtacRE # KUArkLNfB00ouFYDOoLAnn/l+VWKIYkREeKbfQIj95BoejqAKsDztq35+oiRQbCZ # CznKgXMIBNJCCYvKJXAoZeslE3n7Q0dlJ3RppClBjzHOiZTM46yeTofzzFot7SCN # ERuV1WcTo53ooDvpvlP9S3d3P2i62eL5JPXgpN57Zuy7PTYQkcDq5wMTWlvm/OBy # /hzcmIm1KHrprjf/+aNRdeCT27Rf1YD8EiTaabgtTZA4r00DrTpopAJs8ncKfbrA # nxa8e7lNorx/PcBSJJA5iB1Q05y19eoLJcrCFMieFuG2s/oubm+bXrAuNjsSuJbS # Lq50dIO6UIJSrV59w0CTBDrOuVXUv8/jbqRCUBMEzbXfz8mW9e8PXL+evVa8rKfk # 6EMmDqC0/CmRrHT5uKkqTLtxcYGagdww3WIUB88UgARxydRPhu8= # =++OB # -----END PGP SIGNATURE----- # gpg: Signature made Fri 20 Sep 2024 08:30:29 BST # gpg: using RSA key 64AA2AB531D56903366BFEF982AA4A243B1E9478 # gpg: Good signature from "Michael Tokarev <mjt@debian.org>" [full] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full] # gpg: aka "Michael Tokarev <mjt@tls.msk.ru>" [full] # Primary key fingerprint: 9D8B E14E 3F2A 9DD7 9199 28F1 61AD 3D98 ECDF 2C8E # Subkey fingerprint: 64AA 2AB5 31D5 6903 366B FEF9 82AA 4A24 3B1E 9478 * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: (22 commits) license: Update deprecated SPDX tag GPL-2.0 to GPL-2.0-only license: Update deprecated SPDX tag GPL-2.0+ to GPL-2.0-or-later license: Update deprecated SPDX tag LGPL-2.0+ to LGPL-2.0-or-later license: Simplify GPL-2.0-or-later license descriptions tests/functional: Correct typo in test_netdev_ethtool.py SPDX tag tests/bench: Rename test_akcipher_keys.inc -> test_akcipher_keys.c.inc target/hexagon: Rename macros.inc -> macros.h.inc tests/functional: Put the or1k_sim test into the slow category tests/qemu-iotests/testenv: Use the "r2d" machine for sh4/sh4eb tests/qemu-iotests/testenv: Use the "virt" machine for or1k util/cutils: Remove unused qemu_get_exec_dir hw/sysbus: Remove unused sysbus_mmio_unmap envlist: Remove unused envlist_parse hw/display: Fix mirrored output in dm163 hw/virtio/Kconfig: Include vhost-user-scmi only on arm targets tests/unit: Really build pbkdf test on macOS hw/loongarch/virt: Add description for virt machine type hw/mips/jazz: fix typo in in-built NIC alias ppc: fix incorrect spelling of PowerMac linux-user/syscall.c: eliminate other explicit LFS usages ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>