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* target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPERAaron Lindsay2019-01-211-17/+279
* target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0Aaron Lindsay2019-01-211-0/+57
* target/arm: Make PMCEID[01]_EL0 64 bit registers, add PMCEID[23]Aaron Lindsay2019-01-211-2/+17
* target/arm: Implement PMOVSSETAaron Lindsay2019-01-211-0/+28
* target/arm: Allow AArch32 access for PMCCFILTRAaron Lindsay2019-01-211-1/+26
* target/arm: Filter cycle counter based on PMCCFILTR_EL0Aaron Lindsay2019-01-211-7/+89
* target/arm: Swap PMU values before/after migrationsAaron Lindsay2019-01-211-2/+4
* target/arm: Reorganize PMCCNTR accessesAaron Lindsay2019-01-211-45/+69
* target/arm: Add PAuth system registersRichard Henderson2019-01-211-0/+70
* target/arm: Reuse aa64_va_parameters for setting tbflagsRichard Henderson2019-01-211-46/+24
* target/arm: Decode TBID from TCRRichard Henderson2019-01-211-3/+11
* target/arm: Add aa64_va_parameters_bothRichard Henderson2019-01-211-2/+8
* target/arm: Export aa64_va_parameters to internals.hRichard Henderson2019-01-211-2/+2
* target/arm: Merge TBFLAG_AA_TB{0, 1} to TBIIRichard Henderson2019-01-211-3/+2
* target/arm: Create ARMVAParameters and helpersRichard Henderson2019-01-211-128/+150
* target/arm: Introduce arm_stage1_mmu_idxRichard Henderson2019-01-211-0/+7
* target/arm: Introduce arm_mmu_idxRichard Henderson2019-01-211-11/+16
* target/arm: Move cpu_mmu_index out of lineRichard Henderson2019-01-211-0/+44
* target/arm: Add PAuth active bit to tbflagsRichard Henderson2019-01-211-0/+19
* target/arm: Allow Aarch32 exception return to switch from Mon->HypAlexander Graf2019-01-211-1/+1
* target/arm: Convert ARM_TBFLAG_* to FIELDsRichard Henderson2019-01-071-25/+24
* target/arm: Implement the ARMv8.1-LOR extensionRichard Henderson2018-12-131-0/+75
* target/arm: Use arm_hcr_el2_eff more placesRichard Henderson2018-12-131-7/+5
* target/arm: Introduce arm_hcr_el2_effRichard Henderson2018-12-131-9/+57
* target/arm: Implement the ARMv8.2-AA32HPD extensionRichard Henderson2018-12-131-8/+29
* target/arm: Implement the ARMv8.1-HPD extensionRichard Henderson2018-12-131-7/+20
* target/arm: Tidy scr_writeRichard Henderson2018-12-131-5/+9
* target/arm: Fix HCR_EL2.TGE check in arm_phys_excp_target_elRichard Henderson2018-12-131-3/+0
* target/arm: Move id_aa64mmfr* to ARMISARegistersPeter Maydell2018-12-131-2/+2
* target/arm: Hyp mode R14 is shared with User and SystemPeter Maydell2018-11-131-14/+15
* target/arm: Correctly implement handling of HCR_EL2.{VI, VF}Peter Maydell2018-11-131-2/+18
* Revert "target/arm: Implement HCR.VI and VF"Peter Maydell2018-11-131-43/+4
* target/arm: Fix typo in tlbi_aa64_vmalle1_writeRichard Henderson2018-11-131-1/+1
* target/arm: Remove antique TODO commentPeter Maydell2018-11-131-1/+0
* target/arm: Remove workaround for small SAU regionsPeter Maydell2018-11-131-12/+0
* target/arm: Fix ATS1Hx instructionsPeter Maydell2018-11-061-2/+2
* target/arm: Set S and PTW in 64-bit PAR formatPeter Maydell2018-11-061-4/+6
* target/arm: Only flush tlb if ASID changesRichard Henderson2018-10-241-5/+3
* target/arm: Remove writefn from TTBR0_EL3Richard Henderson2018-10-241-1/+1
* target/arm: Report correct syndrome for FP/SIMD traps to Hyp modePeter Maydell2018-10-241-0/+9
* target/arm: Get IL bit correct for v7 syndrome valuesPeter Maydell2018-10-241-0/+13
* target/arm: New utility function to extract EC from syndromePeter Maydell2018-10-241-2/+2
* target/arm: Implement HCR.PTWPeter Maydell2018-10-241-1/+20
* target/arm: Implement HCR.VI and VFPeter Maydell2018-10-241-4/+43
* target/arm: ISR_EL1 bits track virtual interrupts if IMO/FMO setPeter Maydell2018-10-241-4/+18
* target/arm: Implement HCR.DCPeter Maydell2018-10-241-2/+21
* target/arm: Implement HCR.FBPeter Maydell2018-10-241-72/+113
* target/arm: Make switch_mode() file-localPeter Maydell2018-10-241-2/+4
* target/arm: Improve debug logging of AArch32 exception returnPeter Maydell2018-10-241-0/+10
* target/arm: Convert v8.2-fp16 from feature bit to aa64pfr0 testRichard Henderson2018-10-241-1/+1