| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | target/arm: move translate modules to tcg/ | Fabiano Rosas | 2023-02-27 | 1 | -88/+0 |
| * | target/arm: Implement SME integer outer product | Richard Henderson | 2022-07-11 | 1 | -0/+10 |
| * | target/arm: Implement FMOPA, FMOPS (widening) | Richard Henderson | 2022-07-11 | 1 | -0/+1 |
| * | target/arm: Implement BFMOPA, BFMOPS | Richard Henderson | 2022-07-11 | 1 | -0/+2 |
| * | target/arm: Implement FMOPA, FMOPS (non-widening) | Richard Henderson | 2022-07-11 | 1 | -0/+9 |
| * | target/arm: Implement SME ADDHA, ADDVA | Richard Henderson | 2022-07-11 | 1 | -0/+11 |
| * | target/arm: Implement SME LDR, STR | Richard Henderson | 2022-07-11 | 1 | -0/+7 |
| * | target/arm: Implement SME LD1, ST1 | Richard Henderson | 2022-07-11 | 1 | -0/+9 |
| * | target/arm: Implement SME MOVA | Richard Henderson | 2022-07-11 | 1 | -0/+15 |
| * | target/arm: Implement SME ZERO | Richard Henderson | 2022-07-11 | 1 | -0/+4 |
| * | target/arm: Add infrastructure for disas_sme | Richard Henderson | 2022-07-11 | 1 | -0/+20 |