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* target/hexagon: Replace MO_TE -> MO_LEPhilippe Mathieu-Daudé2025-04-251-1/+1
| | | | | | | | | | We only build the Hexagon target using little endianness order. The MO_TE definition always expands to MO_LE. Use the latter to simplify. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20250312103238.99981-3-philmd@linaro.org>
* target/hexagon: Rename macros.inc -> macros.h.incPhilippe Mathieu-Daudé2024-09-202-2/+2
| | | | | | | | | | | | | | | | | | | | | Since commits 139c1837db ("meson: rename included C source files to .c.inc") and 0979ed017f ("meson: rename .inc.h files to .h.inc"), EMU standard procedure for included header files is to use *.h.inc. Besides, since commit 6a0057aa22 ("docs/devel: make a statement about includes") this is documented in the Coding Style: If you do use template header files they should be named with the ``.c.inc`` or ``.h.inc`` suffix to make it clear they are being included for expansion. Therefore rename "macros.inc" as "macros.h.inc". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Brian Cain <bcain@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* target/hexagon/idef-parser: Remove self-assignmentAnton Johansson2024-08-071-1/+0
| | | | | | | | | | | | The self assignment is clearly useless, and @1.last_column does not have to be set for an expression with only a single token, so remove it. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Brian Cain <bcain@quicinc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230713120853.27023-1-anjo@rev.ng> Signed-off-by: Brian Cain <bcain@quicinc.com>
* target/hexagon: idef-parser simplify predicate initAnton Johansson2024-06-082-14/+14
| | | | | | | | | | | | Only predicate instruction arguments need to be initialized by idef-parser. This commit removes registers from the init_list and simplifies gen_inst_init_args() slightly. Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Reviewed-by: Brian Cain <bcain@quicinc.com> Message-Id: <20240523125901.27797-5-anjo@rev.ng> Signed-off-by: Brian Cain <bcain@quicinc.com>
* target/hexagon: idef-parser fix leak of init_listAnton Johansson2024-06-081-1/+8
| | | | | | | | | | | | | | | | | gen_inst_init_args() is called for instructions using a predicate as an rvalue. Upon first call, the list of arguments which might need initialization init_list is freed to indicate that they have been processed. For instructions without an rvalue predicate, gen_inst_init_args() isn't called and init_list will never be freed. Free init_list from free_instruction() if it hasn't already been freed. A comment in free_instruction is also updated. Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Reviewed-by: Brian Cain <bcain@quicinc.com> Message-Id: <20240523125901.27797-4-anjo@rev.ng> Signed-off-by: Brian Cain <bcain@quicinc.com>
* target/hexagon: idef-parser remove undefined functionsAnton Johansson2024-06-081-13/+0
| | | | | | | | Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Reviewed-by: Brian Cain <bcain@quicinc.com> Message-Id: <20240523125901.27797-3-anjo@rev.ng> Signed-off-by: Brian Cain <bcain@quicinc.com>
* target/hexagon: idef-parser remove unused definesAnton Johansson2024-06-081-10/+0
| | | | | | | | | | | | | | Before switching to GArray/g_string_printf we used fixed size arrays for output buffers and instructions arguments among other things. Macros defining the sizes of these buffers were left behind, remove them. Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Reviewed-by: Brian Cain <bcain@quicinc.com> Message-Id: <20240523125901.27797-2-anjo@rev.ng> Signed-off-by: Brian Cain <bcain@quicinc.com>
* hexagon: correct typosManos Pitsidianakis2024-02-211-1/+1
| | | | | | | | | | | Correct typos automatically found with the `typos` tool <https://crates.io/crates/typos> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* Hexagon (target/hexagon) Clean up handling of modifier registersTaylor Simpson2024-01-211-5/+3
| | | | | | | | | | | | | | | | Currently, the register number (MuN) for modifier registers is the modifier register number rather than the index into hex_gpr. This patch changes MuN to the hex_gpr index, which is consistent with the handling of control registers. Note that HELPER(fcircadd) needs the CS register corresponding to the modifier register specified in the instruction. We create a TCGv variable "CS" to hold the value to pass to the helper. Reviewed-by: Brian Cain <bcain@quicinc.com> Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com> Message-Id: <20231210220712.491494-2-ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <bcain@quicinc.com>
* target/hexagon/idef-parser/prepare: use env to invoke bashSamuel Tardieu2023-11-281-1/+1
| | | | | | | | | | | This file is the only one involved in the compilation process which still uses the /bin/bash path. Signed-off-by: Samuel Tardieu <sam@rfc1149.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-ID: <20231123211506.636533-1-sam@rfc1149.net> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
* tcg: Rename cpu_env to tcg_envRichard Henderson2023-10-031-1/+1
| | | | | | | Allow the name 'cpu_env' to be used for something else. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* hexagon: spelling fixesMichael Tokarev2023-09-083-5/+5
| | | | | Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Brian Cain <bcain@quicinc.com>
* target/hexagon: Include helper-gen.h where neededRichard Henderson2023-06-051-1/+2
| | | | | | | | | This had been included via tcg-op-common.h via tcg-op.h, but that is going away. In idef-parser.y, shuffle some tcg related includes into a more logical order. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hexagon: fix = vs. == mishapPaolo Bonzini2023-05-182-3/+3
| | | | | | | | | | | | | | | **** Changes in v2 **** Fix yyassert's for sign and zero extends Coverity reports a parameter that is "set but never used". This is caused by an assignment operator being used instead of equality. Co-authored-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Tested-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230428204411.1400931-1-tsimpson@quicinc.com>
* Hexagon (target/hexagon) Additional instructions handled by idef-parserTaylor Simpson2023-05-184-40/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | **** Changes in v3 **** Fix bugs exposed by dpmpyss_rnd_s0 instruction Set correct size/signedness for constants Test cases added to tests/tcg/hexagon/misc.c **** Changes in v2 **** Fix bug in imm_print identified in clang build Currently, idef-parser skips all floating point instructions. However, there are some floating point instructions that can be handled. The following instructions are now parsed F2_sfimm_p F2_sfimm_n F2_dfimm_p F2_dfimm_n F2_dfmpyll F2_dfmpylh To make these instructions work, we fix some bugs in parser-helpers.c gen_rvalue_extend gen_cast_op imm_print lexer properly sets size/signedness of constants Test cases added to tests/tcg/hexagon/fpstuff.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Tested-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230501203125.4025991-1-tsimpson@quicinc.com>
* Hexagon (target/hexagon) Move new_pred_value to DisasContextTaylor Simpson2023-05-181-1/+1
| | | | | | | | | | | | The new_pred_value array in the CPUHexagonState is only used for bookkeeping within the translation of a packet. With recent changes that eliminate the need to free TCGv variables, these make more sense to be transient and kept in DisasContext. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230427230012.3800327-19-tsimpson@quicinc.com>
* Hexagon (target/hexagon) Add DisasContext arg to gen_log_reg_writeTaylor Simpson2023-05-181-1/+1
| | | | | | | | Add DisasContext arg to gen_log_reg_write_pair also Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230427230012.3800327-3-tsimpson@quicinc.com>
* target/Hexagon: Finish conversion to tcg_gen_qemu_{ld, st}_*Richard Henderson2023-05-051-15/+13
| | | | | | | | | | | | Convert away from the old interface with the implicit MemOp argument. Importantly, this removes some incorrect casts generated by idef-parser's gen_load(). Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230502135741.1158035-4-richard.henderson@linaro.org>
* Hexagon (target/hexagon) Updates to USR should use get_result_gprTaylor Simpson2023-04-212-3/+4
| | | | | | Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230405164211.30015-3-tsimpson@quicinc.com>
* Hexagon (target/hexagon) Reduce manipulation of slot_cancelledTaylor Simpson2023-03-063-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We only need to track slot for predicated stores and predicated HVX instructions. Add arguments to the probe helper functions to indicate if the slot is predicated. Here is a simple example of the differences in the TCG code generated: IN: 0x00400094: 0xf900c102 { if (P0) R2 = and(R0,R1) } BEFORE ---- 00400094 mov_i32 slot_cancelled,$0x0 mov_i32 new_r2,r2 and_i32 tmp0,p0,$0x1 brcond_i32 tmp0,$0x0,eq,$L1 and_i32 tmp0,r0,r1 mov_i32 new_r2,tmp0 br $L2 set_label $L1 or_i32 slot_cancelled,slot_cancelled,$0x8 set_label $L2 mov_i32 r2,new_r2 AFTER ---- 00400094 mov_i32 new_r2,r2 and_i32 tmp0,p0,$0x1 brcond_i32 tmp0,$0x0,eq,$L1 and_i32 tmp0,r0,r1 mov_i32 new_r2,tmp0 br $L2 set_label $L1 set_label $L2 mov_i32 r2,new_r2 Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230307025828.1612809-14-tsimpson@quicinc.com>
* Hexagon (target/hexagon) Remove gen_log_predicated_reg_write[_pair]Taylor Simpson2023-03-061-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We assign the instruction destination register to hex_new_value[num] instead of a TCG temp that gets copied back to hex_new_value[num]. We introduce new functions get_result_gpr[_pair] to facilitate getting the proper destination register. Since we preload hex_new_value for predicated instructions, we don't need the check for slot_cancelled. So, we call gen_log_reg_write instead. We update the helper function generation and gen_tcg.h to maintain the disable-hexagon-idef-parser configuration. Here is a simple example of the differences in the TCG code generated: IN: 0x00400094: 0xf900c102 { if (P0) R2 = and(R0,R1) } BEFORE ---- 00400094 mov_i32 slot_cancelled,$0x0 mov_i32 new_r2,r2 mov_i32 loc2,$0x0 and_i32 tmp0,p0,$0x1 brcond_i32 tmp0,$0x0,eq,$L1 and_i32 tmp0,r0,r1 mov_i32 loc2,tmp0 br $L2 set_label $L1 or_i32 slot_cancelled,slot_cancelled,$0x8 set_label $L2 and_i32 tmp0,slot_cancelled,$0x8 movcond_i32 new_r2,tmp0,$0x0,loc2,new_r2,eq mov_i32 r2,new_r2 AFTER ---- 00400094 mov_i32 slot_cancelled,$0x0 mov_i32 new_r2,r2 and_i32 tmp0,p0,$0x1 brcond_i32 tmp0,$0x0,eq,$L1 and_i32 tmp0,r0,r1 mov_i32 new_r2,tmp0 br $L2 set_label $L1 or_i32 slot_cancelled,slot_cancelled,$0x8 set_label $L2 mov_i32 r2,new_r2 We'll remove the unnecessary manipulation of slot_cancelled in a subsequent patch. Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230307025828.1612809-13-tsimpson@quicinc.com>
* Hexagon (target/hexagon) Analyze packet before generating TCGTaylor Simpson2023-03-061-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | We create a new generator that creates an analyze_<tag> function for each instruction. Currently, these functions record the writes to R, P, and C registers by calling ctx_log_reg_write[_pair] or ctx_log_pred_write. During gen_start_packet, we invoke the analyze_<tag> function for each instruction in the packet, and we mark the implicit register and predicate writes. Doing the analysis up front has several advantages - We remove calls to ctx_log_* from gen_tcg_funcs.py and genptr.c - After the analysis is performed, we can initialize hex_new_value for each of the predicated assignments rather than during TCG generation for the instructions - This is a stepping stone for future work where the analysis will include the set of registers that are read. In cases where the packet doesn't have an overlap between the registers that are written and registers that are read, we can avoid the intermediate step of writing to hex_new_value. Note that other checks will also be needed (e.g., no instructions can raise an exception). Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230307025828.1612809-6-tsimpson@quicinc.com>
* target/hexagon/idef-parser: Remove unused code pathsAnton Johansson2023-03-065-80/+4
| | | | | | | | | | | Removes code paths used by COF instructions, which are no longer processed by idef-parser. Tested-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230131223133.8592-1-anjo@rev.ng>
* target/hexagon/idef-parser: Elide mov in gen_pred_assignRichard Henderson2023-03-061-3/+1
| | | | | | | | | | | Merge mov with andi. Suggested-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20230306225724.2105263-1-richard.henderson@linaro.org>
* target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_opRichard Henderson2023-03-051-27/+3
| | | | | | | | | We already have a temporary, res, which we can use for the intermediate shift result. Simplify the constant to -1 instead of 0xf*f. This was the last use of gen_tmp_value, so remove it. Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_predRichard Henderson2023-03-051-1/+1
| | | | | | | | | The allocation is immediately followed by either tcg_gen_mov_i32 or gen_read_preg (which contains tcg_gen_mov_i32), so the zero initialization is immediately discarded. Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hexagon/idef-parser: Use gen_tmp for gen_pred_assignRichard Henderson2023-03-051-1/+1
| | | | | | | | The allocation is immediately followed by tcg_gen_mov_i32, so the initial assignment of zero is discarded. Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hexagon/idef-parser: Use gen_tmp for LPCFGRichard Henderson2023-03-053-8/+2
| | | | | | | | | The GET_USR_FIELD macro initializes the output, so the initial assignment of zero is discarded. This is the only use of get_tmp_value outside of parser-helper.c, so make it static. Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hexagon: Use tcg_constant_* for gen_constant_from_immRichard Henderson2023-03-051-8/+7
| | | | | | | Rename from gen_tmp_value_from_imm to match gen_constant vs gen_tmp. Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hexagon/idef-parser: Drop HexValue.is_manualRichard Henderson2023-03-053-18/+0
| | | | | | | This field is no longer used. Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hexagon/idef-parser: Drop tcg_temp_freeRichard Henderson2023-03-054-164/+0
| | | | | | | | | Translators are no longer required to free tcg temporaries. This removes gen_rvalue_free, gen_rvalue_free_manual and free_variables, whose only purpose was to emit tcg_temp_free. Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hexagon/idef-parser: Drop gen_tmp_localRichard Henderson2023-03-011-22/+2
| | | | | | | | This is now equivalent to gen_tmp. Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hexagon: Don't use tcg_temp_local_new_*Richard Henderson2023-03-012-4/+4
| | | | | | | | Since tcg_temp_new_* is now identical, use those. Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* target/hexagon: suppress unused variable warningAlessandro Di Federico2023-01-051-0/+2
| | | | | | | | | | | | | | | | | | | This patch manually suppresses a warning for an unused variable (yynerrs) emitted by bison. This warning has been triggered for the first time by clang 15. This patch also disables `-Wextra`, which is not usually adopted in QEMU. However, clang 15 triggers the warning fixed in this patch even in absence of `-Wextra`. Signed-off-by: Alessandro Di Federico <ale@rev.ng> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Tested-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20221221155327.1504117-1-ale@rev.ng>
* target/hexagon/idef-parser: fix two typos in READMEMatheus Tavares Bernardino2023-01-051-2/+2
| | | | | | | | Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Alessandro Di Federico <ale@rev.ng> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <fe67371e03f9dde38eb7554937da0a96a230730e.1672174122.git.quic_mathbern@quicinc.com>
* target/hexagon: import parser for idef-parserAnton Johansson2022-12-163-0/+3701
| | | | | | | | | Signed-off-by: Alessandro Di Federico <ale@rev.ng> Signed-off-by: Paolo Montesel <babush@rev.ng> Signed-off-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20220923173831.227551-10-anjo@rev.ng>
* target/hexagon: import lexer for idef-parserPaolo Montesel2022-12-162-0/+724
| | | | | | | | | Signed-off-by: Alessandro Di Federico <ale@rev.ng> Signed-off-by: Paolo Montesel <babush@rev.ng> Signed-off-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20220923173831.227551-9-anjo@rev.ng>
* target/hexagon: prepare input for the idef-parserAlessandro Di Federico2022-12-162-0/+164
| | | | | | | | | | | | Introduce infrastructure necessary to produce a file suitable for being parsed by the idef-parser. A build option is also added to fully disable the output of idef-parser, which is useful for debugging. Signed-off-by: Alessandro Di Federico <ale@rev.ng> Signed-off-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20220923173831.227551-8-anjo@rev.ng>
* target/hexagon: import README for idef-parserAlessandro Di Federico2022-12-161-0/+722
Signed-off-by: Alessandro Di Federico <ale@rev.ng> Signed-off-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20220923173831.227551-3-anjo@rev.ng>