summary refs log tree commit diff stats
path: root/target/i386/tcg/decode-new.c.inc (follow)
Commit message (Expand)AuthorAgeFilesLines
* target/i386: implement CMPccXADDPaolo Bonzini2023-12-291-0/+25
* target/i386: introduce flags writeback mechanismPaolo Bonzini2023-12-291-0/+34
* target/i386: adjust decoding of J operandPaolo Bonzini2023-12-291-10/+0
* target/i386: do not decode string source/destination into decode->memPaolo Bonzini2023-12-291-18/+2
* target/i386: add X86_SPECIALs for MOVSX and MOVZXPaolo Bonzini2023-12-291-5/+13
* target/i386: rename zext0/zext2 and make them closer to the manualPaolo Bonzini2023-12-291-8/+8
* target/i386: reimplement check for validity of LOCK prefixPaolo Bonzini2023-12-291-7/+10
* target/i386: document more deviations from the manualPaolo Bonzini2023-12-291-0/+12
* target/i386: validate VEX.W for AVX instructionsPaolo Bonzini2023-10-251-42/+102
* target/i386: group common checks in the decoding phasePaolo Bonzini2023-10-251-21/+64
* target/i386: implement SHA instructionsPaolo Bonzini2023-10-251-0/+11
* accel/tcg: Replace CPUState.env_ptr with cpu_env()Richard Henderson2023-10-041-1/+1
* tcg: Rename cpu_env to tcg_envRichard Henderson2023-10-031-1/+1
* target/i386: fix memory operand size for CVTPS2PDPaolo Bonzini2023-09-011-2/+12
* target/i386: generalize operand size "ph" for use in CVTPS2PDPaolo Bonzini2023-09-011-3/+3
* target/i386: Check CR0.TS before enter_mmxMatt Borgerson2023-08-041-4/+6
* target/i386: Fix exception classes for MOVNTPS/MOVNTPD.Ricky Zhou2023-05-181-2/+3
* target/i386: Fix exception classes for SSE/AVX instructions.Ricky Zhou2023-05-181-23/+23
* target/i386: Fix and add some comments next to SSE/AVX instructions.Ricky Zhou2023-05-181-12/+12
* target/i386: fix operand size for VCOMI/VUCOMI instructionsPaolo Bonzini2023-05-181-2/+13
* target/i386: Drop tcg_temp_freeRichard Henderson2023-03-051-15/+0
* target/i386: fix operand size of unary SSE operationsPaolo Bonzini2023-01-111-5/+6
* target/i386: allow MMX instructions with CR4.OSFXSR=0Paolo Bonzini2022-12-011-1/+2
* target/i386: implement FMA instructionsPaolo Bonzini2022-10-221-0/+40
* target/i386: implement F16C instructionsPaolo Bonzini2022-10-201-0/+8
* target/i386: remove old SSE decoderPaolo Bonzini2022-10-181-3/+0
* target/i386: move 3DNow to the new decoderPaolo Bonzini2022-10-181-0/+10
* target/i386: implement VLDMXCSR/VSTMXCSRPaolo Bonzini2022-10-181-0/+25
* target/i386: reimplement 0x0f 0x28-0x2f, add AVXPaolo Bonzini2022-10-181-0/+56
* target/i386: reimplement 0x0f 0x10-0x17, add AVXPaolo Bonzini2022-10-181-0/+126
* target/i386: reimplement 0x0f 0xc2, 0xc4-0xc6, add AVXPaolo Bonzini2022-10-181-0/+5
* target/i386: reimplement 0x0f 0x38, add AVXPaolo Bonzini2022-10-181-2/+110
* target/i386: reimplement 0x0f 0x3a, add AVXPaolo Bonzini2022-10-181-0/+75
* target/i386: reimplement 0x0f 0xd0-0xd7, 0xe0-0xe7, 0xf0-0xf7, add AVXPaolo Bonzini2022-10-181-0/+53
* target/i386: reimplement 0x0f 0x70-0x77, add AVXPaolo Bonzini2022-10-181-4/+88
* target/i386: reimplement 0x0f 0x78-0x7f, add AVXPaolo Bonzini2022-10-181-0/+51
* target/i386: reimplement 0x0f 0x50-0x5f, add AVXPaolo Bonzini2022-10-181-0/+43
* target/i386: reimplement 0x0f 0xd8-0xdf, 0xe8-0xef, 0xf8-0xff, add AVXPaolo Bonzini2022-10-181-0/+28
* target/i386: reimplement 0x0f 0x60-0x6f, add AVXPaolo Bonzini2022-10-181-0/+42
* target/i386: move scalar 0F 38 and 0F 3A instruction to new decoderPaolo Bonzini2022-10-181-0/+59
* target/i386: validate SSE prefixes directly in the decoding tablePaolo Bonzini2022-10-181-0/+37
* target/i386: validate VEX prefixes via the instructions' exception classesPaolo Bonzini2022-10-181-1/+163
* target/i386: add CPUID feature checks to new decoderPaolo Bonzini2022-10-181-0/+55
* target/i386: add ALU load/writeback corePaolo Bonzini2022-10-181-1/+32
* target/i386: add core of new i386 decoderPaolo Bonzini2022-10-181-0/+748