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path: root/target/ppc/internal.h (follow)
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* exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' headerPhilippe Mathieu-Daudé2024-04-261-0/+1
* target/ppc: Define powerpc_pm_insn_t in 'internal.h'Philippe Mathieu-Daudé2023-11-071-0/+9
* hw/core/cpu: Return static value with gdb_arch_name()Akihiko Odaki2023-10-111-1/+1
* target/ppc: Implement watchpoint debug facility for v2.07SNicholas Piggin2023-09-061-0/+1
* target/ppc: Implement breakpoint debug facility for v2.07SNicholas Piggin2023-09-061-0/+2
* target/ppc: Machine check on invalid real address access on POWER9/10Nicholas Piggin2023-07-071-0/+5
* target/ppc/internal: Restrict MMU declarations to sysemuPhilippe Mathieu-Daudé2023-02-271-0/+5
* target/ppc: Implement new wait variantsNicholas Piggin2022-07-281-0/+3
* target/ppc: Move mffscrn[i] to decodetreeVíctor Colombo2022-07-061-3/+0
* target/ppc: Implemented xvi*ger* instructionsLucas Mateus Castro (alqotel)2022-05-261-0/+15
* compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau2022-04-211-3/+3
* target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemuRichard Henderson2021-11-021-5/+3
* target/ppc: Implement ppc_cpu_record_sigsegvRichard Henderson2021-11-021-0/+9
* hw/core: Make do_unaligned_access noreturnRichard Henderson2021-09-211-2/+2
* target/ppc: divided mmu_helper.c in 2 filesLucas Mateus Castro (alqotel)2021-08-271-0/+39
* target/ppc: removed all mentions to PPC_DUMP_CPUBruno Larsen (billionai)2021-06-031-2/+0
* target/ppc: Introduce prot_for_access_typeRichard Henderson2021-05-191-0/+19
* target/ppc: move opcode table logic to translate.cBruno Larsen (billionai)2021-05-041-0/+8
* target/ppc: code motion from translate_init.c.inc to gdbstub.cBruno Larsen (billionai)2021-05-041-0/+5
* powerpc tcg: Fix Lesser GPL version numberChetan Pant2020-11-151-1/+1
* ppc/: fix some comment spelling errorszhaolichang2020-10-281-1/+1
* ppc: Add support for 'mffscrn','mffscrni' instructionsPaul A. Clarke2019-10-041-0/+3
* target/ppc: remove getVSR()/putVSR() from int_helper.cMark Cave-Ayland2019-07-021-12/+0
* target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian...Mark Cave-Ayland2019-03-121-4/+4
* target/ppc: move Vsr* macros from internal.h to cpu.hMark Cave-Ayland2019-03-121-19/+0
* target/ppc: implement complete set of Vsr* macrosMark Cave-Ayland2019-02-041-1/+8
* target/ppc: move FP and VMX registers into aligned vsr register arrayMark Cave-Ayland2019-01-091-14/+4
* target/ppc: merge ppc_vsr_t and ppc_avr_t union typesMark Cave-Ayland2019-01-091-11/+0
* target/ppc: switch EXTRACT_HELPER macros over to use sextract32/extract32Mark Cave-Ayland2019-01-091-4/+4
* target/ppc: fix typo in SIMM5 extraction helperMark Cave-Ayland2019-01-091-1/+1
* target/ppc: Add do_unaligned_access hookRichard Henderson2018-07-031-0/+5
* target-ppc: implement load atomic instructionBalamuruhan S2017-02-221-0/+2
* ppc: implement xsrqpi[x] instructionJose Ricardo Ziviani2017-02-221-0/+1
* target-ppc: Add xststdc[sp, dp, qp] instructionsNikunj A Dadhania2017-02-021-0/+1
* target-ppc: Add xvtstdc[sp,dp] instructionsNikunj A Dadhania2017-02-021-2/+3
* target-ppc: Add xsaddqp instructionsBharata B Rao2017-01-311-0/+2
* target-ppc: Use correct precision for FPRF settingBharata B Rao2017-01-311-0/+1
* target-ppc: Add xscvdphp, xscvhpdpBharata B Rao2017-01-311-0/+3
* target-ppc: move ppc_vsr_t to common headerNikunj A Dadhania2017-01-311-0/+42
* target-ppc: implement lxv/lxvx and stxv/stxvxNikunj A Dadhania2017-01-311-0/+1
* target-ppc: Consolidate instruction decode helpersBharata B Rao2017-01-311-0/+151
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+50