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path: root/target/riscv/vector_helper.c (follow)
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* target/riscv/vector_helper.c: optimize loops in ldst helpersDaniel Henrique Barboza2024-03-221-3/+3
* target/riscv/vector_helpers: do early exit when vstart >= vlDaniel Henrique Barboza2024-03-221-0/+66
* target/riscv: always clear vstart for ldst_whole insnsDaniel Henrique Barboza2024-03-221-0/+5
* target/riscv: always clear vstart in whole vec move insnsDaniel Henrique Barboza2024-03-221-0/+5
* target/riscv/vector_helper.c: fix 'vmvr_v' memcpy endianessDaniel Henrique Barboza2024-03-221-1/+9
* target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX()Daniel Henrique Barboza2024-03-221-0/+1
* target/riscv: Fix shift count overflowdemin.han2024-03-081-3/+2
* target/riscv: change vext_get_vlmax() argumentsDaniel Henrique Barboza2024-02-091-6/+10
* target/riscv/vector_helper.c: use vlenb in HELPER(vsetvl)Daniel Henrique Barboza2024-02-091-2/+9
* target/riscv/vector_helper.c: use 'vlenb'Daniel Henrique Barboza2024-02-091-9/+9
* target/riscv: Replace cpu_mmu_index with riscv_env_mmu_indexRichard Henderson2024-02-031-4/+5
* target/riscv: Fix vfwmaccbf16.vfMax Chou2023-10-121-1/+1
* tcg: Correct invalid mentions of 'softmmu' by 'system-mode'Philippe Mathieu-Daudé2023-10-071-1/+1
* target/riscv: vector_helper: Fixup local variables shadowingAlistair Francis2023-09-291-3/+4
* target/riscv: Refactor some of the generic vector functionalityKiran Ostrolenk2023-09-111-42/+0
* target/riscv: Refactor some of the generic vector functionalityKiran Ostrolenk2023-09-111-200/+1
* target/riscv: Fix page_check_range use in fault-only-firstLIU Zhiwei2023-09-111-1/+1
* target/translate: Include missing 'exec/cpu_ldst.h' headerPhilippe Mathieu-Daudé2023-08-311-0/+1
* include/exec: Replace target_ulong with abi_ptr in cpu_[st|ld]*()Anton Johansson2023-08-241-1/+1
* target/riscv: Fix LMUL check to use VLENRob Bradford2023-07-191-2/+2
* accel/tcg: Return bool from page_check_rangeRichard Henderson2023-07-151-1/+1
* target/riscv: Add support for Zvfbfwma extensionWeiwei Li2023-07-101-0/+11
* target/riscv: Add support for Zvfbfmin extensionWeiwei Li2023-07-101-0/+6
* target/riscv/vector_helper.c: Remove the check for extra tail elementsXiao Wang2023-06-131-16/+6
* target/riscv/vector_helper.c: clean up reference of MTYPEXiao Wang2023-06-131-5/+1
* target/riscv: Fix pointer mask transformation for vector addressWeiwei Li2023-06-131-1/+1
* target/riscv/vector_helper.c: skip set tail when vta is zeroDaniel Henrique Barboza2023-06-131-3/+8
* target/riscv: Fix lines with over 80 charactersWeiwei Li2023-05-051-26/+50
* target/riscv: Fix format for commentsWeiwei Li2023-05-051-33/+49
* target/riscv: Fix format for indentationWeiwei Li2023-05-051-78/+81
* target/riscv/vector_helper.c: avoid env_archcpu() when reading RISCVCPUConfigDaniel Henrique Barboza2023-03-011-10/+10
* target/riscv/vector_helper.c: create vext_set_tail_elems_1s()Daniel Henrique Barboza2023-03-011-56/+30
* target/riscv: Fix vslide1up.vf and vslide1down.vfLIU Zhiwei2023-02-231-2/+2
* cleanup: Tweak and re-run return_directly.cocciMarkus Armbruster2022-12-141-21/+7
* treewide: Remove the unnecessary space before semicolonBin Meng2022-10-241-1/+1
* target/riscv: rvv-1.0: vf[w]redsum distinguish between ordered/unorderedYang Liu2022-09-271-6/+13
* target/riscv: rvv-1.0: Simplify vfwredsum codeYang Liu2022-09-271-46/+10
* target/riscv: rvv: Add mask agnostic for vector permutation instructionsYueh-Ting (eop) Chen2022-09-071-2/+24
* target/riscv: rvv: Add mask agnostic for vector mask instructionsYueh-Ting (eop) Chen2022-09-071-0/+11
* target/riscv: rvv: Add mask agnostic for vector floating-point instructionsYueh-Ting (eop) Chen2022-09-071-0/+26
* target/riscv: rvv: Add mask agnostic for vector fix-point arithmetic instruct...Yueh-Ting (eop) Chen2022-09-071-10/+16
* target/riscv: rvv: Add mask agnostic for vector integer comparison instructionsYueh-Ting (eop) Chen2022-09-071-0/+10
* target/riscv: rvv: Add mask agnostic for vector integer shift instructionsYueh-Ting (eop) Chen2022-09-071-0/+7
* target/riscv: rvv: Add mask agnostic for vx instructionsYueh-Ting (eop) Chen2022-09-071-0/+3
* target/riscv: rvv: Add mask agnostic for vector load / store instructionsYueh-Ting (eop) Chen2022-09-071-11/+24
* target/riscv: rvv: Add mask agnostic for vv instructionsYueh-Ting (eop) Chen2022-09-071-0/+8
* target/riscv: rvv: Add tail agnostic for vector permutation instructionseopXD2022-06-101-0/+40
* target/riscv: rvv: Add tail agnostic for vector mask instructionseopXD2022-06-101-0/+30
* target/riscv: rvv: Add tail agnostic for vector reduction instructionseopXD2022-06-101-0/+20
* target/riscv: rvv: Add tail agnostic for vector floating-point instructionseopXD2022-06-101-196/+244