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path: root/target/xtensa/cpu.h (follow)
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* target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h'Philippe Mathieu-Daudé2024-04-261-3/+0
* include/exec: Implement cpu_mmu_index genericallyRichard Henderson2024-02-031-5/+0
* target/xtensa: use generic instruction breakpoint infrastructureMax Filippov2024-01-191-0/+4
* target/xtensa: Use generic cpu_list()Gavin Shan2024-01-051-3/+0
* target: Move ArchCPUClass definition to 'cpu.h'Philippe Mathieu-Daudé2023-11-071-2/+18
* target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'Philippe Mathieu-Daudé2023-11-071-2/+0
* target: Unify QOM stylePhilippe Mathieu-Daudé2023-11-071-2/+0
* accel/tcg: Move CPUNegativeOffsetState into CPUStateRichard Henderson2023-10-031-2/+1
* target: Widen pc/cs_base in cpu_get_tb_cpu_stateAnton Johansson2023-06-261-2/+2
* target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemuPhilippe Mathieu-Daudé2023-02-271-1/+1
* target/xtensa: add clock input to xtensa CPUMax Filippov2022-05-061-0/+5
* compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau2022-04-211-3/+3
* Move CPU softfloat unions to cpu-float.hMarc-André Lureau2022-04-061-0/+1
* Replace TARGET_WORDS_BIGENDIANMarc-André Lureau2022-04-061-1/+1
* Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau2022-04-061-1/+1
* target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé2022-03-061-1/+1
* target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé2022-03-061-2/+0
* target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé2022-03-061-4/+3
* target: Use forward declared type instead of structure typePhilippe Mathieu-Daudé2022-03-061-1/+1
* target/xtensa: Make xtensa_cpu_tlb_fill sysemu onlyRichard Henderson2021-11-021-1/+1
* hw/core: Make do_unaligned_access noreturnRichard Henderson2021-09-211-2/+2
* include/exec: Move cpu_signal_handler declarationRichard Henderson2021-09-211-2/+0
* target/xtensa: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé2021-09-141-2/+2
* target/xtensa: Restrict do_transaction_failed() to sysemuPhilippe Mathieu-Daudé2021-09-141-0/+2
* target/xtensa: don't generate extra EXCP_DEBUG on exceptionMax Filippov2021-05-201-7/+0
* target/xtensa: add DFPU registers and opcodesMax Filippov2020-08-211-0/+3
* target/xtensa: add DFPU optionMax Filippov2020-08-211-0/+2
* target/xtensa: support copying registers up to 64 bits wideMax Filippov2020-08-211-0/+1
* target/xtensa: add geometry to xtensa_get_regfile_by_nameMax Filippov2020-08-211-1/+1
* target/xtensa: implement NMI supportMax Filippov2020-08-211-0/+1
* target/xtensa: make opcode properties more dynamicMax Filippov2020-08-211-4/+1
* target/xtensa: fetch HW version from configuration overlayMax Filippov2020-05-171-0/+1
* target/xtensa: statically allocate xtensa_insnbufs in DisasContextMax Filippov2020-04-071-0/+3
* gdbstub: extend GByteArray to read register helpersAlex Bennée2020-03-171-1/+1
* target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIXRichard Henderson2020-01-151-4/+0
* target/xtensa: fix ps.ring use in MPU configsMax Filippov2020-01-061-3/+7
* target/xtensa: linux-user: add call0 ABI supportMax Filippov2019-09-111-0/+3
* configure: Define target access alignment in configuretony.nguyen@bt.com2019-08-201-2/+0
* Include qemu-common.h exactly where neededMarkus Armbruster2019-06-121-1/+0
* cpu: Remove CPU_COMMONRichard Henderson2019-06-101-2/+0
* cpu: Introduce CPUNegativeOffsetStateRichard Henderson2019-06-101-0/+1
* cpu: Move ENV_OFFSET to exec/gen-icount.hRichard Henderson2019-06-101-2/+0
* target/xtensa: Use env_cpu, env_archcpuRichard Henderson2019-06-101-11/+6
* cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson2019-06-101-2/+0
* cpu: Define ArchCPURichard Henderson2019-06-101-0/+1
* cpu: Define CPUArchState with typedefRichard Henderson2019-06-101-2/+2
* tcg: Split out target/arch/cpu-param.hRichard Henderson2019-06-101-16/+5
* Merge remote-tracking branch 'remotes/xtensa/tags/20190520-xtensa' into stagingPeter Maydell2019-05-211-23/+35
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| * target/xtensa: implement exclusive access optionMax Filippov2019-05-151-0/+2
| * target/xtensa: update list of exception causesMax Filippov2019-05-151-4/+5