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path: root/tcg/loongarch64/tcg-target-con-set.h (follow)
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* tcg/loongarch64: Use C_N2_I1 for INDEX_op_qemu_ld_a*_i128Richard Henderson2023-11-061-1/+1
* tcg/loongarch64: Implement 128-bit load & storeJiajie Chen2023-09-161-0/+2
* tcg/loongarch64: Lower bitsel_vec to vbitselJiajie Chen2023-09-151-0/+1
* tcg/loongarch64: Lower vector bitwise operationsJiajie Chen2023-09-151-0/+2
* tcg/loongarch64: Lower add/sub_vec to vadd/vsubJiajie Chen2023-09-151-0/+1
* tcg/loongarch64: Lower cmp_vec to vseq/vsle/vsltJiajie Chen2023-09-151-0/+1
* tcg/loongarch64: Lower basic tcg vec ops to LSXJiajie Chen2023-09-151-0/+2
* tcg/loongarch64: Simplify constraints on qemu_ld/stRichard Henderson2023-05-111-2/+0
* tcg/loongarch64: Implement movcondRichard Henderson2023-01-231-0/+1
* tcg/loongarch64: Introduce tcg_out_addiRichard Henderson2023-01-231-1/+3
* tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st opsWANG Xuerui2021-12-211-0/+2
* tcg/loongarch64: Implement simple load/store opsWANG Xuerui2021-12-211-0/+1
* tcg/loongarch64: Implement setcond opsWANG Xuerui2021-12-211-0/+1
* tcg/loongarch64: Implement br/brcond opsWANG Xuerui2021-12-211-0/+1
* tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu opsWANG Xuerui2021-12-211-0/+1
* tcg/loongarch64: Implement add/sub opsWANG Xuerui2021-12-211-0/+2
* tcg/loongarch64: Implement shl/shr/sar/rotl/rotr opsWANG Xuerui2021-12-211-0/+1
* tcg/loongarch64: Implement clz/ctz opsWANG Xuerui2021-12-211-0/+1
* tcg/loongarch64: Implement deposit/extract opsWANG Xuerui2021-12-211-0/+1
* tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc opsWANG Xuerui2021-12-211-0/+2
* tcg/loongarch64: Implement sign-/zero-extension opsWANG Xuerui2021-12-211-0/+1
* tcg/loongarch64: Implement goto_ptrWANG Xuerui2021-12-211-0/+17