| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | tcg/riscv: Support CTZ, CLZ from Zbb | Richard Henderson | 2023-05-25 | 1 | -0/+1 |
| * | tcg/riscv: Implement movcond | Richard Henderson | 2023-05-25 | 1 | -0/+1 |
| * | tcg/riscv: Support ANDN, ORN, XNOR from Zbb | Richard Henderson | 2023-05-25 | 1 | -0/+1 |
| * | tcg/riscv: Simplify constraints on qemu_ld/st | Richard Henderson | 2023-05-11 | 1 | -2/+0 |
| * | tcg/riscv: Require TCG_TARGET_REG_BITS == 64 | Richard Henderson | 2023-05-05 | 1 | -8/+0 |
| * | tcg/riscv: Split out constraint sets to tcg-target-con-set.h | Richard Henderson | 2021-02-02 | 1 | -0/+30 |