summary refs log tree commit diff stats
path: root/tests/fp/fp-bench.c (follow)
Commit message (Collapse)AuthorAgeFilesLines
* fpu: allow flushing of output denormals to be after roundingPeter Maydell2025-02-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we handle flushing of output denormals in uncanon_normal always before we deal with rounding. This works for architectures that detect tininess before rounding, but is usually not the right place when the architecture detects tininess after rounding. For example, for x86 the SDM states that the MXCSR FTZ control bit causes outputs to be flushed to zero "when it detects a floating-point underflow condition". This means that we mustn't flush to zero if the input is such that after rounding it is no longer tiny. At least one of our guest architectures does underflow detection after rounding but flushing of denormals before rounding (MIPS MSA); this means we need to have a config knob for this that is separate from our existing tininess_before_rounding setting. Add an ftz_detection flag. For consistency with tininess_before_rounding, we make it default to "detect ftz after rounding"; this means that we need to explicitly set the flag to "detect ftz before rounding" on every existing architecture that sets flush_to_zero, so that this commit has no behaviour change. (This means more code change here but for the long term a less confusing API.) For several architectures the current behaviour is either definitely or possibly wrong; annotate those with TODO comments. These architectures are definitely wrong (and should detect ftz after rounding): * x86 * Alpha For these architectures the spec is unclear: * MIPS (for non-MSA) * RX * SH4 PA-RISC makes ftz detection IMPDEF, but we aren't setting the "tininess before rounding" setting that we ought to. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* tests/fp: Set default NaN pattern explicitlyPeter Maydell2024-12-111-0/+1
| | | | | | | | Set the default NaN pattern explicitly for the tests/fp code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-36-peter.maydell@linaro.org
* tests/fp: Explicitly set 3-NaN propagation rulePeter Maydell2024-12-111-0/+1
| | | | | | | | | | Explicitly set a rule in the softfloat tests for propagating NaNs in the muladd case. In meson.build we put -DTARGET_ARM in fpcflags, and so we should select here the Arm rule of float_3nan_prop_s_cab. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-17-peter.maydell@linaro.org
* tests/fp: Explicitly set inf-zero-nan rulePeter Maydell2024-12-111-0/+5
| | | | | | | | | | | Explicitly set a rule in the softfloat tests for the inf-zero-nan muladd special case. In meson.build we put -DTARGET_ARM in fpcflags, and so we should select here the Arm rule of float_infzeronan_dnan_if_qnan. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20241202131347.498124-5-peter.maydell@linaro.org
* tests/fp: Explicitly set 2-NaN propagation rulePeter Maydell2024-11-051-0/+2
| | | | | | | | | | | Explicitly set a 2-NaN propagation rule in the softfloat tests. In meson.build we put -DTARGET_ARM in fpcflags, and so we should select here the Arm propagation rule of float_2nan_prop_s_ab. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-3-peter.maydell@linaro.org
* compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau2022-04-211-1/+2
| | | | | | | | | | | | | G_NORETURN was introduced in glib 2.68, fallback to G_GNUC_NORETURN in glib-compat. Note that this attribute must be placed before the function declaration (bringing a bit of consistency in qemu codebase usage). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Warner Losh <imp@bsdimp.com> Message-Id: <20220420132624.2439741-20-marcandre.lureau@redhat.com>
* softfloat: Move muladd_floats to softfloat-parts.c.incRichard Henderson2021-05-161-4/+4
| | | | | | | | Rename to parts$N_muladd. Implement float128_muladd with FloatParts128. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* tests/fp: add quad support to the benchmark utilityAlex Bennée2021-05-161-5/+83
| | | | | | | | | | | | Currently this only support softfloat calculations because working out if the hardware supports 128 bit floats needs configure magic. The 3 op muladd operation is currently unimplemented so commented out for now. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20201020163738.27700-8-alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fp-bench: remove wrong exponent raise in fill_randomEmilio G. Cota2019-01-221-4/+0
| | | | | | | | | | | At this point random_ops[] only contains normals, so there's no need to do anything to them. In fact, raising the exponent here can make the output !normal, which is precisely what the comment says we want to avoid. Signed-off-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* fp-bench: fix update_random_opsEmilio G. Cota2019-01-221-3/+8
| | | | | | | | | | The second test in the branches is wrong; fix while converting to a switch statement, which is easier to get right. Signed-off-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
* tests/fp: add fp-benchEmilio G. Cota2018-12-171-0/+630
These microbenchmarks will allow us to measure the performance impact of FP emulation optimizations. Note that we can measure both directly the impact on the softfloat functions (with "-t soft"), or the impact on an emulated workload (call with "-t host" and run under qemu user-mode). Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>