Merge pull request #742 from commial/refactor/x86_cpuid

Rename x86 specific op 'cpuid' to 'x86_cpuid'

7 files changed, 18 insertions, 18 deletions

diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py
index 5de58c15..276b796f 100644
--- a/miasm2/arch/x86/sem.py
+++ b/miasm2/arch/x86/sem.py
@@ -3073,16 +3073,16 @@ def cpuid(_, instr):
     e = []
     e.append(
         m2_expr.ExprAff(mRAX[instr.mode],
-                        m2_expr.ExprOp('cpuid', mRAX[instr.mode], m2_expr.ExprInt(0, instr.mode))))
+                        m2_expr.ExprOp('x86_cpuid', mRAX[instr.mode], m2_expr.ExprInt(0, instr.mode))))
     e.append(
         m2_expr.ExprAff(mRBX[instr.mode],
-                        m2_expr.ExprOp('cpuid', mRAX[instr.mode], m2_expr.ExprInt(1, instr.mode))))
+                        m2_expr.ExprOp('x86_cpuid', mRAX[instr.mode], m2_expr.ExprInt(1, instr.mode))))
     e.append(
         m2_expr.ExprAff(mRCX[instr.mode],
-                        m2_expr.ExprOp('cpuid', mRAX[instr.mode], m2_expr.ExprInt(2, instr.mode))))
+                        m2_expr.ExprOp('x86_cpuid', mRAX[instr.mode], m2_expr.ExprInt(2, instr.mode))))
     e.append(
         m2_expr.ExprAff(mRDX[instr.mode],
-                        m2_expr.ExprOp('cpuid', mRAX[instr.mode], m2_expr.ExprInt(3, instr.mode))))
+                        m2_expr.ExprOp('x86_cpuid', mRAX[instr.mode], m2_expr.ExprInt(3, instr.mode))))
     return e, []
 
 
diff --git a/miasm2/ir/translators/C.py b/miasm2/ir/translators/C.py
index 099f1420..bcffc364 100644
--- a/miasm2/ir/translators/C.py
+++ b/miasm2/ir/translators/C.py
@@ -94,7 +94,7 @@ class TranslatorC(Translator):
                                                    self.from_expr(expr.args[0]),
                                                    self.from_expr(expr.args[1]),
                                                    size2mask(expr.args[0].size))
-            elif expr.op == 'cpuid':
+            elif expr.op == 'x86_cpuid':
                 return "%s(%s, %s)" % (expr.op,
                                        self.from_expr(expr.args[0]),
                                        self.from_expr(expr.args[1]))
diff --git a/miasm2/jitter/emulatedsymbexec.py b/miasm2/jitter/emulatedsymbexec.py
index ce3ad017..42f96aa2 100644
--- a/miasm2/jitter/emulatedsymbexec.py
+++ b/miasm2/jitter/emulatedsymbexec.py
@@ -5,7 +5,7 @@ from miasm2.ir.symbexec import SymbolicExecutionEngine
 class EmulatedSymbExec(SymbolicExecutionEngine):
     """Symbolic exec instance linked with a jitter"""
 
-    cpuid = {
+    x86_cpuid = {
         0: {
             0: 0xa,
             1: 0x756E6547,
@@ -116,9 +116,9 @@ class EmulatedSymbExec(SymbolicExecutionEngine):
         segmaddr = self.cpu.get_segm_base(segm_nb)
         return e_s(m2_expr.ExprInt(segmaddr, expr.size) + expr.args[1])
 
-    def _simp_handle_cpuid(self, e_s, expr):
-        """From miasm2/jitter/op_semantics.h: cpuid"""
-        if expr.op != "cpuid":
+    def _simp_handle_x86_cpuid(self, e_s, expr):
+        """From miasm2/jitter/op_semantics.h: x86_cpuid"""
+        if expr.op != "x86_cpuid":
             return expr
 
         if any(not arg.is_int() for arg in expr.args):
@@ -126,12 +126,12 @@ class EmulatedSymbExec(SymbolicExecutionEngine):
         a, reg_num = (int(arg) for arg in expr.args)
 
         # Not found error is keeped on purpose
-        return m2_expr.ExprInt(self.cpuid[a][reg_num], expr.size)
+        return m2_expr.ExprInt(self.x86_cpuid[a][reg_num], expr.size)
 
     def enable_emulated_simplifications(self):
         """Enable simplifications needing a CPU instance on associated
         ExpressionSimplifier
         """
         self.expr_simp.enable_passes({
-            m2_expr.ExprOp: [self._simp_handle_segm, self._simp_handle_cpuid],
+            m2_expr.ExprOp: [self._simp_handle_segm, self._simp_handle_x86_cpuid],
         })
diff --git a/miasm2/jitter/llvmconvert.py b/miasm2/jitter/llvmconvert.py
index eef34c16..97cd9f17 100644
--- a/miasm2/jitter/llvmconvert.py
+++ b/miasm2/jitter/llvmconvert.py
@@ -231,7 +231,7 @@ class LLVMContext_JIT(LLVMContext):
                             "args": [p8,
                                      itype,
                                      itype]},
-              "cpuid": {"ret": itype,
+              "x86_cpuid": {"ret": itype,
                         "args": [itype,
                                  itype]},
         }
@@ -368,7 +368,7 @@ class LLVMFunction():
 
     # Operation translation
     ## Basics
-    op_translate = {'cpuid': 'cpuid',
+    op_translate = {'x86_cpuid': 'x86_cpuid',
     }
     ## Add the size as first argument
     op_translate_with_size = {}
diff --git a/miasm2/jitter/op_semantics.c b/miasm2/jitter/op_semantics.c
index 5500ea92..82f56422 100644
--- a/miasm2/jitter/op_semantics.c
+++ b/miasm2/jitter/op_semantics.c
@@ -296,10 +296,10 @@ unsigned int my_imul08(unsigned int a, unsigned int b)
 
 
 
-unsigned int cpuid(unsigned int a, unsigned int reg_num)
+unsigned int x86_cpuid(unsigned int a, unsigned int reg_num)
 {
 	if (reg_num >3){
-		fprintf(stderr, "not implemented cpuid reg %x\n", reg_num);
+		fprintf(stderr, "not implemented x86_cpuid reg %x\n", reg_num);
 		exit(EXIT_FAILURE);
 	}
 
@@ -333,7 +333,7 @@ unsigned int cpuid(unsigned int a, unsigned int reg_num)
 		}
 	}
 	else{
-		fprintf(stderr, "WARNING not implemented cpuid index %X!\n", a);
+		fprintf(stderr, "WARNING not implemented x86_cpuid index %X!\n", a);
 		//exit(EXIT_FAILURE);
 	}
 	return 0;
diff --git a/miasm2/jitter/op_semantics.h b/miasm2/jitter/op_semantics.h
index 3b71f6c6..a52afd42 100644
--- a/miasm2/jitter/op_semantics.h
+++ b/miasm2/jitter/op_semantics.h
@@ -77,7 +77,7 @@ unsigned int cnttrailzeros(uint64_t size, uint64_t src);
 		return r;						\
 	}
 
-unsigned int cpuid(unsigned int a, unsigned int reg_num);
+unsigned int x86_cpuid(unsigned int a, unsigned int reg_num);
 double int2double(unsigned int m);
 
 double fpu_fadd(double a, double b);
diff --git a/test/ir/ir2C.py b/test/ir/ir2C.py
index 20ade999..375dedb8 100755
--- a/test/ir/ir2C.py
+++ b/test/ir/ir2C.py
@@ -40,7 +40,7 @@ class TestIrIr2C(unittest.TestCase):
         self.translationTest(
             ExprOp('cntleadzeros',     *args[:1]), r'cntleadzeros(0x0, 0x20)')
         self.translationTest(
-            ExprOp('cpuid',  *args[:2]), r'cpuid(0x0, 0x1)')
+            ExprOp('x86_cpuid',  *args[:2]), r'x86_cpuid(0x0, 0x1)')
         self.translationTest(
             ExprOp('fcom0',   *args[:2]), r'fcom0(0x0, 0x1)')
         self.translationTest(