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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2019-01-17 07:30:56 +0100 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2019-01-17 08:57:31 +0100 |
| commit | 5fcbef659dd5d27d2953e8f35ebe004655b3f183 (patch) | |
| tree | 79093188e4172955d310bff9f2c26998e5aac42f /miasm2/arch/x86/sem.py | |
| parent | 04f2665bdc67dc350f469841c748542c70ea9747 (diff) | |
| download | miasm-5fcbef659dd5d27d2953e8f35ebe004655b3f183.tar.gz miasm-5fcbef659dd5d27d2953e8f35ebe004655b3f183.zip | |
Fix bad english
Diffstat (limited to 'miasm2/arch/x86/sem.py')
| -rw-r--r-- | miasm2/arch/x86/sem.py | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py index e01adcbc..862240e5 100644 --- a/miasm2/arch/x86/sem.py +++ b/miasm2/arch/x86/sem.py @@ -1710,7 +1710,7 @@ def div(ir, instr, src1): c_d = m2_expr.ExprOp('udiv', src2, src1.zeroExtend(src2.size)) c_r = m2_expr.ExprOp('umod', src2, src1.zeroExtend(src2.size)) - # if 8 bit div, only ax is affected + # if 8 bit div, only ax is assigned if size == 8: e.append(m2_expr.ExprAssign(src2, m2_expr.ExprCompose(c_d[:8], c_r[:8]))) else: @@ -1757,7 +1757,7 @@ def idiv(ir, instr, src1): c_d = m2_expr.ExprOp('sdiv', src2, src1.signExtend(src2.size)) c_r = m2_expr.ExprOp('smod', src2, src1.signExtend(src2.size)) - # if 8 bit div, only ax is affected + # if 8 bit div, only ax is assigned if size == 8: e.append(m2_expr.ExprAssign(src2, m2_expr.ExprCompose(c_d[:8], c_r[:8]))) else: @@ -4026,7 +4026,7 @@ cmpordsd = vec_op_clip('ord', 64, lambda x: _float_compare_to_mask(x)) def pand(_, instr, dst, src): e = [] result = dst & src - # No flag affected + # No flag assigned e.append(m2_expr.ExprAssign(dst, result)) return e, [] @@ -4034,7 +4034,7 @@ def pand(_, instr, dst, src): def pandn(_, instr, dst, src): e = [] result = (dst ^ dst.mask) & src - # No flag affected + # No flag assigned e.append(m2_expr.ExprAssign(dst, result)) return e, [] |