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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2017-12-15 11:20:09 +0100 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2018-05-02 11:07:42 +0200 |
| commit | 919178aa0d80aafa701315ad028e85b61c952c1e (patch) | |
| tree | 2ca1a9d32afaf0eb571dda4c3b791e429a709abc /miasm2/jitter/arch/JitCore_mips32.c | |
| parent | 6eace70b4ef781d77d4ad61c2b454ed21fffc7ca (diff) | |
| download | miasm-919178aa0d80aafa701315ad028e85b61c952c1e.tar.gz miasm-919178aa0d80aafa701315ad028e85b61c952c1e.zip | |
Update Mips runtime
Diffstat (limited to 'miasm2/jitter/arch/JitCore_mips32.c')
| -rw-r--r-- | miasm2/jitter/arch/JitCore_mips32.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/miasm2/jitter/arch/JitCore_mips32.c b/miasm2/jitter/arch/JitCore_mips32.c index 19b24f1f..7722c055 100644 --- a/miasm2/jitter/arch/JitCore_mips32.c +++ b/miasm2/jitter/arch/JitCore_mips32.c @@ -220,6 +220,26 @@ void check_automod(JitCpu* jitcpu, uint64_t addr, uint64_t size) } + +UDIV(16) +UDIV(32) +UDIV(64) + +UMOD(16) +UMOD(32) +UMOD(64) + + +IDIV(16) +IDIV(32) +IDIV(64) + +IMOD(16) +IMOD(32) +IMOD(64) + + + void MEM_WRITE_08(JitCpu* jitcpu, uint64_t addr, uint8_t src) { vm_MEM_WRITE_08(&((VmMngr*)jitcpu->pyvm)->vm_mngr, addr, src); |