diff options
| -rwxr-xr-x | example/asm/shellcode.py | 12 | ||||
| -rw-r--r-- | example/asm/simple.py | 10 | ||||
| -rw-r--r-- | example/disasm/full.py | 36 | ||||
| -rw-r--r-- | example/expression/asm_to_ir.py | 16 | ||||
| -rw-r--r-- | example/expression/graph_dataflow.py | 26 | ||||
| -rw-r--r-- | example/expression/solve_condition_stp.py | 22 | ||||
| -rw-r--r-- | example/ida/depgraph.py | 10 | ||||
| -rw-r--r-- | example/ida/graph_ir.py | 6 | ||||
| -rw-r--r-- | example/ida/symbol_exec.py | 6 | ||||
| -rw-r--r-- | miasm2/analysis/data_analysis.py | 4 | ||||
| -rw-r--r-- | miasm2/analysis/disasm_cb.py | 10 | ||||
| -rw-r--r-- | miasm2/arch/aarch64/sem.py | 10 | ||||
| -rw-r--r-- | miasm2/arch/arm/sem.py | 4 | ||||
| -rw-r--r-- | miasm2/arch/mips32/sem.py | 47 | ||||
| -rw-r--r-- | miasm2/arch/x86/sem.py | 8 | ||||
| -rw-r--r-- | miasm2/ir/analysis.py | 4 | ||||
| -rw-r--r-- | miasm2/ir/ir.py | 28 | ||||
| -rw-r--r-- | miasm2/jitter/jitcore.py | 121 | ||||
| -rw-r--r-- | miasm2/jitter/jitcore_python.py | 16 | ||||
| -rw-r--r-- | miasm2/jitter/jitload.py | 2 | ||||
| -rw-r--r-- | test/arch/aarch64/unit/asm_test.py | 6 | ||||
| -rw-r--r-- | test/arch/mips32/unit/asm_test.py | 6 | ||||
| -rwxr-xr-x | test/arch/x86/sem.py | 6 | ||||
| -rw-r--r-- | test/arch/x86/unit/asm_test.py | 6 |
24 files changed, 191 insertions, 231 deletions
diff --git a/example/asm/shellcode.py b/example/asm/shellcode.py index 3ff11489..20fa02d8 100755 --- a/example/asm/shellcode.py +++ b/example/asm/shellcode.py @@ -64,7 +64,7 @@ else: with open(args.source) as fstream: source = fstream.read() -blocs, symbol_pool = parse_asm.parse_txt(machine.mn, attrib, source) +blocks, symbol_pool = parse_asm.parse_txt(machine.mn, attrib, source) # Fix shellcode addrs symbol_pool.set_offset(symbol_pool.getby_name("main"), addr_main) @@ -73,14 +73,14 @@ if args.PE: symbol_pool.set_offset(symbol_pool.getby_name_create("MessageBoxA"), pe.DirImport.get_funcvirt('USER32.dll', 'MessageBoxA')) -# Print and graph firsts blocs before patching it -for bloc in blocs: - print bloc -open("graph.dot", "w").write(blocs.dot()) +# Print and graph firsts blocks before patching it +for block in blocks: + print block +open("graph.dot", "w").write(blocks.dot()) # Apply patches patches = asmbloc.asm_resolve_final(machine.mn, - blocs, + blocks, symbol_pool, dst_interval) if args.encrypt: diff --git a/example/asm/simple.py b/example/asm/simple.py index d7623908..7ab403f4 100644 --- a/example/asm/simple.py +++ b/example/asm/simple.py @@ -6,7 +6,7 @@ from miasm2.core import parse_asm, asmbloc # Assemble code -blocs, symbol_pool = parse_asm.parse_txt(mn_x86, 32, ''' +blocks, symbol_pool = parse_asm.parse_txt(mn_x86, 32, ''' main: MOV EAX, 1 MOV EBX, 2 @@ -25,11 +25,11 @@ loop: symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0) # Spread information and resolve instructions offset -patches = asmbloc.asm_resolve_final(mn_x86, blocs, symbol_pool) +patches = asmbloc.asm_resolve_final(mn_x86, blocks, symbol_pool) -# Show resolved blocs -for bloc in blocs: - print bloc +# Show resolved blocks +for block in blocks: + print block # Print offset -> bytes pprint(patches) diff --git a/example/disasm/full.py b/example/disasm/full.py index 6bea91cd..5fc9008a 100644 --- a/example/disasm/full.py +++ b/example/disasm/full.py @@ -108,7 +108,7 @@ for ad in addrs: done = set() all_funcs = set() -all_funcs_blocs = {} +all_funcs_blocks = {} done_interval = interval() @@ -121,27 +121,27 @@ while not finish and todo: if ad in done: continue done.add(ad) - ab = mdis.dis_multibloc(ad) + allblocks = mdis.dis_multibloc(ad) log.info('func ok %.16x (%d)' % (ad, len(all_funcs))) all_funcs.add(ad) - all_funcs_blocs[ad] = ab - for b in ab: - for l in b.lines: + all_funcs_blocks[ad] = allblocks + for block in allblocks: + for l in block.lines: done_interval += interval([(l.offset, l.offset + l.l)]) if args.funcswatchdog is not None: args.funcswatchdog -= 1 if args.recurfunctions: - for b in ab: - i = b.get_subcall_instr() - if not i: + for block in allblocks: + instr = block.get_subcall_instr() + if not isntr: continue - for d in i.getdstflow(mdis.symbol_pool): - if not (isinstance(d, ExprId) and isinstance(d.name, asm_label)): + for dest in instr.getdstflow(mdis.symbol_pool): + if not (isinstance(dest, ExprId) and isinstance(dest.name, asm_label)): continue - todo.append((mdis, i, d.name.offset)) + todo.append((mdis, instr, dest.name.offset)) if args.funcswatchdog is not None and args.funcswatchdog <= 0: finish = True @@ -155,13 +155,13 @@ while not finish and todo: # Generate dotty graph -all_blocs = AsmCFG() -for blocs in all_funcs_blocs.values(): - all_blocs += blocs +all_blocks = AsmCFG() +for blocks in all_funcs_blocks.values(): + all_blocks += blocks log.info('generate graph file') -open('graph_execflow.dot', 'w').write(all_blocs.dot(offset=True)) +open('graph_execflow.dot', 'w').write(all_blocks.dot(offset=True)) log.info('generate intervals') @@ -192,9 +192,9 @@ if args.gen_ir: ir_arch_a.blocks = {} for ad, all_block in all_funcs_blocks.items(): log.info("generating IR... %x" % ad) - for b in all_bloc: - ir_arch_a.add_bloc(b) - ir_arch.add_bloc(b) + for block in all_block: + ir_arch_a.add_bloc(block) + ir_arch.add_bloc(block) log.info("Print blocks (without analyse)") for label, block in ir_arch.blocks.iteritems(): diff --git a/example/expression/asm_to_ir.py b/example/expression/asm_to_ir.py index 552ddd36..4193f31d 100644 --- a/example/expression/asm_to_ir.py +++ b/example/expression/asm_to_ir.py @@ -8,7 +8,7 @@ from miasm2.arch.x86.ira import ir_a_x86_32 # First, asm code -blocs, symbol_pool = parse_asm.parse_txt(mn_x86, 32, ''' +blocks, symbol_pool = parse_asm.parse_txt(mn_x86, 32, ''' main: MOV EAX, 1 MOV EBX, 2 @@ -25,20 +25,20 @@ loop: symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0) -for b in blocs: - print b +for block in blocks: + print block print "symbols:" print symbol_pool -patches = asmbloc.asm_resolve_final(mn_x86, blocs, symbol_pool) +patches = asmbloc.asm_resolve_final(mn_x86, blocks, symbol_pool) # Translate to IR ir_arch = ir_a_x86_32(symbol_pool) -for b in blocs: - print 'add bloc' - print b - ir_arch.add_bloc(b) +for block in blocks: + print 'add block' + print block + ir_arch.add_bloc(block) # Display IR for lbl, irblock in ir_arch.blocks.items(): diff --git a/example/expression/graph_dataflow.py b/example/expression/graph_dataflow.py index 0b01956f..bd767165 100644 --- a/example/expression/graph_dataflow.py +++ b/example/expression/graph_dataflow.py @@ -49,12 +49,12 @@ def get_modified_symbols(sb): return out -def intra_bloc_flow_symb(ir_arch, flow_graph, irbloc): +def intra_bloc_flow_symb(ir_arch, flow_graph, irblock): symbols_init = ir_arch.arch.regs.regs_init.copy() sb = SymbolicExecutionEngine(ir_arch, symbols_init) - sb.emulbloc(irbloc) + sb.emulbloc(irblock) print '*' * 40 - print irbloc + print irblock in_nodes = {} out_nodes = {} @@ -68,7 +68,7 @@ def intra_bloc_flow_symb(ir_arch, flow_graph, irbloc): all_mems.update(get_expr_mem(n)) for n in all_mems: - node_n_w = get_node_name(irbloc.label, 0, n) + node_n_w = get_node_name(irblock.label, 0, n) if not n == src: continue o_r = n.arg.get_r(mem_read=False, cst_read=True) @@ -76,7 +76,7 @@ def intra_bloc_flow_symb(ir_arch, flow_graph, irbloc): if n_r in current_nodes: node_n_r = current_nodes[n_r] else: - node_n_r = get_node_name(irbloc.label, i, n_r) + node_n_r = get_node_name(irblock.label, i, n_r) if not n_r in in_nodes: in_nodes[n_r] = node_n_r flow_graph.add_uniq_edge(node_n_r, node_n_w) @@ -89,20 +89,20 @@ def intra_bloc_flow_symb(ir_arch, flow_graph, irbloc): if n_r in current_nodes: node_n_r = current_nodes[n_r] else: - node_n_r = get_node_name(irbloc.label, 0, n_r) + node_n_r = get_node_name(irblock.label, 0, n_r) if not n_r in in_nodes: in_nodes[n_r] = node_n_r flow_graph.add_node(node_n_r) for n_w in nodes_w: - node_n_w = get_node_name(irbloc.label, 1, n_w) + node_n_w = get_node_name(irblock.label, 1, n_w) out_nodes[n_w] = node_n_w flow_graph.add_node(node_n_w) flow_graph.add_uniq_edge(node_n_r, node_n_w) - irbloc.in_nodes = in_nodes - irbloc.out_nodes = out_nodes + irblock.in_nodes = in_nodes + irblock.out_nodes = out_nodes def node2str(self, node): @@ -121,7 +121,7 @@ def gen_block_data_flow_graph(ir_arch, ad, block_flow_cb): if irblock.label.offset == ad: irblock_0 = irblock break - assert(irbloc_0 is not None) + assert(irblock_0 is not None) flow_graph = DiGraph() flow_graph.node2str = lambda n: node2str(flow_graph, n) @@ -133,8 +133,8 @@ def gen_block_data_flow_graph(ir_arch, ad, block_flow_cb): print 'IN', [str(x) for x in irblock.in_nodes] print 'OUT', [str(x) for x in irblock.out_nodes] - print '*' * 20, 'interbloc', '*' * 20 - inter_bloc_flow(ir_arch, flow_graph, irbloc_0.label) + print '*' * 20, 'interblock', '*' * 20 + inter_bloc_flow(ir_arch, flow_graph, irblock_0.label) # from graph_qt import graph_qt # graph_qt(flow_graph) @@ -169,7 +169,7 @@ if args.symb: else: block_flow_cb = intra_bloc_flow_raw -gen_bloc_data_flow_graph(ir_arch, ad, block_flow_cb) +gen_block_data_flow_graph(ir_arch, ad, block_flow_cb) print '*' * 40 print """ diff --git a/example/expression/solve_condition_stp.py b/example/expression/solve_condition_stp.py index 1f0f2967..5d3ebc59 100644 --- a/example/expression/solve_condition_stp.py +++ b/example/expression/solve_condition_stp.py @@ -35,7 +35,7 @@ if not args: sys.exit(0) -def get_bloc(ir_arch, mdis, ad): +def get_block(ir_arch, mdis, ad): if isinstance(ad, asmbloc.asm_label): l = ad else: @@ -46,7 +46,7 @@ def get_bloc(ir_arch, mdis, ad): ir_arch.add_bloc(b) b = ir_arch.get_bloc(l) if b is None: - raise LookupError('no bloc found at that address: %s' % l) + raise LookupError('no block found at that address: %s' % l) return b @@ -62,11 +62,11 @@ def emul_symb(ir_arch, mdis, states_todo, states_done): sb.symbols = symbols.copy() if ir_arch.pc in sb.symbols: del(sb.symbols[ir_arch.pc]) - b = get_bloc(ir_arch, mdis, ad) + b = get_block(ir_arch, mdis, ad) - print 'run bloc' + print 'run block' print b - # print blocs[ad] + # print blocks[ad] ad = sb.emulbloc(b) print 'final state' sb.dump_id() @@ -161,20 +161,20 @@ if __name__ == '__main__': sb = SymbolicExecutionEngine(ir_arch, symbols_init) - blocs, symbol_pool = parse_asm.parse_txt(mn_x86, 32, ''' + blocks, symbol_pool = parse_asm.parse_txt(mn_x86, 32, ''' PUSH argv PUSH argc PUSH ret_addr ''') - b = list(blocs)[0] + b = list(blocks)[0] print b # add fake address and len to parsed instructions - for i, l in enumerate(b.lines): - l.offset, l.l = i, 1 + for i, line in enumerate(b.lines): + line.offset, line.l = i, 1 ir_arch.add_bloc(b) - irb = get_bloc(ir_arch, mdis, 0) + irb = get_block(ir_arch, mdis, 0) sb.emulbloc(irb) sb.dump_mem() @@ -185,7 +185,7 @@ if __name__ == '__main__': states_done = set() states_todo.add((uint32(ad), sb.symbols, ())) - # emul blocs, propagate states + # emul blocks, propagate states emul_symb(ir_arch, mdis, states_todo, states_done) all_info = [] diff --git a/example/ida/depgraph.py b/example/ida/depgraph.py index 9024f2af..50c73a54 100644 --- a/example/ida/depgraph.py +++ b/example/ida/depgraph.py @@ -21,8 +21,8 @@ class depGraphSettingsForm(Form): self.stk_unalias_force = False self.address = ScreenEA() - cur_bloc = list(ira.getby_offset(self.address))[0] - for line_nb, l in enumerate(cur_bloc.lines): + cur_block = list(ira.getby_offset(self.address))[0] + for line_nb, l in enumerate(cur_block.lines): if l.offset == self.address: break cur_label = str(cur_block.label) @@ -151,11 +151,11 @@ for ad, name in Names(): # Get the current function addr = ScreenEA() func = idaapi.get_func(addr) -blocs = mdis.dis_multibloc(func.startEA) +blocks = mdis.dis_multibloc(func.startEA) # Generate IR -for bloc in blocs: - ir_arch.add_bloc(bloc) +for block in blocks: + ir_arch.add_bloc(block) # Get settings settings = depGraphSettingsForm(ir_arch) diff --git a/example/ida/graph_ir.py b/example/ida/graph_ir.py index 252dc612..250eebfc 100644 --- a/example/ida/graph_ir.py +++ b/example/ida/graph_ir.py @@ -125,10 +125,10 @@ open('asm_flow.dot', 'w').write(ab.dot()) print "generating IR... %x" % ad -for b in ab: +for block in ab: print 'ADD' - print b - ir_arch.add_bloc(b) + print block + ir_arch.add_bloc(block) print "IR ok... %x" % ad diff --git a/example/ida/symbol_exec.py b/example/ida/symbol_exec.py index edb6287b..70e1cfc1 100644 --- a/example/ida/symbol_exec.py +++ b/example/ida/symbol_exec.py @@ -87,10 +87,10 @@ def symbolic_exec(): start, end = SelStart(), SelEnd() mdis.dont_dis = [end] - blocs = mdis.dis_multibloc(start) + blocks = mdis.dis_multibloc(start) ira = machine.ira() - for bloc in blocs: - ira.add_bloc(bloc) + for block in blocks: + ira.add_bloc(block) print "Run symbolic execution..." sb = SymbolicExecutionEngine(ira, machine.mn.regs.regs_init) diff --git a/miasm2/analysis/data_analysis.py b/miasm2/analysis/data_analysis.py index 8703c0cd..c67c4509 100644 --- a/miasm2/analysis/data_analysis.py +++ b/miasm2/analysis/data_analysis.py @@ -211,8 +211,8 @@ class symb_exec_func: """ This algorithm will do symbolic execution on a function, trying to propagate - states between basic blocs in order to extract inter-blocs dataflow. The - algorithm tries to merge states from blocs with multiple parents. + states between basic blocks in order to extract inter-blocs dataflow. The + algorithm tries to merge states from blocks with multiple parents. There is no real magic here, loops and complex merging will certainly fail. """ diff --git a/miasm2/analysis/disasm_cb.py b/miasm2/analysis/disasm_cb.py index e2fa54cf..95a2b49b 100644 --- a/miasm2/analysis/disasm_cb.py +++ b/miasm2/analysis/disasm_cb.py @@ -34,12 +34,12 @@ def arm_guess_subcall( ir_blocks = ir_arch.blocks.values() # flow_graph = DiGraph() to_add = set() - for irb in ir_blocs: + for irblock in ir_blocks: # print 'X'*40 - # print irb + # print irblock pc_val = None lr_val = None - for exprs in irb.irs: + for exprs in irblock.irs: for e in exprs: if e.dst == ir_arch.pc: pc_val = e.src @@ -81,10 +81,10 @@ def arm_guess_jump_table( ir_blocks = ir_arch.blocks.values() for irblock in ir_blocks: # print 'X'*40 - # print irb + # print irblock pc_val = None # lr_val = None - for exprs in irb.irs: + for exprs in irblock.irs: for e in exprs: if e.dst == ir_arch.pc: pc_val = e.src diff --git a/miasm2/arch/aarch64/sem.py b/miasm2/arch/aarch64/sem.py index 1d2ff4f1..792a4984 100644 --- a/miasm2/arch/aarch64/sem.py +++ b/miasm2/arch/aarch64/sem.py @@ -804,8 +804,8 @@ class ir_aarch64l(IntermediateRepresentation): dst = dst.replace_expr({self.pc: cur_offset}) src = src.replace_expr({self.pc: cur_offset}) instr_ir[i] = m2_expr.ExprAff(dst, src) - for b in extra_ir: - for irs in b.irs: + for irblock in extra_ir: + for irs in irblock.irs: for i, expr in enumerate(irs): dst, src = expr.dst, expr.src if dst != self.pc: @@ -819,9 +819,9 @@ class ir_aarch64l(IntermediateRepresentation): regs_to_fix = [WZR, XZR] instr_ir = [expr for expr in instr_ir if expr.dst not in regs_to_fix] - for b in extra_ir: - for i, irs in enumerate(b.irs): - b.irs[i] = [expr for expr in irs if expr.dst not in regs_to_fix] + for irblock in extra_ir: + for i, irs in enumerate(irblock.irs): + irblock.irs[i] = [expr for expr in irs if expr.dst not in regs_to_fix] return instr_ir, extra_ir diff --git a/miasm2/arch/arm/sem.py b/miasm2/arch/arm/sem.py index 0ec02907..8c74aa76 100644 --- a/miasm2/arch/arm/sem.py +++ b/miasm2/arch/arm/sem.py @@ -1252,8 +1252,8 @@ class ir_arml(IntermediateRepresentation): x = ExprAff(x.dst, x.src.replace_expr( {self.pc: ExprInt32(instr.offset + 8)})) instr_ir[i] = x - for b in extra_ir: - for irs in b.irs: + for irblock in extra_ir: + for irs in irblock.irs: for i, x in enumerate(irs): x = ExprAff(x.dst, x.src.replace_expr( {self.pc: ExprInt32(instr.offset + 8)})) diff --git a/miasm2/arch/mips32/sem.py b/miasm2/arch/mips32/sem.py index cf760307..d982f033 100644 --- a/miasm2/arch/mips32/sem.py +++ b/miasm2/arch/mips32/sem.py @@ -445,8 +445,8 @@ class ir_mips32l(IntermediateRepresentation): x = m2_expr.ExprAff(x.dst, x.src.replace_expr( {self.pc: m2_expr.ExprInt32(instr.offset + 4)})) instr_ir[i] = x - for b in extra_ir: - for irs in b.irs: + for irblock in extra_ir: + for irs in irblock.irs: for i, x in enumerate(irs): x = m2_expr.ExprAff(x.dst, x.src.replace_expr( {self.pc: m2_expr.ExprInt32(instr.offset + 4)})) @@ -454,49 +454,10 @@ class ir_mips32l(IntermediateRepresentation): return instr_ir, extra_ir def get_next_instr(self, instr): - l = self.symbol_pool.getby_offset_create(instr.offset + 4) - return l + return self.symbol_pool.getby_offset_create(instr.offset + 4) def get_next_break_label(self, instr): - l = self.symbol_pool.getby_offset_create(instr.offset + 8) - return l - """ - def add_bloc(self, bloc, gen_pc_updt = False): - c = None - ir_blocs_all = [] - for l in bloc.lines: - if c is None: - # print 'new c' - label = self.get_label(l) - c = IRBlock(label, [], []) - ir_blocs_all.append(c) - bloc_dst = None - # print 'Translate', l - dst, ir_bloc_cur, ir_blocs_extra = self.instr2ir(l) - # print ir_bloc_cur - # for xxx in ir_bloc_cur: - # print "\t", xxx - assert((dst is None) or (bloc_dst is None)) - bloc_dst = dst - #if bloc_dst is not None: - # c.dst = bloc_dst - if dst is not None: - ir_bloc_cur.append(m2_expr.ExprAff(PC_FETCH, dst)) - c.dst = PC_FETCH - if gen_pc_updt is not False: - self.gen_pc_update(c, l) - - c.irs.append(ir_bloc_cur) - c.lines.append(l) - if ir_blocs_extra: - # print 'split' - for b in ir_blocs_extra: - b.lines = [l] * len(b.irs) - ir_blocs_all += ir_blocs_extra - c = None - self.post_add_bloc(bloc, ir_blocs_all) - return ir_blocs_all - """ + return self.symbol_pool.getby_offset_create(instr.offset + 8) class ir_mips32b(ir_mips32l): def __init__(self, symbol_pool=None): diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py index 24b9487a..729806b5 100644 --- a/miasm2/arch/x86/sem.py +++ b/miasm2/arch/x86/sem.py @@ -4571,8 +4571,8 @@ class ir_x86_16(IntermediateRepresentation): lbl_skip = m2_expr.ExprId(self.get_next_label(instr), self.IRDst.size) lbl_next = m2_expr.ExprId(self.get_next_label(instr), self.IRDst.size) - for b in extra_ir: - for ir in b.irs: + for irblock in extra_ir: + for ir in irblock.irs: for i, e in enumerate(ir): src = e.src.replace_expr({lbl_next: lbl_end}) ir[i] = m2_expr.ExprAff(e.dst, src) @@ -4656,8 +4656,8 @@ class ir_x86_64(ir_x86_16): src = src.replace_expr( {self.pc: m2_expr.ExprInt64(instr.offset + instr.l)}) instr_ir[i] = m2_expr.ExprAff(dst, src) - for b in extra_ir: - for irs in b.irs: + for irblock in extra_ir: + for irs in irblock.irs: for i, expr in enumerate(irs): dst, src = expr.dst, expr.src if dst != self.pc: diff --git a/miasm2/ir/analysis.py b/miasm2/ir/analysis.py index 6eb226ed..4f7b321f 100644 --- a/miasm2/ir/analysis.py +++ b/miasm2/ir/analysis.py @@ -167,7 +167,7 @@ class ira(IntermediateRepresentation): for irblock in self.blocks.values(): modified |= self.remove_dead_instr(irblock, useful) # Remove useless structures - for assignblk in block.irs: + for assignblk in irblock.irs: del assignblk._cur_kill del assignblk._prev_kill del assignblk._cur_reach @@ -291,7 +291,7 @@ class ira(IntermediateRepresentation): Source : Kennedy, K. (1979). A survey of data flow analysis techniques. IBM Thomas J. Watson Research Division, page 43 """ - # Update r/w variables for all irblocs + # Update r/w variables for all irblocks self.get_rw(self.ira_regs_ids()) # Liveness step self.compute_reach() diff --git a/miasm2/ir/ir.py b/miasm2/ir/ir.py index a7076e2a..7f1b00d6 100644 --- a/miasm2/ir/ir.py +++ b/miasm2/ir/ir.py @@ -431,7 +431,7 @@ class IntermediateRepresentation(object): if irb_cur is None: return None - assignblk, ir_blocs_extra = self.instr2ir(instr) + assignblk, ir_blocks_extra = self.instr2ir(instr) if gen_pc_updt is not False: self.gen_pc_update(irb_cur, instr) @@ -439,10 +439,10 @@ class IntermediateRepresentation(object): irb_cur.irs.append(assignblk) irb_cur.lines.append(instr) - if ir_blocs_extra: - for b in ir_blocs_extra: - b.lines = [instr] * len(b.irs) - ir_blocks_all += ir_blocs_extra + if ir_blocks_extra: + for irblock in ir_blocks_extra: + irblock.lines = [instr] * len(irblock.irs) + ir_blocks_all += ir_blocks_extra irb_cur = None return irb_cur @@ -482,22 +482,22 @@ class IntermediateRepresentation(object): return ir return None - def set_empty_dst_to_next(self, bloc, ir_blocs): - for b in ir_blocs: - if b.dst is not None: + def set_empty_dst_to_next(self, block, ir_blocks): + for irblock in ir_blocks: + if irblock.dst is not None: continue - next_lbl = bloc.get_next() + next_lbl = block.get_next() if next_lbl is None: - dst = m2_expr.ExprId(self.get_next_label(bloc.lines[-1]), + dst = m2_expr.ExprId(self.get_next_label(block.lines[-1]), self.pc.size) else: dst = m2_expr.ExprId(next_lbl, self.pc.size) - b.irs.append(AssignBlock([m2_expr.ExprAff(self.IRDst, dst)])) - b.lines.append(b.lines[-1]) + irblock.irs.append(AssignBlock([m2_expr.ExprAff(self.IRDst, dst)])) + irblock.lines.append(irblock.lines[-1]) - def post_add_bloc(self, bloc, ir_blocs): - self.set_empty_dst_to_next(bloc, ir_blocs) + def post_add_bloc(self, block, ir_blocks): + self.set_empty_dst_to_next(block, ir_blocks) for irblock in ir_blocks: self.irbloc_fix_regs_for_mode(irblock, self.attrib) diff --git a/miasm2/jitter/jitcore.py b/miasm2/jitter/jitcore.py index 651b71e3..60fb3f2c 100644 --- a/miasm2/jitter/jitcore.py +++ b/miasm2/jitter/jitcore.py @@ -88,31 +88,31 @@ class JitCore(object): "Initialise the Jitter" raise NotImplementedError("Abstract class") - def get_bloc_min_max(self, cur_bloc): - "Update cur_bloc to set min/max address" + def get_bloc_min_max(self, cur_block): + "Update cur_block to set min/max address" - if cur_bloc.lines: - cur_bloc.ad_min = cur_bloc.lines[0].offset - cur_bloc.ad_max = cur_bloc.lines[-1].offset + cur_bloc.lines[-1].l + if cur_block.lines: + cur_block.ad_min = cur_block.lines[0].offset + cur_block.ad_max = cur_block.lines[-1].offset + cur_block.lines[-1].l else: # 1 byte block for unknown mnemonic - cur_bloc.ad_min = cur_bloc.label.offset - cur_bloc.ad_max = cur_bloc.label.offset+1 + cur_block.ad_min = cur_block.label.offset + cur_block.ad_max = cur_block.label.offset+1 - def add_bloc_to_mem_interval(self, vm, bloc): - "Update vm to include bloc addresses in its memory range" + def add_bloc_to_mem_interval(self, vm, block): + "Update vm to include block addresses in its memory range" - self.blocs_mem_interval += interval([(bloc.ad_min, bloc.ad_max - 1)]) + self.blocs_mem_interval += interval([(block.ad_min, block.ad_max - 1)]) vm.reset_code_bloc_pool() for a, b in self.blocs_mem_interval: vm.add_code_bloc(a, b + 1) - def jitirblocs(self, label, irblocs): - """JiT a group of irblocs. - @label: the label of the irblocs - @irblocs: a gorup of irblocs + def jitirblocs(self, label, irblocks): + """JiT a group of irblocks. + @label: the label of the irblocks + @irblocks: a gorup of irblocks """ raise NotImplementedError("Abstract class") @@ -123,16 +123,16 @@ class JitCore(object): """ irblocks = self.ir_arch.add_bloc(block, gen_pc_updt = True) - b.blocks = irblocks + block.blocks = irblocks self.jitirblocs(block.label, irblocks) def disbloc(self, addr, vm): - """Disassemble a new bloc and JiT it + """Disassemble a new block and JiT it @addr: address of the block to disassemble (asm_label or int) @vm: VmMngr instance """ - # Get the bloc + # Get the block if isinstance(addr, asmbloc.asm_label): addr = addr.offset @@ -143,30 +143,30 @@ class JitCore(object): # Disassemble it try: - cur_bloc = self.mdis.dis_bloc(addr) + cur_block = self.mdis.dis_bloc(addr) except IOError: # vm_exception_flag is set label = self.ir_arch.symbol_pool.getby_offset_create(addr) - cur_bloc = asmbloc.asm_block_bad(label) + cur_block = asmbloc.asm_block_bad(label) # Logging if self.log_newbloc: - print cur_bloc + print cur_block - # Update label -> bloc - self.lbl2bloc[cur_bloc.label] = cur_bloc + # Update label -> block + self.lbl2bloc[cur_block.label] = cur_block - # Store min/max bloc address needed in jit automod code - self.get_bloc_min_max(cur_bloc) + # Store min/max block address needed in jit automod code + self.get_bloc_min_max(cur_block) # JiT it - self.add_bloc(cur_bloc) + self.add_bloc(cur_block) # Update jitcode mem range - self.add_bloc_to_mem_interval(vm, cur_bloc) + self.add_bloc_to_mem_interval(vm, cur_block) def runbloc(self, cpu, lbl, breakpoints): - """Run the bloc starting at lbl. + """Run the block starting at lbl. @cpu: JitCpu instance @lbl: target label """ @@ -175,80 +175,79 @@ class JitCore(object): lbl = getattr(cpu, self.ir_arch.pc.name) if not lbl in self.lbl2jitbloc: - # Need to JiT the bloc + # Need to JiT the block self.disbloc(lbl, cpu.vmmngr) - # Run the bloc and update cpu/vmmngr state + # Run the block and update cpu/vmmngr state return self.exec_wrapper(lbl, cpu, self.lbl2jitbloc.data, breakpoints, self.options["max_exec_per_call"]) - def blocs2memrange(self, blocs): - """Return an interval instance standing for blocs addresses - @blocs: list of asm_bloc instances + def blocs2memrange(self, blocks): + """Return an interval instance standing for blocks addresses + @blocks: list of asm_bloc instances """ mem_range = interval() - for b in blocs: - mem_range += interval([(b.ad_min, b.ad_max - 1)]) + for block in blocks: + mem_range += interval([(block.ad_min, block.ad_max - 1)]) return mem_range def __updt_jitcode_mem_range(self, vm): - """Rebuild the VM blocs address memory range + """Rebuild the VM blocks address memory range @vm: VmMngr instance """ # Reset the current pool vm.reset_code_bloc_pool() - # Add blocs in the pool - for a, b in self.blocs_mem_interval: - vm.add_code_bloc(a, b + 1) + # Add blocks in the pool + for start, stop in self.blocs_mem_interval: + vm.add_code_bloc(start, stop + 1) def del_bloc_in_range(self, ad1, ad2): - """Find and remove jitted bloc in range [ad1, ad2]. - Return the list of bloc removed. + """Find and remove jitted block in range [ad1, ad2]. + Return the list of block removed. @ad1: First address @ad2: Last address """ - # Find concerned blocs - modified_blocs = set() - for b in self.lbl2bloc.values(): - if not b.lines: + # Find concerned blocks + modified_blocks = set() + for block in self.lbl2bloc.values(): + if not block.lines: continue - if b.ad_max <= ad1 or b.ad_min >= ad2: - # Bloc not modified + if block.ad_max <= ad1 or block.ad_min >= ad2: + # Block not modified pass else: - # Modified blocs - modified_blocs.add(b) + # Modified blocks + modified_blocks.add(block) # Generate interval to delete - del_interval = self.blocs2memrange(modified_blocs) + del_interval = self.blocs2memrange(modified_blocks) # Remove interval from monitored interval list self.blocs_mem_interval -= del_interval - # Remove modified blocs - for b in modified_blocs: + # Remove modified blocks + for block in modified_blocks: try: for irblock in block.blocks: - - # Remove offset -> jitted bloc link - if irbloc.label.offset in self.lbl2jitbloc: - del(self.lbl2jitbloc[irbloc.label.offset]) + # Remove offset -> jitted block link + if irblock.label.offset in self.lbl2jitbloc: + del(self.lbl2jitbloc[irblock.label.offset]) except AttributeError: - # The bloc has never been translated in IR - if b.label.offset in self.lbl2jitbloc: - del(self.lbl2jitbloc[b.label.offset]) + # The block has never been translated in IR + if block.label.offset in self.lbl2jitbloc: + del(self.lbl2jitbloc[block.label.offset]) - # Remove label -> bloc link - del(self.lbl2bloc[b.label]) + # Remove label -> block link + del(self.lbl2bloc[block.label]) - return modified_blocs + return modified_blocks def updt_automod_code_range(self, vm, mem_range): """Remove jitted code in range @mem_range diff --git a/miasm2/jitter/jitcore_python.py b/miasm2/jitter/jitcore_python.py index a8ecc3d6..cbd582ab 100644 --- a/miasm2/jitter/jitcore_python.py +++ b/miasm2/jitter/jitcore_python.py @@ -34,10 +34,10 @@ class JitCore_Python(jitcore.JitCore): "Preload symbols according to current architecture" self.symbexec.reset_regs() - def jitirblocs(self, label, irblocs): - """Create a python function corresponding to an irblocs' group. - @label: the label of the irblocs - @irblocs: a gorup of irblocs + def jitirblocs(self, label, irblocks): + """Create a python function corresponding to an irblocks' group. + @label: the label of the irblocks + @irblocks: a gorup of irblocks """ def myfunc(cpu): @@ -47,7 +47,7 @@ class JitCore_Python(jitcore.JitCore): # Get virtual memory handler vmmngr = cpu.vmmngr - # Keep current location in irblocs + # Keep current location in irblocks cur_label = label # Required to detect new instructions @@ -57,15 +57,15 @@ class JitCore_Python(jitcore.JitCore): exec_engine = self.symbexec expr_simp = exec_engine.expr_simp - # For each irbloc inside irblocs + # For each irbloc inside irblocks while True: # Get the current bloc - for irb in irblocs: + for irb in irblocks: if irb.label == cur_label: break else: - raise RuntimeError("Irblocs must end with returning an " + raise RuntimeError("Irblocks must end with returning an " "ExprInt instance") # Refresh CPU values according to @cpu instance diff --git a/miasm2/jitter/jitload.py b/miasm2/jitter/jitload.py index eaeae89a..693dd224 100644 --- a/miasm2/jitter/jitload.py +++ b/miasm2/jitter/jitload.py @@ -242,7 +242,7 @@ class jitter: "Add common exceptions handlers" def exception_automod(jitter): - "Tell the JiT backend to update blocs modified" + "Tell the JiT backend to update blocks modified" self.jit.updt_automod_code(jitter.vm) self.vm.set_exception(0) diff --git a/test/arch/aarch64/unit/asm_test.py b/test/arch/aarch64/unit/asm_test.py index 54ab476d..d8639ce7 100644 --- a/test/arch/aarch64/unit/asm_test.py +++ b/test/arch/aarch64/unit/asm_test.py @@ -28,12 +28,12 @@ class Asm_Test(object): def asm(self): - blocs, symbol_pool = parse_asm.parse_txt(mn_aarch64, 'l', self.TXT, - symbol_pool = self.myjit.ir_arch.symbol_pool) + blocks, symbol_pool = parse_asm.parse_txt(mn_aarch64, 'l', self.TXT, + symbol_pool = self.myjit.ir_arch.symbol_pool) # fix shellcode addr symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0) s = StrPatchwork() - patches = asmbloc.asm_resolve_final(mn_aarch64, blocs, symbol_pool) + patches = asmbloc.asm_resolve_final(mn_aarch64, blocks, symbol_pool) for offset, raw in patches.items(): s[offset] = raw diff --git a/test/arch/mips32/unit/asm_test.py b/test/arch/mips32/unit/asm_test.py index 4425bb65..4edcaf84 100644 --- a/test/arch/mips32/unit/asm_test.py +++ b/test/arch/mips32/unit/asm_test.py @@ -28,12 +28,12 @@ class Asm_Test(object): self.check() def asm(self): - blocs, symbol_pool = parse_asm.parse_txt(mn_mips32, 'l', self.TXT, - symbol_pool=self.myjit.ir_arch.symbol_pool) + blocks, symbol_pool = parse_asm.parse_txt(mn_mips32, 'l', self.TXT, + symbol_pool=self.myjit.ir_arch.symbol_pool) # fix shellcode addr symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0) s = StrPatchwork() - patches = asmbloc.asm_resolve_final(mn_mips32, blocs, symbol_pool) + patches = asmbloc.asm_resolve_final(mn_mips32, blocks, symbol_pool) for offset, raw in patches.items(): s[offset] = raw diff --git a/test/arch/x86/sem.py b/test/arch/x86/sem.py index 676dfeed..40988e61 100755 --- a/test/arch/x86/sem.py +++ b/test/arch/x86/sem.py @@ -45,11 +45,11 @@ def compute(ir, mode, asm, inputstate={}, debug=False): def compute_txt(ir, mode, txt, inputstate={}, debug=False): - blocs, symbol_pool = parse_asm.parse_txt(mn, mode, txt) + blocks, symbol_pool = parse_asm.parse_txt(mn, mode, txt) symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0) - patches = asmbloc.asm_resolve_final(mn, blocs, symbol_pool) + patches = asmbloc.asm_resolve_final(mn, blocks, symbol_pool) interm = ir(symbol_pool) - for bbl in blocs: + for bbl in blocks: interm.add_bloc(bbl) return symb_exec(interm, inputstate, debug) diff --git a/test/arch/x86/unit/asm_test.py b/test/arch/x86/unit/asm_test.py index 524791ce..ebe7612d 100644 --- a/test/arch/x86/unit/asm_test.py +++ b/test/arch/x86/unit/asm_test.py @@ -44,12 +44,12 @@ class Asm_Test(object): assert(self.myjit.pc == self.ret_addr) def asm(self): - blocs, symbol_pool = parse_asm.parse_txt(mn_x86, self.arch_attrib, self.TXT, - symbol_pool = self.myjit.ir_arch.symbol_pool) + blocks, symbol_pool = parse_asm.parse_txt(mn_x86, self.arch_attrib, self.TXT, + symbol_pool = self.myjit.ir_arch.symbol_pool) # fix shellcode addr symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0) s = StrPatchwork() - patches = asmbloc.asm_resolve_final(mn_x86, blocs, symbol_pool) + patches = asmbloc.asm_resolve_final(mn_x86, blocks, symbol_pool) for offset, raw in patches.items(): s[offset] = raw |