3 files changed, 28 insertions, 0 deletions
diff --git a/miasm2/arch/aarch64/arch.py b/miasm2/arch/aarch64/arch.py
index 91554233..015464d6 100644
--- a/miasm2/arch/aarch64/arch.py
+++ b/miasm2/arch/aarch64/arch.py
@@ -2161,3 +2161,4 @@ ltacctype = bs_mod_name(l=1, fname='order', mn_mod=['', 'A'])
 
 
 aarch64op("casp",   [bs('0'), sf, bs('001000'), bs('0'), ltacctype, bs('1'), rs, stacctype, bs('11111'), rn64_deref_nooff, rt], [rs, rt, rn64_deref_nooff])
+aarch64op("ldaxrb", [bs('00'),  bs('001000'), bs('0'), bs('1'), bs('0'), bs('11111'), bs('1'), bs('11111'), rn64_deref_nooff, rt32], [rt32, rn64_deref_nooff])
diff --git a/miasm2/arch/aarch64/sem.py b/miasm2/arch/aarch64/sem.py
index e4702a4f..7052f423 100644
--- a/miasm2/arch/aarch64/sem.py
+++ b/miasm2/arch/aarch64/sem.py
@@ -622,6 +622,25 @@ def ldrsh(ir, instr, arg1, arg2):
 def ldrsw(ir, instr, arg1, arg2):
     return ldrs_size(ir, instr, arg1, arg2, 32)
 
+def ldaxrb(ir, instr, arg1, arg2):
+    # TODO XXX no memory lock implemented
+    assert arg2.is_op('preinc')
+    assert len(arg2.args) == 1
+    ptr = arg2.args[0]
+    e = []
+    e.append(ExprAssign(arg1, ExprMem(ptr, 8).zeroExtend(arg1.size)))
+    return e, []
+
+
+def stlxrb(ir, instr, arg1, arg2, arg3):
+    assert arg3.is_op('preinc')
+    assert len(arg3.args) == 1
+    ptr = arg3.args[0]
+    e = []
+    e.append(ExprAssign(ExprMem(ptr, 8), arg2[:8]))
+    # TODO XXX here, force update success
+    e.append(ExprAssign(arg1, ExprInt(0, arg1.size)))
+    return e, []
 
 
 def l_str(ir, instr, arg1, arg2):
@@ -1319,6 +1338,9 @@ mnemo_func.update({
     'ldrsh': ldrsh,
     'ldrsw': ldrsw,
 
+    'ldaxrb': ldaxrb,
+    'stlxrb': stlxrb,
+
     'str': l_str,
     'strb': strb,
     'strh': strh,
diff --git a/test/arch/aarch64/arch.py b/test/arch/aarch64/arch.py
index 46a4514b..d2f5114e 100644
--- a/test/arch/aarch64/arch.py
+++ b/test/arch/aarch64/arch.py
@@ -1814,6 +1814,11 @@ reg_tests_aarch64 = [
     ("XXXXXXXX    CASPAL     W0, W2, [X4]",
      "82FC6008"),
 
+    ("XXXXXXXX    LDAXRB     W15, [X14]",
+     "CFFD5F08"),
+    ("XXXXXXXX    STLXRB     W17, W16, [X14]",
+     "D0FD1108"),
+
 ]