about summary refs log tree commit diff stats
path: root/test/arch/x86/arch.py
diff options
context:
space:
mode:
Diffstat (limited to 'test/arch/x86/arch.py')
-rw-r--r--test/arch/x86/arch.py599
1 files changed, 580 insertions, 19 deletions
diff --git a/test/arch/x86/arch.py b/test/arch/x86/arch.py
index 93b651c0..2109aa53 100644
--- a/test/arch/x86/arch.py
+++ b/test/arch/x86/arch.py
@@ -63,6 +63,525 @@ m64 = 64  # (64, 64)
 reg_tests = [
 
 
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EAX]",
+    "0fea00"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [ECX]",
+     "0fea01"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EDX]",
+     "0fea02"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EBX]",
+     "0fea03"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EAX+EDX*0x4]",
+     "0fea0490"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [0x90909090]",
+     "0fea0590909090"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [ESI]",
+     "0fea06"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EDI]",
+     "0fea07"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EAX]",
+     "0fea08"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [ECX]",
+     "0fea09"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EDX]",
+     "0fea0a"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EBX]",
+     "0fea0b"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EAX+EDX*0x4]",
+     "0fea0c90"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [0x90909090]",
+     "0fea0d90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [ESI]",
+     "0fea0e"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EDI]",
+     "0fea0f"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EAX]",
+     "0fea10"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [ECX]",
+     "0fea11"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EDX]",
+     "0fea12"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EBX]",
+     "0fea13"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EAX+EDX*0x4]",
+     "0fea1490"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [0x90909090]",
+     "0fea1590909090"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [ESI]",
+     "0fea16"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EDI]",
+     "0fea17"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EAX]",
+     "0fea18"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [ECX]",
+     "0fea19"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EDX]",
+     "0fea1a"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EBX]",
+     "0fea1b"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EAX+EDX*0x4]",
+     "0fea1c90"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [0x90909090]",
+     "0fea1d90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [ESI]",
+     "0fea1e"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EDI]",
+     "0fea1f"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EAX]",
+     "0fea20"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [ECX]",
+     "0fea21"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EDX]",
+     "0fea22"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EBX]",
+     "0fea23"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EAX+EDX*0x4]",
+     "0fea2490"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [0x90909090]",
+     "0fea2590909090"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [ESI]",
+     "0fea26"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EDI]",
+     "0fea27"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EAX]",
+     "0fea28"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [ECX]",
+     "0fea29"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EDX]",
+     "0fea2a"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EBX]",
+     "0fea2b"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EAX+EDX*0x4]",
+     "0fea2c90"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [0x90909090]",
+     "0fea2d90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [ESI]",
+     "0fea2e"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EDI]",
+     "0fea2f"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EAX]",
+     "0fea30"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [ECX]",
+     "0fea31"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EDX]",
+     "0fea32"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EBX]",
+     "0fea33"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EAX+EDX*0x4]",
+     "0fea3490"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [0x90909090]",
+     "0fea3590909090"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [ESI]",
+     "0fea36"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EDI]",
+     "0fea37"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EAX]",
+     "0fea38"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [ECX]",
+     "0fea39"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EDX]",
+     "0fea3a"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EBX]",
+     "0fea3b"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EAX+EDX*0x4]",
+     "0fea3c90"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [0x90909090]",
+     "0fea3d90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [ESI]",
+     "0fea3e"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EDI]",
+     "0fea3f"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EAX+0xFFFFFF90]",
+     "0fea4090"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [ECX+0xFFFFFF90]",
+     "0fea4190"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EDX+0xFFFFFF90]",
+     "0fea4290"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EBX+0xFFFFFF90]",
+     "0fea4390"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]",
+     "0fea449090"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EBP+0xFFFFFF90]",
+     "0fea4590"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [ESI+0xFFFFFF90]",
+     "0fea4690"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EDI+0xFFFFFF90]",
+     "0fea4790"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EAX+0xFFFFFF90]",
+     "0fea4890"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [ECX+0xFFFFFF90]",
+     "0fea4990"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EDX+0xFFFFFF90]",
+     "0fea4a90"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EBX+0xFFFFFF90]",
+     "0fea4b90"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]",
+     "0fea4c9090"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EBP+0xFFFFFF90]",
+     "0fea4d90"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [ESI+0xFFFFFF90]",
+     "0fea4e90"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EDI+0xFFFFFF90]",
+     "0fea4f90"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EAX+0xFFFFFF90]",
+     "0fea5090"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [ECX+0xFFFFFF90]",
+     "0fea5190"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EDX+0xFFFFFF90]",
+     "0fea5290"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EBX+0xFFFFFF90]",
+     "0fea5390"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]",
+     "0fea549090"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EBP+0xFFFFFF90]",
+     "0fea5590"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [ESI+0xFFFFFF90]",
+     "0fea5690"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EDI+0xFFFFFF90]",
+     "0fea5790"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EAX+0xFFFFFF90]",
+     "0fea5890"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [ECX+0xFFFFFF90]",
+     "0fea5990"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EDX+0xFFFFFF90]",
+     "0fea5a90"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EBX+0xFFFFFF90]",
+     "0fea5b90"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]",
+     "0fea5c9090"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EBP+0xFFFFFF90]",
+     "0fea5d90"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [ESI+0xFFFFFF90]",
+     "0fea5e90"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EDI+0xFFFFFF90]",
+     "0fea5f90"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EAX+0xFFFFFF90]",
+     "0fea6090"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [ECX+0xFFFFFF90]",
+     "0fea6190"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EDX+0xFFFFFF90]",
+     "0fea6290"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EBX+0xFFFFFF90]",
+     "0fea6390"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]",
+     "0fea649090"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EBP+0xFFFFFF90]",
+     "0fea6590"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [ESI+0xFFFFFF90]",
+     "0fea6690"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EDI+0xFFFFFF90]",
+     "0fea6790"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EAX+0xFFFFFF90]",
+     "0fea6890"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [ECX+0xFFFFFF90]",
+     "0fea6990"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EDX+0xFFFFFF90]",
+     "0fea6a90"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EBX+0xFFFFFF90]",
+     "0fea6b90"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]",
+     "0fea6c9090"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EBP+0xFFFFFF90]",
+     "0fea6d90"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [ESI+0xFFFFFF90]",
+     "0fea6e90"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EDI+0xFFFFFF90]",
+     "0fea6f90"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EAX+0xFFFFFF90]",
+     "0fea7090"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [ECX+0xFFFFFF90]",
+     "0fea7190"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EDX+0xFFFFFF90]",
+     "0fea7290"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EBX+0xFFFFFF90]",
+     "0fea7390"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]",
+     "0fea749090"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EBP+0xFFFFFF90]",
+     "0fea7590"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [ESI+0xFFFFFF90]",
+     "0fea7690"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EDI+0xFFFFFF90]",
+     "0fea7790"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EAX+0xFFFFFF90]",
+     "0fea7890"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [ECX+0xFFFFFF90]",
+     "0fea7990"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EDX+0xFFFFFF90]",
+     "0fea7a90"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EBX+0xFFFFFF90]",
+     "0fea7b90"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EAX+EDX*0x4+0xFFFFFF90]",
+     "0fea7c9090"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EBP+0xFFFFFF90]",
+     "0fea7d90"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [ESI+0xFFFFFF90]",
+     "0fea7e90"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EDI+0xFFFFFF90]",
+     "0fea7f90"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EAX+0x90909090]",
+     "0fea8090909090"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [ECX+0x90909090]",
+     "0fea8190909090"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EDX+0x90909090]",
+     "0fea8290909090"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EBX+0x90909090]",
+     "0fea8390909090"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EAX+EDX*0x4+0x90909090]",
+     "0fea849090909090"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EBP+0x90909090]",
+     "0fea8590909090"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [ESI+0x90909090]",
+     "0fea8690909090"),
+    (m32, "XXXXXXXX    PMINSW     MM0, QWORD PTR [EDI+0x90909090]",
+     "0fea8790909090"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EAX+0x90909090]",
+     "0fea8890909090"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [ECX+0x90909090]",
+     "0fea8990909090"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EDX+0x90909090]",
+     "0fea8a90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EBX+0x90909090]",
+     "0fea8b90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EAX+EDX*0x4+0x90909090]",
+     "0fea8c9090909090"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EBP+0x90909090]",
+     "0fea8d90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [ESI+0x90909090]",
+     "0fea8e90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM1, QWORD PTR [EDI+0x90909090]",
+     "0fea8f90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EAX+0x90909090]",
+     "0fea9090909090"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [ECX+0x90909090]",
+     "0fea9190909090"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EDX+0x90909090]",
+     "0fea9290909090"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EBX+0x90909090]",
+     "0fea9390909090"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EAX+EDX*0x4+0x90909090]",
+     "0fea949090909090"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EBP+0x90909090]",
+     "0fea9590909090"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [ESI+0x90909090]",
+     "0fea9690909090"),
+    (m32, "XXXXXXXX    PMINSW     MM2, QWORD PTR [EDI+0x90909090]",
+     "0fea9790909090"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EAX+0x90909090]",
+     "0fea9890909090"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [ECX+0x90909090]",
+     "0fea9990909090"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EDX+0x90909090]",
+     "0fea9a90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EBX+0x90909090]",
+     "0fea9b90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EAX+EDX*0x4+0x90909090]",
+     "0fea9c9090909090"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EBP+0x90909090]",
+     "0fea9d90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [ESI+0x90909090]",
+     "0fea9e90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM3, QWORD PTR [EDI+0x90909090]",
+     "0fea9f90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EAX+0x90909090]",
+     "0feaa090909090"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [ECX+0x90909090]",
+     "0feaa190909090"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EDX+0x90909090]",
+     "0feaa290909090"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EBX+0x90909090]",
+     "0feaa390909090"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EAX+EDX*0x4+0x90909090]",
+     "0feaa49090909090"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EBP+0x90909090]",
+     "0feaa590909090"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [ESI+0x90909090]",
+     "0feaa690909090"),
+    (m32, "XXXXXXXX    PMINSW     MM4, QWORD PTR [EDI+0x90909090]",
+     "0feaa790909090"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EAX+0x90909090]",
+     "0feaa890909090"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [ECX+0x90909090]",
+     "0feaa990909090"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EDX+0x90909090]",
+     "0feaaa90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EBX+0x90909090]",
+     "0feaab90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EAX+EDX*0x4+0x90909090]",
+     "0feaac9090909090"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EBP+0x90909090]",
+     "0feaad90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [ESI+0x90909090]",
+     "0feaae90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM5, QWORD PTR [EDI+0x90909090]",
+     "0feaaf90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EAX+0x90909090]",
+     "0feab090909090"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [ECX+0x90909090]",
+     "0feab190909090"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EDX+0x90909090]",
+     "0feab290909090"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EBX+0x90909090]",
+     "0feab390909090"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EAX+EDX*0x4+0x90909090]",
+     "0feab49090909090"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EBP+0x90909090]",
+     "0feab590909090"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [ESI+0x90909090]",
+     "0feab690909090"),
+    (m32, "XXXXXXXX    PMINSW     MM6, QWORD PTR [EDI+0x90909090]",
+     "0feab790909090"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EAX+0x90909090]",
+     "0feab890909090"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [ECX+0x90909090]",
+     "0feab990909090"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EDX+0x90909090]",
+     "0feaba90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EBX+0x90909090]",
+     "0feabb90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EAX+EDX*0x4+0x90909090]",
+     "0feabc9090909090"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EBP+0x90909090]",
+     "0feabd90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [ESI+0x90909090]",
+     "0feabe90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM7, QWORD PTR [EDI+0x90909090]",
+     "0feabf90909090"),
+    (m32, "XXXXXXXX    PMINSW     MM0, MM0",
+     "0feac0"),
+    (m32, "XXXXXXXX    PMINSW     MM0, MM1",
+     "0feac1"),
+    (m32, "XXXXXXXX    PMINSW     MM0, MM2",
+     "0feac2"),
+    (m32, "XXXXXXXX    PMINSW     MM0, MM3",
+     "0feac3"),
+    (m32, "XXXXXXXX    PMINSW     MM0, MM4",
+     "0feac4"),
+    (m32, "XXXXXXXX    PMINSW     MM0, MM5",
+     "0feac5"),
+    (m32, "XXXXXXXX    PMINSW     MM0, MM6",
+     "0feac6"),
+    (m32, "XXXXXXXX    PMINSW     MM0, MM7",
+     "0feac7"),
+    (m32, "XXXXXXXX    PMINSW     MM1, MM0",
+     "0feac8"),
+    (m32, "XXXXXXXX    PMINSW     MM1, MM1",
+     "0feac9"),
+    (m32, "XXXXXXXX    PMINSW     MM1, MM2",
+     "0feaca"),
+    (m32, "XXXXXXXX    PMINSW     MM1, MM3",
+     "0feacb"),
+    (m32, "XXXXXXXX    PMINSW     MM1, MM4",
+     "0feacc"),
+    (m32, "XXXXXXXX    PMINSW     MM1, MM5",
+     "0feacd"),
+    (m32, "XXXXXXXX    PMINSW     MM1, MM6",
+     "0feace"),
+    (m32, "XXXXXXXX    PMINSW     MM1, MM7",
+     "0feacf"),
+    (m32, "XXXXXXXX    PMINSW     MM2, MM0",
+     "0fead0"),
+    (m32, "XXXXXXXX    PMINSW     MM2, MM1",
+     "0fead1"),
+    (m32, "XXXXXXXX    PMINSW     MM2, MM2",
+     "0fead2"),
+    (m32, "XXXXXXXX    PMINSW     MM2, MM3",
+     "0fead3"),
+    (m32, "XXXXXXXX    PMINSW     MM2, MM4",
+     "0fead4"),
+    (m32, "XXXXXXXX    PMINSW     MM2, MM5",
+     "0fead5"),
+    (m32, "XXXXXXXX    PMINSW     MM2, MM6",
+     "0fead6"),
+    (m32, "XXXXXXXX    PMINSW     MM2, MM7",
+     "0fead7"),
+    (m32, "XXXXXXXX    PMINSW     MM3, MM0",
+     "0fead8"),
+    (m32, "XXXXXXXX    PMINSW     MM3, MM1",
+     "0fead9"),
+    (m32, "XXXXXXXX    PMINSW     MM3, MM2",
+     "0feada"),
+    (m32, "XXXXXXXX    PMINSW     MM3, MM3",
+     "0feadb"),
+    (m32, "XXXXXXXX    PMINSW     MM3, MM4",
+     "0feadc"),
+    (m32, "XXXXXXXX    PMINSW     MM3, MM5",
+     "0feadd"),
+    (m32, "XXXXXXXX    PMINSW     MM3, MM6",
+     "0feade"),
+    (m32, "XXXXXXXX    PMINSW     MM3, MM7",
+     "0feadf"),
+    (m32, "XXXXXXXX    PMINSW     MM4, MM0",
+     "0feae0"),
+    (m32, "XXXXXXXX    PMINSW     MM4, MM1",
+     "0feae1"),
+    (m32, "XXXXXXXX    PMINSW     MM4, MM2",
+     "0feae2"),
+    (m32, "XXXXXXXX    PMINSW     MM4, MM3",
+     "0feae3"),
+    (m32, "XXXXXXXX    PMINSW     MM4, MM4",
+     "0feae4"),
+    (m32, "XXXXXXXX    PMINSW     MM4, MM5",
+     "0feae5"),
+    (m32, "XXXXXXXX    PMINSW     MM4, MM6",
+     "0feae6"),
+    (m32, "XXXXXXXX    PMINSW     MM4, MM7",
+     "0feae7"),
+    (m32, "XXXXXXXX    PMINSW     MM5, MM0",
+     "0feae8"),
+    (m32, "XXXXXXXX    PMINSW     MM5, MM1",
+     "0feae9"),
+    (m32, "XXXXXXXX    PMINSW     MM5, MM2",
+     "0feaea"),
+    (m32, "XXXXXXXX    PMINSW     MM5, MM3",
+     "0feaeb"),
+    (m32, "XXXXXXXX    PMINSW     MM5, MM4",
+     "0feaec"),
+    (m32, "XXXXXXXX    PMINSW     MM5, MM5",
+     "0feaed"),
+    (m32, "XXXXXXXX    PMINSW     MM5, MM6",
+     "0feaee"),
+    (m32, "XXXXXXXX    PMINSW     MM5, MM7",
+     "0feaef"),
+    (m32, "XXXXXXXX    PMINSW     MM6, MM0",
+     "0feaf0"),
+    (m32, "XXXXXXXX    PMINSW     MM6, MM1",
+     "0feaf1"),
+    (m32, "XXXXXXXX    PMINSW     MM6, MM2",
+     "0feaf2"),
+    (m32, "XXXXXXXX    PMINSW     MM6, MM3",
+     "0feaf3"),
+    (m32, "XXXXXXXX    PMINSW     MM6, MM4",
+     "0feaf4"),
+    (m32, "XXXXXXXX    PMINSW     MM6, MM5",
+     "0feaf5"),
+    (m32, "XXXXXXXX    PMINSW     MM6, MM6",
+     "0feaf6"),
+    (m32, "XXXXXXXX    PMINSW     MM6, MM7",
+     "0feaf7"),
+    (m32, "XXXXXXXX    PMINSW     MM7, MM0",
+     "0feaf8"),
+    (m32, "XXXXXXXX    PMINSW     MM7, MM1",
+     "0feaf9"),
+    (m32, "XXXXXXXX    PMINSW     MM7, MM2",
+     "0feafa"),
+    (m32, "XXXXXXXX    PMINSW     MM7, MM3",
+     "0feafb"),
+    (m32, "XXXXXXXX    PMINSW     MM7, MM4",
+     "0feafc"),
+    (m32, "XXXXXXXX    PMINSW     MM7, MM5",
+     "0feafd"),
+    (m32, "XXXXXXXX    PMINSW     MM7, MM6",
+     "0feafe"),
+    (m32, "XXXXXXXX    PMINSW     MM7, MM7",
+     "0feaff"),
+
+
+
+    (m32, "00674296    MOVD       ESI, MM1",
+     "0F7ECE"),
+    (m32, "00674293    MOVD       MM1, EBX",
+     "0F6ECB"),
     (m32, "00000000    AAA",
      "37"),
     (m32, "00000000    AAS",
@@ -1651,27 +2170,29 @@ reg_tests = [
 
     (m32, "00000000    XORPS      XMM1, XMM2",
      "0f57ca"),
-    (m32, "00000000    XORPS      XMM1, DWORD PTR [EDI+0x42]",
+    (m32, "00000000    XORPS      XMM1, XMMWORD PTR [EDI+0x42]",
      "0f574f42"),
     (m32, "00000000    XORPD      XMM1, XMM2",
      "660f57ca"),
 
-    (m32, "00000000    MOVAPS     DWORD PTR [EBP+0xFFFFFFB8], XMM0",
+    (m32, "00000000    MOVAPS     XMMWORD PTR [EBP+0xFFFFFFB8], XMM0",
      "0f2945b8"),
-    (m32, "00000000    MOVAPS     XMM0, DWORD PTR [EBP+0xFFFFFFB8]",
+    (m32, "00000000    MOVAPS     XMM0, XMMWORD PTR [EBP+0xFFFFFFB8]",
      "0f2845b8"),
-    (m32, "00000000    MOVAPD     WORD PTR [EBP+0xFFFFFFB8], XMM0",
+    (m32, "00000000    MOVAPD     XMMWORD PTR [EBP+0xFFFFFFB8], XMM0",
      "660f2945b8"),
 
-    (m32, "00000000    MOVUPS     XMM2, DWORD PTR [ECX]",
+    (m32, "00000000    MOVUPS     XMM2, XMMWORD PTR [ECX]",
      "0f1011"),
-    (m32, "00000000    MOVSD      XMM2, DWORD PTR [ECX]",
+    (m32, "00000000    MOVSD      XMM2, QWORD PTR [ECX]",
      "f20f1011"),
-    (m32, "00000000    MOVSD      DWORD PTR [EBP+0xFFFFFFD8], XMM0",
+    (m32, "00000000    MOVSD      XMM2, XMM1",
+     "f20f10d1"),
+    (m32, "00000000    MOVSD      QWORD PTR [EBP+0xFFFFFFD8], XMM0",
      "f20f1145d8"),
     (m32, "00000000    MOVSS      XMM2, DWORD PTR [ECX]",
      "f30f1011"),
-    (m32, "00000000    MOVUPD     XMM2, DWORD PTR [ECX]",
+    (m32, "00000000    MOVUPD     XMM2, XMMWORD PTR [ECX]",
      "660f1011"),
 
     (m32, "00000000    MOVSS      DWORD PTR [EBP+0xFFFFFC00], XMM0",
@@ -1682,32 +2203,42 @@ reg_tests = [
 
     (m32, "00000000    ADDSS      XMM2, DWORD PTR [ECX]",
      "f30f5811"),
-    (m32, "00000000    ADDSD      XMM2, DWORD PTR [ECX]",
+    (m32, "00000000    ADDSS      XMM1, XMM2",
+     "f30f58ca"),
+    (m32, "00000000    ADDSD      XMM2, QWORD PTR [ECX]",
      "f20f5811"),
-    (m32, "00000000    ADDPS      XMM2, DWORD PTR [ECX]",
+    (m32, "00000000    ADDSD      XMM2, XMM1",
+     "f20f58d1"),
+    (m32, "00000000    ADDPS      XMM2, XMMWORD PTR [ECX]",
      "0f5811"),
-    (m32, "00000000    ADDPD      XMM2, DWORD PTR [ECX]",
+    (m32, "00000000    ADDPD      XMM2, XMMWORD PTR [ECX]",
      "660f5811"),
 
-    (m32, "00000000    MULSD      XMM2, DWORD PTR [ECX]",
+    (m32, "00000000    MULSD      XMM2, QWORD PTR [ECX]",
      "f20f5911"),
 
 
     (m32, "00000000    PXOR       XMM0, XMM0",
      "0fefc0"),
-    (m32, "00000000    UCOMISD    XMM0, DWORD PTR [EBP+0xFFFFFFD8]",
+    (m32, "00000000    UCOMISD    XMM0, QWORD PTR [EBP+0xFFFFFFD8]",
      "660f2e45d8"),
-    (m32, "00000000    ANDPD      XMM0, DWORD PTR [EBX+0x2CBD27]",
+    (m32, "00000000    ANDPS      XMM0, XMMWORD PTR [EBX+0x2CBD27]",
+     "0f548327bd2c00"),
+    (m32, "00000000    ANDPD      XMM0, XMMWORD PTR [EBX+0x2CBD27]",
      "660f548327bd2c00"),
 
     (m32, "00000000    SUBSD      XMM1, XMM0",
      "f20f5cc8"),
 
-    (m32, "00000000    MAXSD      XMM0, DWORD PTR [EBX+0x2CBD37]",
+    (m32, "00000000    MAXSD      XMM0, QWORD PTR [EBX+0x2CBD37]",
      "f20f5f8337bd2c00"),
+    (m32, "00000000    MAXSS      XMM0, DWORD PTR [EBX+0x2CBD37]",
+     "f30f5f8337bd2c00"),
 
     (m32, "00000000    CVTSI2SD   XMM0, EBX",
      "f20f2ac3"),
+    (m32, "00000000    CVTSI2SS   XMM0, EBX",
+     "f30f2ac3"),
 
     (m32, "00000000    PMINSW     MM0, MM1",
      "0feac1"),
@@ -1770,9 +2301,16 @@ reg_tests = [
     (m64, "00000000    MOVD       DWORD PTR [RAX+R10*0x8], XMM4",
      "66420f7e24d0"),
 
-    (m64, "00000000    MOVQ       XMM4, DWORD PTR [RAX+R10*0x8]",
+    (m32, "00000002    MOVQ       XMM4, QWORD PTR [EAX+EDX*0x8]",
+     "F30F7E24D0"),
+    (m32, "00000008    MOVQ       QWORD PTR [EAX+EDX*0x8], XMM4",
+     "660FD624D0"),
+    (m32, "0000000E    MOVQ       QWORD PTR [EAX+EDX*0x8], MM4",
+     "0F7F24D0"),
+
+    (m64, "00000000    MOVQ       XMM4, QWORD PTR [RAX+R10*0x8]",
      "f3420f7e24d0"),
-    (m64, "00000000    MOVQ       XMM1, DWORD PTR [R12+0xFFFFFFFFFFFFFFE0]",
+    (m64, "00000000    MOVQ       XMM1, QWORD PTR [R12+0xFFFFFFFFFFFFFFE0]",
      "f3410f7e4c24e0"),
 
 
@@ -1790,9 +2328,9 @@ reg_tests = [
     (m32, "00000000    POR        XMM0, XMM1",
      "660febc1"),
 
-    (m32, "00000000    MOVDQU     XMM1, DWORD PTR [ESI]",
+    (m32, "00000000    MOVDQU     XMM1, XMMWORD PTR [ESI]",
      "f30f6f0e"),
-    (m32, "00000000    MOVDQA     DWORD PTR [ESP], XMM0",
+    (m32, "00000000    MOVDQA     XMMWORD PTR [ESP], XMM0",
      "660f7f0424"),
 
     (m32, "00000000    LES        EDI, DWORD PTR [ESI]",
@@ -1830,6 +2368,23 @@ reg_tests = [
     (m32, "00000000    PADDQ      XMM0, XMM1",
      "660fd4c1"),
 
+    (m32, "00000007    PADDB      MM4, QWORD PTR [EAX+EDX*0x8]",
+     "0FFC24D0"),
+    (m32, "0000000B    PADDB      XMM4, XMMWORD PTR [EAX+EDX*0x8]",
+     "660FFC24D0"),
+
+    (m32, "00000000    PADDB      MM0, MM1",
+     "0ffcc1"),
+    (m64, "00000000    PADDB      MM0, MM1",
+     "0ffcc1"),
+    (m32, "00000000    PADDW      MM0, MM1",
+     "0ffdc1"),
+    (m32, "00000000    PADDD      MM0, MM1",
+     "0ffec1"),
+    (m32, "00000000    PADDQ      MM0, MM1",
+     "0fd4c1"),
+
+
     ## Substractions
     # SSE
     (m32, "00000000    PSUBB      XMM0, XMM1",
@@ -1890,6 +2445,12 @@ reg_tests = [
      "f30f5ac0"),
     (m32, "00000000    CVTSS2SD   XMM0, DWORD PTR [EBP+0xFFFFFFD0]",
      "f30f5a45d0"),
+
+    (m32, "00000001    CVTSD2SS   XMM4, QWORD PTR [EAX+EDX*0x8]",
+     "F20F5A24D0"),
+    (m32, "00000006    CVTSS2SD   XMM4, DWORD PTR [EAX+EDX*0x8]",
+     "F30F5A24D0"),
+
 ]