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* Merge pull request #1448 from cea-sec/generic-unpackserpilliere2023-04-231-0/+6
|\ | | | | Generic import recovery (cheap ImpRec style)
| * Add a sandbox example using the ImpRec strategyCamille Mougey2023-04-231-0/+6
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* | Example: add a basic symbol_exec exampleCamille Mougey2023-04-231-0/+1
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* Compatibility of our tests with unittestIvan “CLOVIS” Canet2022-03-241-7/+60
| | | | | | This commit introduces a compatibility layer to run the Miasm tests using Python's unittest. Due to unittest not knowing how to execute tests in parallel, this is much slower than the current alternative. Supporting unittest (which is a Python standard) as an addition to our own homegrown runner, even if slower, is useful for integration with other tools thanks to the shared format (eg. see full standard output logs for each test in PyCharm, generate XUnit test reports in CI...).
* Add test for memory breakpoint exampleWilliam Bruneau2022-02-231-0/+5
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* Add memory breakpoints in debugger and examplesWilliam Bruneau2022-02-232-6/+2
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* Fix html; Add reg testFabrice Desclaux2021-12-066-0/+7
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* Add aarch64 strlrxxFabrice Desclaux2021-10-291-0/+5
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* Test expressions interferencesFabrice Desclaux2021-10-131-0/+1
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* x86_64 Fix multiple REX prefix instruction disasm (#1376)Konstantin Komarov2021-07-031-0/+7
| | | | Fix multiple rex prefixes
* Symbols are str instead of bytesFabrice Desclaux2021-06-082-246/+246
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* Replace jitter.run boolean by jitter.runningRomain Lesteven2021-05-057-11/+11
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* Display exception flag on jitter exceptionsWilliam Bruneau2021-02-242-2/+4
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* Fix ADD/SUB; Add CMNFabrice Desclaux2021-02-141-0/+4
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* Fix ircfg_a namesFabrice Desclaux2021-01-191-17/+0
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* Add simplificationFabrice Desclaux2020-12-281-0/+11
| | | | | The simplification added in ce175bb51 may take reduction before simp_cc_conds. This add simplifications for remaining case.
* Rename ir_arch for jitterFabrice Desclaux2020-12-252-25/+25
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* Rename examples lifterFabrice Desclaux2020-12-255-39/+39
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* Rename LifterModelCallMepFabrice Desclaux2020-12-242-4/+4
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* Change example namesFabrice Desclaux2020-12-241-2/+2
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* Rename msp430 lifterFabrice Desclaux2020-12-241-1/+1
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* Rename mep lifterFabrice Desclaux2020-12-242-4/+4
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* Rename ppc32 lifterFabrice Desclaux2020-12-241-1/+1
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* Rename arm lifterFabrice Desclaux2020-12-241-1/+1
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* Rename x86 lifterFabrice Desclaux2020-12-243-5/+5
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* Rename ira => LifterModelCallFabrice Desclaux2020-12-249-184/+184
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* Sembuilder: Remove mem[X]Fabrice Desclaux2020-12-161-3/+3
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* Add z3 div reg testFabrice Desclaux2020-12-032-0/+41
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* [AARCH64] add another test extrw4kfu2020-11-191-0/+2
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* Add test unitsIridiumXOR2020-09-231-0/+10
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* Update api according to loc_db updateFabrice Desclaux2020-08-3114-22/+25
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* IRBlock take loc_dbFabrice Desclaux2020-08-314-5/+5
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* Avoid generate default locationdbFabrice Desclaux2020-08-3126-96/+146
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* Move modint in coreFabrice Desclaux2020-07-213-5/+5
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* Add cond CC flag simplificationFabrice Desclaux2020-06-251-0/+25
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* Support to ALL system register for AARCH64 (#1251)IridiumXOR2020-06-191-6/+6
| | | | * Support to ALL system register for AARCH64
* Fix issue #1255 ; Add unit testw4kfu2020-06-161-0/+25
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* Updt dis_block_callback; apply_splittingFabrice Desclaux2020-06-101-2/+2
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* Wrong conditional prefix for MRC/MCR (#1233)IridiumXOR2020-05-281-0/+5
| | | | | | | * Wrong conditional prefix for MRC/MCR Sorry, I have wrongly implemented the conditional code for MRC/MCR, now I have fix them. * Add test units for conditional MRC/MCR
* Include missing functions from llvm's compiler-rt into JitllvmAdrien Guinet2020-05-241-1/+2
| | | | | | | | | | Under Windows, we also need to compile these with clang (because MSVCRT doesn't seem to have proper uint128_t support), so automatically check if clang is installed (through the registry) and force distutils to use it (with a not so nice hack). Last but not least, this only works for 64 bit systems, so disable the mn_div test if this is not the case.
* Merge pull request #1229 from IridiumXOR/mips_new_opsserpilliere2020-05-231-0/+21
|\ | | | | Mips new opcodes + bugfix
| * Add test cases and fix args orderIridiumXOR2020-05-221-0/+21
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* | Fix tipoFabrice Desclaux2020-05-221-1/+1
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* | Add test units for MCR/MRCIridiumXOR2020-05-191-0/+4
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* Add new MIPS opcodes (#1203)IridiumXOR2020-04-291-0/+17
| | | | | * Add new MIPS opcodes * Add test for new opcodes and remove semantics for not implemented opcodes
* Initial support for floating point and Altivec instructions in PPC arch (#1141)IridiumXOR2020-04-281-0/+8
| | | | | | | * Initial support for floating point and altivec instructions * Add fpr in .codespell_ignore and correct a typo * Add regression test for floating and Altivec ops
* Fix int(expr)Fabrice Desclaux2020-04-031-1/+1
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* Use int(expr) instead of expr.arg.argFabrice Desclaux2020-04-032-5/+7
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* Add Expression visitorFabrice Desclaux2020-03-291-0/+45
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* Add simplificationsFabrice Desclaux2020-03-201-0/+1
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