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* Add support for Aarch64 instructions ldsmax(b|h|w) and ldsmax 64-bit variants HEAD ta/arm64-ldsmaxb masterTheofilos Augoustis2025-10-141-0/+3
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* Add TZCNT instructionChristian Krinitsin2025-10-091-0/+9
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* Add BZHI instructionChristian Krinitsin2025-10-091-0/+3
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* Add BLSR instructionChristian Krinitsin2025-10-091-0/+3
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* Add BLSMSK instructionChristian Krinitsin2025-10-091-0/+3
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* Add BEXTR instructionChristian Krinitsin2025-10-091-0/+3
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* Add support for ANDN instructionChristian Krinitsin2025-10-091-0/+3
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* Add blsi opcode and testsChristian Krinitsin2025-10-091-0/+10
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* Update setup & testsFabrice Desclaux2025-01-261-1/+1
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* Merge pull request #1496 from AeonLucid/fix/aarch64_immhi_pageserpilliere2024-08-201-1/+4
|\ | | | | Fix typo in aarch64_immhi_page decode
| * Add regression test for aarch64_immhi_pageAeonLucid2024-08-101-1/+4
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* | Merge pull request #1502 from W0ni/fix_expression_divisionserpilliere2024-08-201-0/+6
|\ \ | | | | | | fix expression division
| * | fix expression division and add testwoni2024-08-191-0/+6
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* | | Fixes #1500Alex2024-08-131-6/+6
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* | Merge pull request #1486 from serpilliere/fix_aarch64_cmpserpilliere2024-04-281-0/+3
|\ \ | |/ |/| Fix add/sub aarch64
| * Fix add/sub aarch64Fabrice Desclaux2024-04-271-0/+3
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* | Merge pull request #1474 from DimitriPapadopoulos/codespellserpilliere2024-03-281-1/+1
|\ \ | | | | | | Fix typos found by codespell
| * | Fix typos found by codespellDimitri Papadopoulos2024-03-181-1/+1
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* | | Merge pull request #1457 from W0ni/arm_handle_cf_shiftersserpilliere2024-03-212-3/+59
|\ \ \ | |/ / |/| | [ARM] compute cf for shift/rotate
| * | Add MOV and MOVS tests for [AL]SRwoni2024-03-141-1/+6
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| * | Add tests for MOVS and isThumb utility functionwoni2023-09-131-0/+51
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| * | Fix disassembly bugwoni2023-09-131-2/+2
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* / Use regex literals for re.* functionsDuncan Ogilvie2024-01-062-3/+3
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* Merge pull request #1448 from cea-sec/generic-unpackserpilliere2023-04-231-0/+6
|\ | | | | Generic import recovery (cheap ImpRec style)
| * Add a sandbox example using the ImpRec strategyCamille Mougey2023-04-231-0/+6
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* | Example: add a basic symbol_exec exampleCamille Mougey2023-04-231-0/+1
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* Compatibility of our tests with unittestIvan “CLOVIS” Canet2022-03-241-7/+60
| | | | | | This commit introduces a compatibility layer to run the Miasm tests using Python's unittest. Due to unittest not knowing how to execute tests in parallel, this is much slower than the current alternative. Supporting unittest (which is a Python standard) as an addition to our own homegrown runner, even if slower, is useful for integration with other tools thanks to the shared format (eg. see full standard output logs for each test in PyCharm, generate XUnit test reports in CI...).
* Add test for memory breakpoint exampleWilliam Bruneau2022-02-231-0/+5
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* Add memory breakpoints in debugger and examplesWilliam Bruneau2022-02-232-6/+2
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* Fix html; Add reg testFabrice Desclaux2021-12-066-0/+7
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* Add aarch64 strlrxxFabrice Desclaux2021-10-291-0/+5
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* Test expressions interferencesFabrice Desclaux2021-10-131-0/+1
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* x86_64 Fix multiple REX prefix instruction disasm (#1376)Konstantin Komarov2021-07-031-0/+7
| | | | Fix multiple rex prefixes
* Symbols are str instead of bytesFabrice Desclaux2021-06-082-246/+246
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* Replace jitter.run boolean by jitter.runningRomain Lesteven2021-05-057-11/+11
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* Display exception flag on jitter exceptionsWilliam Bruneau2021-02-242-2/+4
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* Fix ADD/SUB; Add CMNFabrice Desclaux2021-02-141-0/+4
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* Fix ircfg_a namesFabrice Desclaux2021-01-191-17/+0
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* Add simplificationFabrice Desclaux2020-12-281-0/+11
| | | | | The simplification added in ce175bb51 may take reduction before simp_cc_conds. This add simplifications for remaining case.
* Rename ir_arch for jitterFabrice Desclaux2020-12-252-25/+25
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* Rename examples lifterFabrice Desclaux2020-12-255-39/+39
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* Rename LifterModelCallMepFabrice Desclaux2020-12-242-4/+4
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* Change example namesFabrice Desclaux2020-12-241-2/+2
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* Rename msp430 lifterFabrice Desclaux2020-12-241-1/+1
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* Rename mep lifterFabrice Desclaux2020-12-242-4/+4
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* Rename ppc32 lifterFabrice Desclaux2020-12-241-1/+1
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* Rename arm lifterFabrice Desclaux2020-12-241-1/+1
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* Rename x86 lifterFabrice Desclaux2020-12-243-5/+5
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* Rename ira => LifterModelCallFabrice Desclaux2020-12-249-184/+184
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* Sembuilder: Remove mem[X]Fabrice Desclaux2020-12-161-3/+3
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