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* Arm: swi is svcFabrice Desclaux2014-09-291-0/+2
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* Arm: add bkptFabrice Desclaux2014-09-291-0/+2
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* Arm: fix ldmia write backFabrice Desclaux2014-09-291-1/+3
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* Arm: fixdstoffset computation, add asm reg testFabrice Desclaux2014-09-291-0/+1
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* Example: Add Unpack_Gen, a skeleton for unpacking scriptsajax2014-09-241-0/+1
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* mergeFabrice Desclaux2014-09-191-7/+8
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| * Example: Add an example of a simplification registeringCamille Mougey2014-09-191-0/+1
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| * Expression examples: Rename examples with meaningfull namesCamille Mougey2014-09-191-7/+7
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* | test: add mnemonic testsFabrice Desclaux2014-09-194-0/+150
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* mergeFabrice Desclaux2014-09-191-0/+2
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* mips: add ei/ehb (dummy semantic)Fabrice Desclaux2014-09-151-0/+2
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* Modify irbloc destination mecanism. Rework API in consequence.Fabrice Desclaux2014-09-055-15/+14
| | | | | | | | | | Fat patch here: some API have changed. Each irbloc now affects a special "IRDst" register which is used to describe the destination irbloc. It allows simple description of architectures using delay slots. Architectures semantic and tcc/python jitter are modified in consequence. LLVM jitter is disabled for now, but should be patch soon.
* mips32: add ldc1serpilliere2014-08-281-0/+2
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* mips: missing fileserpilliere2014-08-251-0/+3
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* Jitter: add mips32l jitserpilliere2014-08-221-1/+1
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* Test: add msp430 asm/dis/jitserpilliere2014-08-211-0/+3
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* jit: move code into arch directoryserpilliere2014-08-211-3/+4
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* mips32: add mnemo JAL/MOVZserpilliere2014-08-211-0/+4
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* mips32: little/big endian is now an attribserpilliere2014-08-211-3/+3
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* x86: add les/lds. Fix call/ret farserpilliere2014-08-121-0/+16
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* Add mips32 archserpilliere2014-08-062-0/+238
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* x86 arch: fix some mnemonicserpilliere2014-08-051-0/+3
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* Arm arch: add uxtb uxth sxtb sxthserpilliere2014-08-011-0/+15
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* Simplification: Fix 'A op 0' with op == '-' bug, add corresponding test caseajax2014-07-301-0/+2
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* Test: Improve x86 SSE tests (thanks to Adrien Guinet)ajax2014-07-303-4/+230
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* X86 arch: addps/addpdserpilliere2014-07-211-0/+4
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* ajout test jitter/os_dep/win_api_x86_32.pyRomain CARRE2014-07-072-0/+148
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* Arm: update reg testsserpilliere2014-07-031-2/+11
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* Fix arm reg testsserpilliere2014-06-301-1/+1
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* Test: add x86 mnemo testsserpilliere2014-06-251-0/+62
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* Test: Yes, we can use a function to invoke all jitter each timeajax2014-06-161-33/+23
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* Jitter Python: Add the rest of tests (unpack_upx is very long)ajax2014-06-161-0/+4
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* Test: Add "python" jitter for few testsajax2014-06-161-0/+4
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* Test: add arm test with symbexec engineserpilliere2014-06-161-0/+1
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* Test: Add a new test for Python jitterajax2014-06-141-0/+1
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* Test: Add "tcc", "llvm" and "python" jitter for the example "test_jit_x86_32"ajax2014-06-141-1/+3
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* Test: Add LLVM jitter in md5_arm exampleajax2014-06-131-1/+2
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* Simplification: detect and handle == conditionserpilliere2014-06-131-6/+6
| | | | Add corresponding regression tests
* Simplifications: Add symetric cond catching + corresponding testsajax2014-06-121-0/+2
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* Simplifications_cond: Fix size issue, add constructorajax2014-06-121-5/+5
| | | | | | | | | I could have use a child class of ExprOp specific for conditions, but I prefer to keep a better modularity by just using "<s", "<u" as a new op I don't add the size issue in expression/expression.py (such as 'parity') because we don't want dependencies from this file to expression/simplifications_cond (for TOK_*)
* Test: Simplifications: Use ".msb()" instead of hard coded [31:32]ajax2014-06-121-2/+2
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* Simplifications: Add regression tests for simplifications_condajax2014-06-121-1/+30
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* Miasm v2serpilliere2014-06-0315-0/+4434
* API has changed, so old scripts need updates * See example for API usage * Use tcc or llvm for jit emulation * Go to test and run test_all.py to check install Enjoy !