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| author | Christian Krinitsin <mail@krinitsin.com> | 2025-05-30 16:52:07 +0200 |
|---|---|---|
| committer | Christian Krinitsin <mail@krinitsin.com> | 2025-05-30 16:52:17 +0200 |
| commit | 9260319e7411ff8281700a532caa436f40120ec4 (patch) | |
| tree | 2f6bfe5f3458dd49d328d3a9eb508595450adec0 /gitlab/issues_text/target_arm/host_missing/accel_missing/2861 | |
| parent | 225caa38269323af1bfc2daadff5ec8bd930747f (diff) | |
| download | qemu-analysis-9260319e7411ff8281700a532caa436f40120ec4.tar.gz qemu-analysis-9260319e7411ff8281700a532caa436f40120ec4.zip | |
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Diffstat (limited to 'gitlab/issues_text/target_arm/host_missing/accel_missing/2861')
| -rw-r--r-- | gitlab/issues_text/target_arm/host_missing/accel_missing/2861 | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/gitlab/issues_text/target_arm/host_missing/accel_missing/2861 b/gitlab/issues_text/target_arm/host_missing/accel_missing/2861 new file mode 100644 index 000000000..f34d3e7b8 --- /dev/null +++ b/gitlab/issues_text/target_arm/host_missing/accel_missing/2861 @@ -0,0 +1,7 @@ +hw/pci-host/designware.c incorrect write to DESIGNWARE_PCIE_ATU_UPPER_TARGET register +Description of problem: +I think this is a obvious bug + +https://gitlab.com/qemu-project/qemu/-/blob/master/hw/pci-host/designware.c?ref_type=heads#L374 + +Write to register DESIGNWARE_PCIE_ATU_UPPER_TARGET, val should be shifted left to update upper 32 bit part. |