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| author | Christian Krinitsin <mail@krinitsin.com> | 2025-06-01 21:35:14 +0200 |
|---|---|---|
| committer | Christian Krinitsin <mail@krinitsin.com> | 2025-06-01 21:35:14 +0200 |
| commit | 3e4c5a6261770bced301b5e74233e7866166ea5b (patch) | |
| tree | 9379fddaba693ef8a045da06efee8529baa5f6f4 /gitlab/issues_text/target_ppc/host_missing/accel_missing/2663 | |
| parent | e5634e2806195bee44407853c4bf8776f7abfa4f (diff) | |
| download | qemu-analysis-3e4c5a6261770bced301b5e74233e7866166ea5b.tar.gz qemu-analysis-3e4c5a6261770bced301b5e74233e7866166ea5b.zip | |
clean up repository
Diffstat (limited to 'gitlab/issues_text/target_ppc/host_missing/accel_missing/2663')
| -rw-r--r-- | gitlab/issues_text/target_ppc/host_missing/accel_missing/2663 | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/gitlab/issues_text/target_ppc/host_missing/accel_missing/2663 b/gitlab/issues_text/target_ppc/host_missing/accel_missing/2663 deleted file mode 100644 index 11c966ea9..000000000 --- a/gitlab/issues_text/target_ppc/host_missing/accel_missing/2663 +++ /dev/null @@ -1,7 +0,0 @@ -powerpc: for 6xx,7xx,74xx msr and srr1 are not set correctly on exception -Description of problem: -When an exception is raised, qemu does not set bits in SRR1 and MSR correctly. - -This causes some operating systems to not work, in particular early little endian ones like Windows NT. -Additional information: -The following patch changes the MSR and SRR1 bit settings on exception to what is mentioned in the various user manuals for the 6xx, 7xx and 74xx series (6xx and 7xx are effectively identical, 74xx has some additional changes): [exception_msr.patch](/uploads/aae17dd35f0f0e72b831243fcfd0c416/exception_msr.patch) |