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diff --git a/gitlab/issues_text/target_riscv/host_missing/accel_missing/1793 b/gitlab/issues_text/target_riscv/host_missing/accel_missing/1793
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+getauxval(AT_HWCAP) returns different value under qemu-system-riscv64 and qemu-riscv64
+Description of problem:
+I have a test program that checks for the presence of the RISC-V Vector extension (RVV) via getauxval().
+
+```c
+#include <sys/auxv.h>
+#include <stdio.h>
+
+#define ISA_V_HWCAP (1 << ('v' - 'a'))
+
+void main() {
+  unsigned long hw_cap = getauxval(AT_HWCAP);
+  printf("RVV %s\n", hw_cap & ISA_V_HWCAP ? "detected" : "not found");
+}
+```
+
+When run inside `qemu-system-riscv64` with a 6.5-rc3 kernel where `CONFIG_RISCV_ISA_V=y` and `CONFIG_RISCV_ISA_V_DEFAULT_ENABLE=y` it correctly shows:
+
+```
+$ ./hwcap
+RVV detected
+```
+
+However when executed with `qemu-riscv64` it does not return the V bit set:
+
+```
+$ qemu-riscv64 hwcap
+RVV not found
+```
+Steps to reproduce:
+1. Boot 6.5-rc3 kernel with `CONFIG_RISCV_ISA_V=y` and `CONFIG_RISCV_ISA_V_DEFAULT_ENABLE=y`
+2. In guest run test program hwcap (source above)
+3. On host run `qemu-riscv64 hwcap`
+Additional information:
+