add 18th iteration of classifier

1 files changed, 63 insertions, 0 deletions

diff --git a/results/classifier/118/risc-v/1093 b/results/classifier/118/risc-v/1093
new file mode 100644
index 000000000..c4926ea59
--- /dev/null
+++ b/results/classifier/118/risc-v/1093
@@ -0,0 +1,63 @@
+risc-v: 0.941
+graphic: 0.780
+device: 0.675
+performance: 0.656
+files: 0.642
+ppc: 0.545
+architecture: 0.508
+user-level: 0.423
+vnc: 0.406
+network: 0.394
+semantic: 0.378
+socket: 0.365
+permissions: 0.306
+arm: 0.297
+PID: 0.291
+boot: 0.281
+mistranslation: 0.211
+debug: 0.210
+peripherals: 0.201
+TCG: 0.198
+register: 0.191
+kernel: 0.183
+hypervisor: 0.173
+VMM: 0.154
+i386: 0.123
+KVM: 0.113
+virtual: 0.109
+x86: 0.098
+assembly: 0.081
+
+RISC-V: signal frame is misaligned in signal handlers
+Description of problem:
+`qemu-user` misaligns the signal frame (to 4 bytes rather than 16 bytes) on RISC-V 64, e.g causing pointer misalignment diagnostics to be triggered by UBSan.
+Steps to reproduce:
+1. Create a C file with the following contents:
+```c
+#include <signal.h>
+#include <stdio.h>
+
+void handler(int sig, siginfo_t *info, void *context) {
+	printf("signal occurred, info: %p, context: %p\n", info, context);
+}
+
+int main() {
+	struct sigaction act;
+	act.sa_flags = SA_SIGINFO;
+	act.sa_sigaction = handler;
+	sigaction(SIGINT, &act, NULL);
+
+	// Deliberately misalign the stack
+	asm volatile ("addi sp, sp, -4");
+
+	while(1);
+	// Unreachable
+}
+```
+2. Compile with an appropriate RISC-V toolchain and run with `qemu-riscv64 ./a.out`.
+3. Send a `SIGINT` (e.g by hitting Ctrl-C), and observe that the signal frame will be misaligned:
+```
+signal occurred, info: 0x400080025c, context: 0x40008002dc
+```
+Additional information:
+This issue is alluded to in the source code, see https://gitlab.com/qemu-project/qemu/-/blob/master/linux-user/riscv/signal.c#L68-69. It should be sufficient to change that constant to 15.