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| author | Christian Krinitsin <mail@krinitsin.com> | 2025-07-03 19:39:53 +0200 |
|---|---|---|
| committer | Christian Krinitsin <mail@krinitsin.com> | 2025-07-03 19:39:53 +0200 |
| commit | dee4dcba78baf712cab403d47d9db319ab7f95d6 (patch) | |
| tree | 418478faf06786701a56268672f73d6b0b4eb239 /results/classifier/deepseek-r1:14b/output/hypervisor/788697 | |
| parent | 4d9e26c0333abd39bdbd039dcdb30ed429c475ba (diff) | |
| download | qemu-analysis-dee4dcba78baf712cab403d47d9db319ab7f95d6.tar.gz qemu-analysis-dee4dcba78baf712cab403d47d9db319ab7f95d6.zip | |
restructure results
Diffstat (limited to 'results/classifier/deepseek-r1:14b/output/hypervisor/788697')
| -rw-r--r-- | results/classifier/deepseek-r1:14b/output/hypervisor/788697 | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/results/classifier/deepseek-r1:14b/output/hypervisor/788697 b/results/classifier/deepseek-r1:14b/output/hypervisor/788697 new file mode 100644 index 000000000..5149a488d --- /dev/null +++ b/results/classifier/deepseek-r1:14b/output/hypervisor/788697 @@ -0,0 +1,4 @@ + +[PowerPC] [patch] mtmsr does not preserve high bits of MSR + +The mtmsr instruction on 64-bit PPC does not preserve the high-order 32-bits of the MSR the way it is supposed to, instead setting them to 0, which takes 64-bit code out of 64-bit mode. There is some code that does the right thing, but it brokenly only preserves these bits when the thread is not in 64-bit mode (i.e. when it doesn't matter). The attached patch unconditionally enables this code when TARGET_PPC64 is set, per the ISA spec, which fixes early boot failures trying to start FreeBSD/powerpc64 under qemu. \ No newline at end of file |